Patents by Inventor Wei Liao

Wei Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240147665
    Abstract: A precooling device integrated with a cooling distribution unit and a server liquid cooling system are provided. The precooling device includes a liquid cooling row, an adapter assembly, and a cooling distribution unit. The adapter assembly includes a flow joining row and a flow distribution row. The cooling distribution unit supplies a refrigerant from an interior thereof, and includes an outlet and an inlet communicating with the interior. The outlet communicates with the flow distribution row of the adapter assembly to deliver the refrigerant for heat exchange. The refrigerant being performed the heat exchange returns to the liquid cooling row through the flow joining row of the adapter assembly for precooling, and then returns from the liquid cooling row to the cooling distribution unit through the inlet. The refrigerant is precooled before returning to the cooling distribution unit.
    Type: Application
    Filed: February 28, 2023
    Publication date: May 2, 2024
    Inventors: Chia-Wei CHEN, Kun-Chieh LIAO, Yueh-Ming LIU
  • Publication number: 20240145380
    Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a first interconnect dielectric layer arranged over a substrate. An interconnect wire extends through the first interconnect dielectric layer, and a barrier structure is arranged directly over the interconnect wire. The integrated chip further includes an etch stop layer arranged over the barrier structure and surrounds outer sidewalls of the barrier structure. A second interconnect dielectric layer is arranged over the etch stop layer, and an interconnect via extends through the second interconnect dielectric layer, the etch stop layer, and the barrier structure to contact the interconnect wire.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: Hsin-Chieh Yao, Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Wei-Hao Liao, Yu-Teng Dai
  • Publication number: 20240147673
    Abstract: A cooling device for rack servers and cooling method for rack servers are provided. The cooling device for rack servers includes an environmental temperature sensor, a humidity sensor, a coolant temperature sensor, an electronic valve, and a controller. The controller is configured to compute a dew point temperature according to an ambient temperature and an ambient humidity sensed by the environmental temperature sensor and the humidity sensor, compute a temperature difference between a outlet-liquid temperature of a coolant and the dew point temperature, and control an opening of the electronic valve according to the temperature difference to adjust a liquid flow of the coolant outputted, such that the outlet-liquid temperature dynamically changes following the adjustment of the liquid flow.
    Type: Application
    Filed: February 28, 2023
    Publication date: May 2, 2024
    Inventors: Chia-Wei CHEN, Kun-Chieh LIAO, Yueh-Ming LIU
  • Publication number: 20240145898
    Abstract: An electronic device including a metal casing and at least one antenna module is provided. The metal casing includes at least one window. The at least one antenna module is disposed in the at least one window. The at least one antenna module includes a first radiator and a second radiator. The first radiator includes a feeding end, a first ground end joined to the metal casing, a second ground end, a first portion extending from the feeding end to the first ground end, and a second portion extending from the feeding end to the second ground end. A first coupling gap is between the second radiator and the first portion. A second coupling gap is between at least part of the second radiator and the metal casing, and the second radiator includes a third ground end joined to the metal casing.
    Type: Application
    Filed: September 8, 2023
    Publication date: May 2, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Sheng-Chin Hsu, Chih-Wei Liao, Hau Yuen Tan, Cheng-Hsiung Wu, Shih-Keng Huang
  • Publication number: 20240136420
    Abstract: A thin film transistor includes a substrate, a semiconductor layer, a gate insulating layer, a gate, a source and a drain. The semiconductor layer is located above the substrate. The gate insulating layer is located above the semiconductor layer. The gate is located above the gate insulating layer and overlapping with the semiconductor layer. The gate includes a first portion, a second portion and a third portion. The first portion is extending along the surface of the gate insulating layer and directly in contact with the gate insulating layer. The second portion is separated from the gate insulating layer. Taking the surface of the gate insulating layer as a reference, the top surface of the second portion is higher than the top surface of the first portion. The third portion connects the first portion to the second portion. The source and the drain are electrically connected to the semiconductor layer.
    Type: Application
    Filed: December 1, 2022
    Publication date: April 25, 2024
    Applicant: AUO Corporation
    Inventors: Kuo-Jui Chang, Wen-Tai Chen, Chi-Sheng Chiang, Yu-Chuan Liao, Chien-Sen Weng, Ming-Wei Sun
  • Publication number: 20240124643
    Abstract: A method for producing a polyester polyol is provided, which includes: feeding a first antioxidant and a raw material reactant that includes a polyacid and a polyol into a reactor; subjecting the polyacid and the polyol to an esterification reaction to form an oligomer; and performing a prepolymerization reaction on the oligomer to obtain a prepolymerization reactant. During the prepolymerization reaction, the method includes sampling and monitoring an acid value of the prepolymerization reactant. When the acid value of the prepolymerization reactant reaches a first acid value, an esterification reaction catalyst is added to the prepolymerization reactant for carrying out a polycondensation reaction and generating a polycondensation reactant that contains the polyester polyol. During the polycondensation reaction, the method includes sampling and monitoring an acid value of the polycondensation reactant.
    Type: Application
    Filed: November 30, 2022
    Publication date: April 18, 2024
    Inventors: TE-CHAO LIAO, HAN-CHING HSU, CHEN-WEI CHANG
  • Publication number: 20240126001
    Abstract: A switchable backlight module is disclosed. The switchable backlight module includes two light source modules arranged parallelly with respect to a plane. Each of the light source modules includes a turning film and a LGP. The LGP is of an edge-lit type arranged parallelly under the turning film. A light ray enters the LGP from a light incident side of the LGP, exits the LGP from a light emergent surface of the LGP, enters the turning film, and exits the turning film from a surface of the turning film away from the LGP. The light incident side of the LGP of one of the light source modules is perpendicular to the light incident side of the LGP of the other light source module. The switchable backlight module is in an anti-peeping mode having a narrow viewing angle when only an upper one of the light source modules emits light.
    Type: Application
    Filed: July 19, 2023
    Publication date: April 18, 2024
    Inventors: YU-HUAN CHIU, CHIEN-WEI LIAO, YEN-LUNG CHEN
  • Publication number: 20240129523
    Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 18, 2024
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI
  • Patent number: 11962804
    Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: April 16, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Chong Soon Lim, Han Boon Teo, Takahiro Nishi, Tadamasa Toma, Ru Ling Liao, Sughosh Pavan Shashidhar, Hai Wei Sun
  • Patent number: 11961809
    Abstract: A package structure includes a first die, a second die over and electrically connected to the first die, an insulating material around the second die, a first antenna extending through the insulating material and electrically connected to the second die, the first antenna being adjacent to a first sidewall of the second die, wherein the first antenna includes a first conductive plate extending through the insulating material, and a plurality of first conductive pillars extending through the insulating material, wherein the first conductive plate is between the plurality of first conductive pillars and the first sidewall of the second die.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Feng-Wei Kuo, Wen-Shiang Liao
  • Publication number: 20240121384
    Abstract: An encoder includes circuitry and memory connected to the circuitry. The circuitry: derives an absolute value of a sum of horizontal gradient values; derives, as a first parameter, the total sum of the absolute values of horizontal gradient values; derives, as a second parameter, the total sum of the absolute values of vertical gradient values; derives a horizontal-related pixel difference value; derives, as a third parameter, the total sum of the absolute values of horizontal-related pixel difference values; derives a vertical-related pixel difference value; derives, as a fourth parameter, the total sum of the absolute values of vertical-related pixel difference values; and generates a prediction image using the first to fourth parameters.
    Type: Application
    Filed: December 14, 2023
    Publication date: April 11, 2024
    Inventors: Jing Ya LI, Ru Ling Liao, Chong Soon Lim, Han Boon Teo, Hai Wei Sun, Che Wei Kuo, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
  • Patent number: 11955459
    Abstract: A package structure is provided. The package structure includes a first die and a second die, a dielectric layer, a bridge, an encapsulant, and a redistribution layer structure. The dielectric layer is disposed on the first die and the second die. The bridge is electrically connected to the first die and the second die, wherein the dielectric layer is spaced apart from the bridge. The encapsulant is disposed on the dielectric layer and laterally encapsulating the bridge. The redistribution layer structure is disposed over the encapsulant and the bridge. A top surface of the bridge is in contact with the RDL structure.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shu-Hang Liao, Chih-Wei Wu, Jing-Cheng Lin, Szu-Wei Lu, Ying-Ching Shih
  • Patent number: 11956467
    Abstract: An encoder, when sub-block encoding is to be performed, determines a plurality of sub-blocks in a first image block, the plurality of sub-blocks including a first sub-block, determines a first motion vector for the first sub-block by referring to a first candidate list, performs first inter prediction processing on the first sub-block using the first motion vector, and encodes the first image block using a result of the first inter prediction processing. When partition encoding is to be performed, the encoder, in operation, determines a plurality of partitions in a second image block, the plurality of partitions including a first partition, determines a second motion vector for the first partition by referring to a second candidate list, performs second inter prediction processing on the first partition using the second motion vector, and encodes the second image block using a result of the second inter prediction processing.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: April 9, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11953730
    Abstract: A semiconductor structure including a semiconductor substrate, a first patterned dielectric layer, a grating coupler and a waveguide is provided. The semiconductor substrate includes an optical reflective layer. The first patterned dielectric layer is disposed on the semiconductor substrate and covers a portion of the optical reflective layer. The grating coupler and the waveguide are disposed on the first patterned dielectric layer, wherein the grating coupler and the waveguide are located over the optical reflective layer.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Feng-Wei Kuo, Wen-Shiang Liao
  • Patent number: 11953723
    Abstract: A thermally tunable waveguide including an optical waveguide and a heater is provided. The optical waveguide includes a phase shifter. The heater is disposed over the optical waveguide. The heater includes a heating portion, pad portions and tapered portions. The heating portion overlaps with the phase shifter of the optical waveguide. The pad portions are disposed aside of the heating portion. Each of the pad portions is connected to the heating portion through one of the tapered portions respectively.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Feng-Wei Kuo, Wen-Shiang Liao
  • Patent number: 11955890
    Abstract: A switching converter circuit for switching one end of an inductor therein between plural voltages according to a pulse width modulation (PWM) signal to convert an input voltage to an output voltage. The switching converter circuit has a driver circuit including a high side driver, a low side driver, a high side sensor circuit, and a low side sensor circuit. The high side sensor circuit is configured to sense a gate-source voltage of a high side metal oxide semiconductor field effect transistor (MOSFET), to generate a low side enable signal for enabling the low side driver to switch a low side MOSFET according to the PWM signal. The low side sensor circuit is configured to sense a gate-source voltage of a low side MOSFET, to generate a high side enable signal for enabling the high side driver to switch a high side MOSFET according to the PWM signal.
    Type: Grant
    Filed: January 2, 2022
    Date of Patent: April 9, 2024
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Ting-Wei Liao, Chien-Yu Chen, Kun-Huang Yu, Chien-Wei Chiu, Ta-Yung Yang
  • Publication number: 20240113856
    Abstract: The present invention provides an encryption determining method. The method includes the following steps: receiving a side channel signal; generating a filtered side channel signal by filtering noise within the side channel signal; generating a phasor signal by utilizing a filter to covert the filtered side channel signal; locating the encrypted segment by calculating a periodicity of the phasor signal utilizing a standard deviation window; extracting at least one encrypted characteristic from the encrypted segment; and generating an encryption analytic result by recognizing the at least one encrypted characteristic according to a characteristic recognition model; wherein the encryption analytic result includes a position of the encrypted segment within the side channel signal, and an encryption type corresponding to the side channel signal. The present invention is able to automatically and efficiently locate the encryption segment and analyze the encryption type corresponding to the side channel signal.
    Type: Application
    Filed: October 31, 2022
    Publication date: April 4, 2024
    Applicant: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Jian-Wei LIAO, Cheng-En LEE, Ting-Yu LIN
  • Publication number: 20240114683
    Abstract: A method of manufacturing a memory device includes providing a substrate and sequentially forming a stack layer and a hard mask layer on the substrate. The method includes forming a first patterned mandrel and a plurality of second patterned mandrels on the hard mask layer, wherein the first patterned mandrel is adjacent to and spaced apart from an end of the second patterned mandrels in the first direction. The method further includes using the first patterned mandrel and the second patterned mandrels as masks, patterning the hard mask layer and the stack layer sequentially to form a dummy structure and a plurality of word lines separated from each other on the substrate. A portion of the stack layer corresponding to the first mandrel is formed into the dummy structure, and a portion of the stack layer corresponding to the second patterned mandrels is formed into the word lines.
    Type: Application
    Filed: October 3, 2022
    Publication date: April 4, 2024
    Inventors: Tsung-Wei LIN, Kun-Che WU, Chun-Yen LIAO, Chun-Sheng WU
  • Publication number: 20240113429
    Abstract: An electronic device including a bracket and an antenna is provided. The bracket includes first, second, third, and fourth surfaces. The antenna includes a radiator. The radiator includes first, second, third, and fourth portions. The first portion is located on the first surface and includes connected first and second sections. The second portion is located on the second surface and includes third, fourth, fifth, and sixth sections. The third section, the fourth section, and the fifth sections are bent and connected to form a U shape. The third portion is located on the third surface and is connected to the second section and the fourth section. The fourth portion is located on the fourth surface and is connected to the fifth section, the sixth section, and the third portion. The radiator is adapted to resonate at a low frequency band and a first high frequency band.
    Type: Application
    Filed: August 16, 2023
    Publication date: April 4, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Sheng-Chin Hsu, Chia-Hung Chen, Chih-Wei Liao, Hau Yuen Tan, Hao-Hsiang Yang, Shih-Keng Huang
  • Publication number: 20240114160
    Abstract: An image decoder includes circuitry and a memory, wherein the circuitry, in operation, calculates first values of a first partition in a current block, using a first motion vector for the first partition; calculates second values of a second partition in the current block, using a second motion vector for the second partition; calculates third values of a set of pixels between the first partition and the second partition, using the first motion vector; calculates fourth values of the set of pixels, using the second motion vector; and weights the third values and the fourth values. A number of pixels in a row in the set of pixels is two or more, and two or more weights applied to the third values increase along the row.
    Type: Application
    Filed: December 7, 2023
    Publication date: April 4, 2024
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI