Patents by Inventor Wei Liao
Wei Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240114134Abstract: An encoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, determines whether or not a ternary split process of splitting a block into three sub blocks in a first direction parallel to a first longer side of the block is allowed by comparing a size of a second shorter side of the block to a minimum threshold value. The circuitry, responsive to the ternary split process being allowed, writes, into a bitstream, a split direction parameter indicative of a splitting direction. The circuitry, in operation, splits the block into a plurality of sub blocks in a direction indicated by the split direction parameter; and encodes the plurality of sub blocks. The minimum threshold value corresponds to a minimum size supported in a transform process.Type: ApplicationFiled: December 5, 2023Publication date: April 4, 2024Inventors: Sughosh Pavan SHASHIDHAR, Hai Wei SUN, Chong Soon LIM, Ru Ling LIAO, Han Boon TEO, Jing Ya LI, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH, Tadamasa TOMA
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Publication number: 20240114136Abstract: An image encoder/decoder includes circuitry and a memory coupled to the circuitry. When a geometry of a block of a picture satisfies a first condition, the circuitry splits the block of the picture into sub blocks having a first set of geometries. When the geometry of the block does not satisfy the first condition, the circuitry splits the block of the picture into sub blocks having a second set of geometries, the second set of geometries being different from the first set of geometries. The circuitry encodes/decodes the sub blocks of the block.Type: ApplicationFiled: December 6, 2023Publication date: April 4, 2024Inventors: Chong Soon LIM, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Ru Ling LIAO, Takahiro NISHI, Tadamasa TOMA
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Publication number: 20240109803Abstract: The present invention provides a flexible glass and manufacturing method thereof. The flexible glass includes a first straight part and a second straight part on two opposite ends thereof, a recess formed between the first straight part and the second straight part, and a pre-bent curve connection part disposed corresponding to the recess. The first straight part and the second straight part are not arranged on the same plane. The flexible glass has a first lateral side and a second lateral side, and the recess sinks from the first lateral side toward the second lateral side. Therefore, the flexible glass is provided with a greater bendability.Type: ApplicationFiled: September 30, 2022Publication date: April 4, 2024Applicant: CHENFENG OPTRONICS CORPORATIONInventors: CHING-FANG WONG, YU-WEI LIU, WEI-LUN ZENG, KUAN-HUA LIAO
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Publication number: 20240114810Abstract: A semiconductor structure includes: an etch-stop dielectric layer overlying a substrate and including a first opening therethrough; a silicon oxide plate overlying the etch-stop dielectric layer and including a second opening therethrough; a first conductive structure including a first electrode and extending through the second opening and the first opening; a memory film contacting a top surface of the first conductive structure and including a material that provides at least two resistive states having different electrical resistivity; and a second conductive structure including a second electrode and contacting a top surface of the memory film.Type: ApplicationFiled: April 20, 2023Publication date: April 4, 2024Inventors: Fu-Ting Sung, Jhih-Bin Chen, Hung-Shu Huang, Hong Ming Liu, Hsia-Wei Chen, Yu-Wen Liao, Wen-Ting Chu
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Patent number: 11946569Abstract: An actuating and sensing module is disclosed and includes a bottom plate, a gas pressure sensor, a thin gas transportation device and a cover plate. The bottom plate includes a pressure relief orifice, a discharging orifice and a communication orifice. The gas pressure sensor is disposed on the bottom plate and seals the communication orifice. The thin gas transportation device is disposed on the bottom plate and seals the pressure relief orifice and the discharging orifice. The cover plate is disposed on the bottom plate and covers the gas pressure sensor and the thin gas-transportation device. The cover plate includes an intake orifice. The thin gas transportation device is driven to inhale gas through the intake orifice, the gas is then discharged through the discharging orifice by the thin gas transportation device, and a pressure change of the gas is sensed by the gas pressure sensor.Type: GrantFiled: April 19, 2021Date of Patent: April 2, 2024Assignee: MICROJET TECHNOLOGY CO., LTD.Inventors: Hao-Jan Mou, Shih-Chang Chen, Jia-Yu Liao, Hung-Hsin Liao, Chung-Wei Kao, Chi-Feng Huang, Yung-Lung Han, Chang-Yen Tsai, Wei-Ming Lee
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Patent number: 11949230Abstract: A hybrid power locomotive and an energy balance control method and system thereof is disclosed. In embodiments of the disclosure, the energy utilization rate is maximized by means of self-adaptive matching of the rotating speed and the power, dynamic balance control over the actual output voltage of the power pack is achieved by means of charging and discharging control over the energy storage element, and energy waste and power pack overload are avoided.Type: GrantFiled: November 18, 2020Date of Patent: April 2, 2024Assignee: CRRC ZHUZHOU LOCOMOTIVE CO., LTD.Inventors: Hongtao Liao, Wei Wang, Qingmin Qin, Zhe Chen, Qiang Fu
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Patent number: 11949180Abstract: A PCIe/SAS connector structure includes a female part and a male part; the female part is engaged with the male part; wherein the female part has a female plastic member, a female cover, a female signal terminal part, a fix pin and a female signal and power terminal; wherein the male part has a male plastic member, a male cover, a male signal and power terminal, a male terminal, and a fix plate; wherein the female cover is in a full-wrap structure; wherein the female cover has a protruding elastic plate, respectively; wherein the male terminal is formed in an L shape; two male terminals are fixed as a set by a plastic; the male terminal is inserted to be positioned in the male cover; wherein the male cover is formed in an L shape in a full-wrap structure. Interference performance of signal terminal is improved.Type: GrantFiled: September 15, 2021Date of Patent: April 2, 2024Assignee: Amphenol East Asia Electronic Technology (Shenzhen) Co., Ltd.Inventors: Xiang Wang, Yan-Bin Tan, Lei Liao, Wei Luo, Jing-Tang Zhou
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Patent number: 11949884Abstract: An encoder encodes a video, and includes: circuitry; and memory coupled to the circuitry. Using the memory, the circuitry: obtains at least two items of prediction information for a first partition included in the video; derives at least one template from neighboring samples which neighbor the first partition; calculates at least two costs, using the at least one template and the at least two items of prediction information; using the at least two costs, (i) determines at least one splitting direction for the first partition or (ii) assigns one of the at least two items of prediction information to a second partition split from the first partition according to the splitting direction, and another thereof to a third partition split from the first partition according to the splitting direction; and encodes the first partition according to the splitting direction and the at least two items of prediction information.Type: GrantFiled: March 7, 2023Date of Patent: April 2, 2024Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICAInventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
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Patent number: 11946802Abstract: An ambient light sensor includes a substrate, a metasurface disposed on the substrate, and an aperture layer disposed on the substrate. The metasurface includes a plurality of nanostructures and a filling layer laterally surrounding the plurality of nanostructures. The aperture layer laterally separates the metasurface into a plurality of sub-meta groups.Type: GrantFiled: March 29, 2023Date of Patent: April 2, 2024Assignee: VISERA TECHNOLOGIES COMPANY LIMITEDInventors: Shih-Liang Ku, Zi-Han Liao, Chun-Wei Huang
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Patent number: 11942364Abstract: In some embodiments, the present disclosure relates to a method of forming an interconnect. The method includes forming an etch stop layer (ESL) over a lower conductive structure and forming one or more dielectric layers over the ESL. A first patterning process is performed on the one or more dielectric layers to form interconnect opening and a second patterning process is performed on the one or more dielectric layers to increase a depth of the interconnect opening and expose an upper surface of the ESL. A protective layer is selectively formed on sidewalls of the one or more dielectric layers forming the interconnect opening. A third patterning process is performed to remove portions of the ESL that are uncovered by the one or more dielectric layers and the protective layer and to expose the lower conductive structure. A conductive material is formed within the interconnect opening.Type: GrantFiled: July 20, 2022Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsi-Wen Tien, Chung-Ju Lee, Chih Wei Lu, Hsin-Chieh Yao, Yu-Teng Dai, Wei-Hao Liao
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Publication number: 20240091561Abstract: A radiation therapy system is disclosed. The radiation therapy system includes a gantry, a first radiation source, and a second radiation source. The gantry is configured to have a cavity extending in a direction along a rotation axis, and the cavity is configured to house a target object. The first radiation source is mounted on the gantry, and configured to emit a treatment beam to a treatment area of the target object. The second radiation source is mounted on the gantry, and configured to emit an imaging beam to an imaging area of the target object. The treatment area partially overlaps the imaging area. A rotation plane of the first radiation source and a rotation plane of the second radiation source are distributed in a direction along the rotation axis.Type: ApplicationFiled: September 18, 2023Publication date: March 21, 2024Inventors: CAN LIAO, BO CAI, LING-QING MEI, ZHI-DU ZHANG, CHENG NI, WEI ZHANG
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Publication number: 20240096998Abstract: The present disclosure describes a method for forming metallization layers that include a ruthenium metal liner and a cobalt metal fill. The method includes depositing a first dielectric on a substrate having a gate structure and source/drain (S/D) structures, forming an opening in the first dielectric to expose the S/D structures, and depositing a ruthenium metal on bottom and sidewall surfaces of the opening. The method further includes depositing a cobalt metal on the ruthenium metal to fill the opening, reflowing the cobalt metal, and planarizing the cobalt and ruthenium metals to form S/D conductive structures with a top surface coplanar with a top surface of the first dielectric.Type: ApplicationFiled: November 21, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shuen-Shin LIANG, Chij-chien CHI, Yi-Ying LIU, Chia-Hung CHU, Hsu-Kai CHANG, Cheng-Wei CHANG, Chein-Shun LIAO, Keng-chu LIN, KAi-Ting HUANG
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Patent number: 11934027Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: GrantFiled: June 21, 2022Date of Patent: March 19, 2024Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
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Publication number: 20240087951Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.Type: ApplicationFiled: November 17, 2023Publication date: March 14, 2024Inventors: Chun-Hao Kung, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen
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Publication number: 20240088022Abstract: Some embodiments relate to an integrated chip including a plurality of conductive structures over a substrate. A first dielectric layer is disposed laterally between the conductive structures. A spacer structure is disposed between the first dielectric layer and the plurality of conductive structures. An etch stop layer overlies the plurality of conductive structures. The etch stop layer is disposed on upper surfaces of the spacer structure and the first dielectric layer.Type: ApplicationFiled: November 17, 2023Publication date: March 14, 2024Inventors: Yu-Teng Dai, Chung-Ju Lee, Chih Wei Lu, Hsin-Chieh Yao, Hsi-Wen Tien, Wei-Hao Liao
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Publication number: 20240089493Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: corrects a base motion vector using a correction value for correcting the base motion vector in a predetermined direction; and encodes a current partition to be encoded in an image of a video, using the base motion vector corrected. The correction value is specified by a first parameter and a second parameter, the first parameter indicating a table to be selected from among a plurality of tables each including values, the second parameter indicating one of the values included in the table to be selected indicated by the first parameter. In each of the plurality of tables, a smaller value among the values is assigned a smaller index. Each of the plurality of tables includes a different minimum value among the values.Type: ApplicationFiled: November 20, 2023Publication date: March 14, 2024Inventors: Jing Ya LI, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Han Boon TEO, Kiyofumi ABE, Tadamasa TOMA, Takahiro NISHI
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Publication number: 20240089479Abstract: An image encoder writes a first parameter and a second parameter to a bitstream, and derives a partition mode based on the first and second parameters. Responsive to the derived partition mode being a first partition mode, the image encoder executes the first partition mode including: splitting a block of a picture into a plurality of first blocks including a N×2N block sized N pixels by 2N pixels; splitting the N×2N block, wherein a ternary split is allowed to split the N×2N block in a vertical direction, which is a direction along the 2N pixels, into a plurality of sub blocks including at least one sub block sized N/4×2N, while a binary split is not allowed to split the N×2N block in the vertical direction into two sub blocks that are equally sized N/2×2N; and encoding the plurality of sub blocks.Type: ApplicationFiled: November 15, 2023Publication date: March 14, 2024Inventors: Chong Soon LIM, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Ru Ling LIAO, Han Boon TEO, Takahiro NISHI, Ryuichi KANOH, Tadamasa TOMA
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Patent number: 11928413Abstract: A method and system for generating a physical layout for a grating coupler integrated in a photonically-enabled circuit are disclosed herein. In some embodiments, the method receives a parametrized wavelength, a parametrized first refractive index, a parametrized second refractive index, a parametrized taper length, a parametrized width, a parametrized grating length, and a parametrized incident angle of the optical beam incident onto the grating coupler and generates a physical layout for the grating coupler based on the received parametrized inputs, the generating of the physical layout is according to a predefined model, and outputs the physical layout of the grating coupler for manufacturing under a semiconductor fabrication process.Type: GrantFiled: January 29, 2021Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Feng-Wei Kuo, Wen-Shiang Liao
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Patent number: 11930206Abstract: An encoder which includes circuitry and memory. Using the memory, the circuitry generates a list which includes candidates for a first motion vector for a first partition. The list has a maximum list size and an order of the candidates, and at least one of the maximum list size or the order of the candidates is dependent on at least one of a partition size or a partition shape of the first partition. The circuitry selects the first motion vector from the candidates included in the list; encodes an index indicating the first motion vector among the candidates in the list into the bitstream based on the maximum list size; and generates the predicted image for the first partition using the first motion vector.Type: GrantFiled: April 19, 2023Date of Patent: March 12, 2024Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICAInventors: Chong Soon Lim, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Ru Ling Liao, Jing Ya Li, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh
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Patent number: D1018441Type: GrantFiled: September 23, 2020Date of Patent: March 19, 2024Assignee: Cheng Shin Rubber Industrial Co., Ltd.Inventors: Yu Chieh Chen, Yu Shiuan Lin, Chia Hao Chang, Ku Wei Liao, Yi Ru Chen