Patents by Inventor Wei Lin

Wei Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240246991
    Abstract: The present invention relates to a method for the manufacture of a compound of Formula I or a pharmaceutically acceptable salt, acid co-crystal, hydrate or other solvate thereof, said method comprising reacting a compound of the formula II with a compound of the formula III according to the following reaction scheme: wherein LG, A, n, m and p are as defined in the Summary of the Invention.
    Type: Application
    Filed: December 6, 2023
    Publication date: July 25, 2024
    Inventors: Zhongbo Fei, Huanqing Jia, Wei Li, Xiaohui Lin, Zhongcheng Min, Hui Wang, Jianhua Wang, Hao Zhang
  • Publication number: 20240248129
    Abstract: A circuit board detection device includes a base, a stage assembly, a first gantry support, and a first probe assembly. The stage assembly is arranged on the base and includes a linear drive module, a rotary motor, and a platform. The platform is configured to carry a circuit board and can be driven by the linear drive module to move along a first axial direction. The platform can also be driven by the rotary motor to rotate relative to a first rotation axis. The first gantry support is fixed on the base and includes a first beam. The first beam extends along a second axial direction perpendicular to the first axial direction to span over the linear drive module, and includes a first probe guide rail. The first probe assembly is arranged on the first probe guide rail to be movable along the second axial direction.
    Type: Application
    Filed: January 8, 2024
    Publication date: July 25, 2024
    Applicant: MPI Corporation
    Inventors: Wen-Wei Lin, Wen-Chung Lin, Chia-Nan Chou, Huang-Huang Yang, Yu-Tse Wang, Wei-Heng Hung, Ya-Hung Lo, Shou-Jen Tsai, Fuh-Chyun Tang
  • Publication number: 20240248221
    Abstract: An on-site earthquake early warning method is disclosed. The method includes the following steps: receiving a first signal generated in response to a first vibration event and a second signal generated in response to a second vibration event; determining whether an earthquake event exists according to the first and the second signals; predicting a real-time seismic shear wave prediction characteristic value according to the first signal; and sending the real-time seismic shear wave prediction characteristic value when it is determined that the earthquake event exists.
    Type: Application
    Filed: January 19, 2023
    Publication date: July 25, 2024
    Inventors: Pei-Yang Lin, Hung-Wei Chiang, Hsiu-Hsien Wang
  • Publication number: 20240247326
    Abstract: Disclosed is a preparation method of a plant biomass-based active tanning agent. Under a low-temperature reaction condition, cyanuric chloride and a plant biomass compound are used to synthesize an environment-friendly plant biomass-based active tanning agent through a nucleophilic substitution reaction. The active tanning agent obtained in the present disclosure appears as a white or light brown emulsion at room temperature, and has substantial active groups such as hydroxyl groups, carboxyl groups and ester groups introduced into its structure, thus endowing leathers with desirable hydrothermal stability and physical properties and having a desirable synergistic effect with metal tanning agents. Meanwhile, health and environment risks caused by hexavalent chromium and free formaldehyde in leathers are avoided.
    Type: Application
    Filed: June 1, 2022
    Publication date: July 25, 2024
    Applicant: SICHUAN UNIVERSITY
    Inventors: Wei Lin, Yuanhang Xiao, Chunhua Wang, Min Jiang
  • Publication number: 20240248794
    Abstract: A computing device for verifying data integrity is provided, comprising a memory controller configured to receive a plurality of original data blocks. Each original data block has an associated initial CRC value. The memory controller then segments and recombines the received data blocks into logic blocks, and calculates a new logic block CRC value for each logic block. The logic blocks are transmitted with their respective new logic block CRC values to a storage device, and the logic blocks are written to non-volatile memory of the storage device in a write operation. After the write operation, a combined CRC value is calculated for the logic blocks and a combined CRC value for the original data blocks, and compare the combined CRC values. The memory controller determines whether the combined CRC values match. When they match, the memory controller generates a verification response verifying the integrity of the write operation.
    Type: Application
    Filed: February 20, 2024
    Publication date: July 25, 2024
    Inventors: Peng XU, Fei LIU, Kyoungryun BAE, Hao WANG, Ming LIN, Wei TANG, Sheng QIU, Yang LIU
  • Publication number: 20240248224
    Abstract: In the present invention, an earthquake detection system based on the combination configuration of a free field and remote signal source is provided. The earthquake detection system includes: a host; a main sensor arranged in a free field and connected to the host; and a plurality of backup sensors, which are remotely arranged with respect to the main sensor, wherein each of the backup is connected to the host via the internet and transmits a remote signal to the host so as to avoid misjudging the occurrence of earthquakes because of unnatural factors, and prevent the vibration caused by human activities from interfering with the detector. The earthquake detection system achieves the effect of verification through a plurality of sensors installed in different positions.
    Type: Application
    Filed: January 19, 2023
    Publication date: July 25, 2024
    Inventors: Hung-Wei Chiang, Pei-Yang Lin, Hsiu-Hsien Wang
  • Publication number: 20240248222
    Abstract: An earthquake detection system is disclosed. The earthquake detection system includes a main sensor, a first backup sensor, a second backup sensor and a third backup sensor. The main sensor is disposed on a free field. The first backup sensor is disposed on a structure. The second backup sensor is disposed below a ground surface at a depth of at least 20 meters. The third backup sensor is disposed at a remote end relative to the main sensor, and outputs a remote signal through a network so as to avoid misjudging the occurrence of earthquakes because of unnatural factors, and prevent the vibration caused by human activities from interfering with the detector. The earthquake detection system achieves the effect of verification through a plurality of sensors installed in different positions. Only when all the sensors confirm that there is an earthquake, an earthquake warning will be issued to the protected place.
    Type: Application
    Filed: January 19, 2023
    Publication date: July 25, 2024
    Inventors: Hung-Wei Chiang, Pei-Yang Lin, Hsiu-Hsien Wang
  • Publication number: 20240251541
    Abstract: A memory macro includes an input/output (I/O) circuit positioned in a semiconductor wafer, a column of memory cells including first and second subsets of contiguous memory cells extending away from the I/O circuit in the semiconductor wafer, wherein the first subset is positioned between the I/O circuit and the second subset, a first bit line coupled to the I/O circuit and extending on one of a frontside or a backside of the semiconductor wafer along the first subset and terminating at the second subset, and a second bit line coupled to the I/O circuit and extending on the other of the frontside or the backside along the first and second subsets. Each memory cell of the first subset is electrically connected to the first bit line, and each memory cell of the second subset is electrically connected to the second bit line.
    Type: Application
    Filed: May 30, 2023
    Publication date: July 25, 2024
    Inventors: Yen Lin CHUNG, Kao-Cheng LIN, Wei Min CHAN, Yen-Huei CHEN
  • Publication number: 20240248223
    Abstract: An earthquake detection method is disclosed. The method comprises the following steps: receiving a first signal and at least a second signal, wherein the first signal is triggered in response to a first vibration state of a main detection site, and the at least a second signal is triggered in response to at least a second vibration state of at least a backup detection site; determining whether a quantity of those being enabled among the at least a second signal satisfies a quantity ratio condition, and determining whether the first signal and the quantity of the at least a second signal are both enabled at a specific time point, wherein the first and the quantity of the at least a second signals respectively have a first and at least a second initial enabled time points; and determining there is a real earthquake event when an interval between the first and the at least a second signal satisfies a time relationship.
    Type: Application
    Filed: January 19, 2023
    Publication date: July 25, 2024
    Inventors: Hung-Wei Chiang, Hsiu-Hsien Wang, Pei-Yang Lin
  • Publication number: 20240248227
    Abstract: A method for predicting an on-site seismic feature value using artificial intelligence is disclosed. The method includes the steps of obtaining a plurality of seismic historical data for a local position, wherein each of the seismic historical data includes seismic longitudinal wave information and a corresponding seismic transverse wave feature value, the seismic longitudinal wave information includes a plurality of data related to a vertical direction of ground surface, and the plurality of data include at least an acceleration value, a displacement value, a period and a velocity value; and based on at least the plurality of seismic historical data, obtaining a seismic transverse wave prediction model for the local position via an artificial intelligence calculation module.
    Type: Application
    Filed: January 19, 2023
    Publication date: July 25, 2024
    Inventors: Pei-Yang Lin, Hsiu-Hsien Wang, Hung-Wei Chiang
  • Publication number: 20240250080
    Abstract: An optoelectronic package structure is provided. The optoelectronic package includes a carrier, an electronic component, a photonic component and a first power supply path in the carrier. The carrier includes a first region and the electronic component is disposed over the first region of the carrier. A first power supply path is electrically connects the electronic component.
    Type: Application
    Filed: March 12, 2024
    Publication date: July 25, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Jr-Wei LIN, Mei-Ju LU
  • Publication number: 20240249991
    Abstract: A semiconductor structure includes a substrate having a front side and a back side, one or more dielectric layers over the front side, and a conductive structure. The one or more dielectric layers include a thermal sensor region and two dummy regions sandwiching the thermal sensor region along a second direction from a top view. The thermal sensor region and the two dummy regions extend longitudinally along a first direction generally perpendicular to the second direction from the top view. The conductive structure is embedded in the thermal sensor region of the one or more dielectric layers. The conductive structure includes conductive lines parallel to each other and extending longitudinally along the first direction, and conductive bars and vias electrically connecting the conductive lines. The conductive lines in a same dielectric layer of the one or more dielectric layers are electrically connected one by one zigzaggedly from the top view.
    Type: Application
    Filed: January 19, 2023
    Publication date: July 25, 2024
    Inventors: Yu-Hsiang Chen, Hsiu-Wen Hsueh, Szu-Lin Liu, Wen-Sheh Huang, Chloe Hsin-Yi Chen, Wei-Lin Lai
  • Publication number: 20240248243
    Abstract: A polarizer includes a first polarization layer group. The first polarization layer group includes a first light-transmitting layer and a second light-transmitting layer. The first light-transmitting layer has a first X-direction refractive index and a first Y-direction refractive index. The second light-transmitting layer is superimposed on a top surface of the first light-transmitting layer. The second light-transmitting layer has a second X-direction refractive index and a second Y-direction refractive index. The first Y-direction refractive index is different from the second Y-direction refractive index, and the first X-direction refractive index is essentially the same as the second X-direction refractive index. The second light-transmitting layer has a first light-transmitting medium and a second light-transmitting medium arranged transversely, and a third refractive index of the first light-transmitting medium is different from a fourth refractive index of the second light-transmitting medium.
    Type: Application
    Filed: October 26, 2023
    Publication date: July 25, 2024
    Applicant: GUANGZHOU LUXVISIONS INNOVATION TECHNOLOGY LIMITED
    Inventors: Yi-Chih Lai, Lee-Lin Tsai, Wei-Han Wu
  • Publication number: 20240249948
    Abstract: The present disclosure relates to a method for fabricating a semiconductor structure. The method includes providing a substrate with a gate structure, an insulating structure over the gate structure, and a S/D region; depositing a titanium silicide layer over the S/D region with a first chemical vapor deposition (CVD) process. The first CVD process includes a first hydrogen gas flow. The method also includes depositing a titanium nitride layer over the insulating structure with a second CVD process. The second CVD process includes a second hydrogen gas flow. The first and second CVD processes are performed in a single reaction chamber and a flow rate of the first hydrogen gas flow is higher than a flow rate of the second hydrogen gas flow.
    Type: Application
    Filed: March 28, 2024
    Publication date: July 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Wei CHANG, Kao-Feng LIN, Min-Hsiu HUNG, Yi-Hsiang CHAO, Huang-Yi HUANG, Yu-Ting LIN
  • Publication number: 20240249778
    Abstract: A read voltage calibration method, a memory storage device, and a memory control circuit unit are provided. The read voltage calibration method includes: reading data from a first physical unit by using multiple read voltage levels; decoding the data to obtain multiple error evaluation parameters; determining a first vector distance parameter according to a first error evaluation parameter; determining multiple candidate read voltage levels according to the first vector distance parameter and a first read voltage level; determining a target read voltage level according to one of the candidate read voltage levels; and reading the data again from the first physical unit by using the target read voltage level.
    Type: Application
    Filed: March 7, 2023
    Publication date: July 25, 2024
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Szu-Wei Chen, An-Cin Li, Yu-Hung Lin, Kai-Wei Tsou
  • Publication number: 20240250423
    Abstract: Provided are an antenna structure, an array antenna and an electronic device. The antenna structure includes a first substrate, a second substrate and a dielectric layer with an adjustable dielectric constant. The first substrate includes a first base and a first and a second radiation phase shift unit. The second substrate includes a second base and a third and a fourth radiation phase shift unit. Orthographic projections of the first and third radiation phase shift units on the first base at least partially overlap. Orthographic projections of the second and fourth radiation phase shift unit on the first base at least partially overlap. A first included angle is formed between extending directions of radiation areas of the first and second radiation phase shift units; a second included angle is formed between extending directions of radiation areas of the third and fourth radiation phase shift unit.
    Type: Application
    Filed: February 25, 2022
    Publication date: July 25, 2024
    Inventors: Yiming WANG, Xiaoqiang YANG, Cuiwei TANG, Wei ZHAO, Lu CHEN, Zixiang LIN, Chuncheng CHE
  • Publication number: 20240249610
    Abstract: An information platform for providing an earthquake early warning of a large area is disclosed. The large area includes a plurality of small districts, different sets of the plurality of small districts form different large districts according to geographical locations so as to make up the large area, and the information platform is both connected with a plurality of on-site earthquake early warning stations and the plurality of small districts through a cloud network. The plurality of on-site earthquake early warning stations are located in the large districts respectively, each of the plurality of on-site earthquake early warning stations is configured to obtain a real-time seismic longitudinal wave measurement data, obtain a real-time seismic transverse wave feature prediction value corresponding to the real-time seismic longitudinal wave measurement data, and transmit the real-time seismic transverse wave feature prediction value.
    Type: Application
    Filed: January 19, 2023
    Publication date: July 25, 2024
    Inventors: Pei-Yang Lin, Hsiu-Hsien Wang, Hung-Wei Chiang
  • Publication number: 20240249548
    Abstract: A method and device of fingerprint image generation for saving memory are introduced. The method includes receiving a plurality of touch sensing values from a touch display panel and determining which touch sensing electrodes detect a touch event. An area corresponding to a number of touch sensing electrodes, which are a part of a plurality of touch sensing electrodes determined as detecting the touch event, is taken as an effective fingerprint area. The effective fingerprint area is determined by comparing a preset value and touch sensing values sensed by the plurality of touch sensing electrodes those are determined as detecting the touch event. The method further performs fingerprint sensing in a fingerprint readout area and storing a first fingerprint image corresponding to the effective fingerprint area .
    Type: Application
    Filed: April 2, 2024
    Publication date: July 25, 2024
    Applicant: Novatek Microelectronics Corp.
    Inventors: WEILUN SHIH, WU-WEI LIN
  • Publication number: 20240250137
    Abstract: Provided is an IGBT device. The IGBT device includes a p-type collector region, an n-type semiconductor layer located above the p-type collector region, a plurality of gate trenches, shielded gates, gates, and a p-type body region located in the n-type semiconductor layer and between adjacent gate trenches. The gate trenches are located in the n-type semiconductor layer. A shielded gate is located in a lower part of a gate trench. A gate is located in an upper part of the gate trench. The gate, the shielded gate, and the n-type semiconductor layer are insulated and isolated from each other. Partial shielded gates are each externally connected to a gate voltage and are each defined as a first shielded gate. Shielded gates other than the partial shielded gates are each externally connected to an emitter electrode voltage and are each defined as a second shielded gate. The first shielded gate and the second shielded gate are disposed alternately.
    Type: Application
    Filed: June 27, 2022
    Publication date: July 25, 2024
    Inventors: Wei LIU, Minzhi LIN, Yuanlin YUAN, Rui WANG
  • Publication number: 20240250133
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a gate electrode, a gate insulating layer, an active layer, a dielectric layer, a source electrode, and a drain electrode. The gate insulating layer is disposed between the gate electrode and the active layer, the dielectric layer is disposed on a side of the active layer, and the source electrode and the drain electrode pass through the dielectric layer to electrically connect with the active layer, wherein a first contact surface is formed between the source electrode and the active layer, a second contact surface is formed between the drain electrode and the active layer, the first contact surface and the second contact surface are subjected to a plasma treatment or a deposition treatment to form a protective interface layer.
    Type: Application
    Filed: January 19, 2023
    Publication date: July 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wu-Wei TSAI, Chi-Min CHEN, Yin-Hao WU, Kai-Wen CHENG, Hai-Ching CHEN, Yu-Ming LIN, Chung-Te LIN