Patents by Inventor Wei Lin

Wei Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12009256
    Abstract: A method includes forming a metal seed layer over a first conductive feature of a wafer, forming a patterned photo resist on the metal seed layer, forming a second conductive feature in an opening in the patterned photo resist, and heating the wafer to generate a gap between the second conductive feature and the patterned photo resist. A protection layer is plated on the second conductive feature. The method further includes removing the patterned photo resist, and etching the metal seed layer.
    Type: Grant
    Filed: June 20, 2023
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Da Cheng, Wen-Hsiung Lu, Chin Wei Kang, Yung-Han Chuang, Lung-Kai Mao, Yung-Sheng Lin
  • Patent number: 12009033
    Abstract: A memory device and method of making the same are disclosed. The memory device includes transistor devices located in both a memory region and a logic region of the device. Transistor devices in the memory region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, a second oxide layer over the first nitride layer, and a second nitride layer over the second oxide layer. Transistor devices in the logic region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, and a second nitride layer over the first nitride layer.
    Type: Grant
    Filed: June 20, 2023
    Date of Patent: June 11, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chen-Ming Huang, Wen-Tuo Huang, Yu-Hsiang Yang, Yu-Ling Hsu, Wei-Lin Chang, Chia-Sheng Lin, ShihKuang Yang, Yu-Chun Chang, Hung-Ling Shih, Po-Wei Liu, Shih-Hsien Chen
  • Patent number: 12009056
    Abstract: The present invention discloses a data transmission apparatus having clock gating mechanism. Each of data transmission circuits has a flip-flop depth of N and receives a write clock signal and one of read clock signals to receive and output one of data signals. A write clock gating circuit receives a write clock gating enabling signal to transmit the write clock signal to the data transmission circuits. Each of read clock gating circuits receives one of read clock gating enabling signals to transmit one of the read clock signals. The gating signal transmission circuit has a flip-flop depth of N+M and receives the write and the read clock signals to receive the write clock gating enabling signal and output the read clock gating enabling signals. A largest timing difference among the read clock signals is P clock cycles and M is at least ?P?.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: June 11, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Fu-Chin Tsai, Ger-Chih Chou, Chun-Chi Yu, Chih-Wei Chang, Shih-Han Lin
  • Patent number: 12005090
    Abstract: Disclosed herein is a probiotic composition including Lactobacillus salivarius subsp. salicinius AP-32 that is deposited at the China Center for Type Culture Collection (CCTCC) under an accession number CCTCC M 2011127, and Bifidobacterium longum subsp. longum OLP-01 that is deposited at the China General Microbiological Culture Collection Center (CGMCC) under an accession number CGMCC 17345. Also disclosed herein are use of at least one of the abovementioned lactic acid bacterial strains for treating obesity and/or an obesity-related disorder, and for inhibiting fat absorption.
    Type: Grant
    Filed: October 1, 2021
    Date of Patent: June 11, 2024
    Assignee: GLAC BIOTECH CO., LTD.
    Inventors: Hsieh-Hsun Ho, Ching-Wei Chen, Yu-Fen Huang, Yi-Wei Kuo, Wen-Yang Lin, Yen-Yu Huang
  • Patent number: 12009238
    Abstract: The present disclosure provides a method for fabricating a semiconductor structure, including disposing a mask at a first position in a first chamber, generating; a first plurality of ions toward the mask by an ionizer, forming a photoresist layer on a substrate, receiving the substrate in the first chamber, and exposing the photoresist layer with actinic radiation through the mask in the first chamber.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Po-Chien Huang, Chung-Hung Lin, Chih-Wei Wen
  • Patent number: 12007063
    Abstract: A stand adjustment device has a tripod-connecting member, a connecting seat, a distal clamping plate, a boom-connecting tube, a locking shaft, and a manual operating member. The connecting seat is rotatably located around the tripod-connecting member. The distal clamping plate is detachably attached to a side of the connecting seat. One end of the locking shaft is movably disposed in the boom-connecting tube. The boom is slidably mounted through the boom-connecting tube and the locking shaft. The locking shaft is slidably mounted through the boom-connecting tube, the distal clamping plate, and the connecting seat such that the boom-connecting tube is rotatable relative to the connecting seat. The manual operating member and the locking shaft are configured to clamp the boom-connecting tube, the distal clamping plate, and the connecting seat therebetween into a locked condition.
    Type: Grant
    Filed: May 30, 2023
    Date of Patent: June 11, 2024
    Assignee: RELIANCE INTERNATIONAL CORP.
    Inventors: Pei-Chi Chu, Cheng-Lin Ho, Chi-Chia Huang, Wei-Ting Chen
  • Patent number: 12006208
    Abstract: A semiconductor oxide plate is formed on a recessed surface in a semiconductor matrix material layer. Comb structures are formed in the semiconductor matrix material layer. The comb structures include a pair of inner comb structures spaced apart by a first semiconductor portion. A second semiconductor portion that laterally surrounds the first semiconductor portion is removed selective to the comb structures using an isotropic etch process. The first semiconductor portion is protected from an etchant of the isotropic etch process by the semiconductor oxide plate, the pair of inner comb structures, and a patterned etch mask layer that covers the comb structures. A movable structure for a MEMS device is formed, which includes a combination of the first portion of the semiconductor matrix material layer and the pair of inner comb structures.
    Type: Grant
    Filed: April 21, 2023
    Date of Patent: June 11, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Ting-Jung Chen, Shih-Wei Lin
  • Patent number: 12007430
    Abstract: A device for testing a group of radio-frequency (RF) chip modules and a method for using the same is disclosed. The device includes a signal analyzer, a power divider, control ICs, a signal controller, and a power combiner. The power divider receives an RF signal and transmits RF input signals to the RF chip modules and the control ICs in response to the RF signal. The signal controller controls each control IC to adjust at least one of the power and the phase of the corresponding RF input signal, thereby generating an RF output signal. The power combiner receives the RF output signal from each control IC to generate a test signal. The signal analyzer receives the test signal and obtains RF properties corresponding to at least one of the power and the phase of each RF output signal.
    Type: Grant
    Filed: November 15, 2022
    Date of Patent: June 11, 2024
    Assignee: Ohmplus Technology Inc.
    Inventors: Hsi-Tseng Chou, Chih-Wei Chiu, Zhao-He Lin, Jake Waldvogel Liu
  • Patent number: 12009345
    Abstract: An embodiment is method including forming a first die package over a carrier substrate, the first die package comprising a first die, forming a first redistribution layer over and coupled to the first die, the first redistribution layer including one or more metal layers disposed in one or more dielectric layers, adhering a second die over the redistribution layer, laminating a first dielectric material over the second die and the first redistribution layer, forming first vias through the first dielectric material to the second die and forming second vias through the first dielectric material to the first redistribution layer, and forming a second redistribution layer over the first dielectric material and over and coupled to the first vias and the second vias.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Meng-Tse Chen, Chung-Shi Liu, Chih-Wei Lin, Hui-Min Huang, Hsuan-Ting Kuo, Ming-Da Cheng
  • Patent number: 12009322
    Abstract: A package structure includes a semiconductor device, a molding compound, a first dielectric layer, and a through-via. The molding compound is in contact with a sidewall of the semiconductor device. The first dielectric layer is over the molding compound and the semiconductor device. The through-via is in the molding compound and the first dielectric layer. The through-via is a continuous element and in contact with the first dielectric layer.
    Type: Grant
    Filed: February 13, 2022
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Hsuan Tai, Ting-Ting Kuo, Yu-Chih Huang, Chih-Wei Lin, Hsiu-Jen Lin, Chih-Hua Chen, Ming-Da Cheng, Ching-Hua Hsieh, Hao-Yi Tsai, Chung-Shi Liu
  • Patent number: 12005091
    Abstract: The present invention discloses a method for maintaining or improving gastrointestinal condition, which includes: administering a lactic acid bacterial composition to a subject in need thereof, wherein the lactic acid bacterial composition comprises: a Lactobacillus paracasei ET-66 strain with a deposition number CGMCC 13514. The present invention also discloses a method for maintaining or improving gastrointestinal condition, which includes: administering a lactic acid bacterial fermentation composition to a subject in need thereof, wherein the lactic acid bacterial fermentation composition comprises: a fermentation product of a Lactobacillus paracasei ET-66 strain.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: June 11, 2024
    Assignee: GLAC BIOTECH CO., LTD
    Inventors: Hsieh-Hsun Ho, Wen-Yang Lin, Jui-Fen Chen, Yi-Wei Kuo, Jia-Hung Lin, Chi-Huei Lin, Ching-Wei Chen, Yu-Fen Huang
  • Publication number: 20240181568
    Abstract: A method for producing graphene, configured for forming a graphene layer on a surface of an object. The method includes steps of: depositing a poly-p-xylene material layer on the surface: and converting the poly-p-xylene material layer into a graphene layer by using a laser sintering process or a plasma-assisted sintering process.
    Type: Application
    Filed: March 3, 2023
    Publication date: June 6, 2024
    Inventors: Yun-Wei TSAI, Hsien-Yeh CHEN, Shu-Man HU, Chin-Yun LEE, Yi-Chang WU, Yen-Hsun LIN, Kuo-Wei TSAO, Chi-Liang TSAI
  • Publication number: 20240184341
    Abstract: A keyboard device for an electronic device includes a keyboard main body and a protection plate member. The protection plate member is pivotally coupled to the keyboard main body. Consequently, the keyboard main body is covered by the protection plate member, or a first angle is formed between the protection plate member and the keyboard main body. The protection plate member includes a first plate and a second plate. The keyboard main body is pivotally coupled to a first end of the first plate. The second plate is pivotally coupled to a second end of the first plate. After the protection plate member is rotated relative to the keyboard main body and the first angle is formed between the protection plate member and the keyboard main body, the protection plate member is further adjusted to a selected usage mode.
    Type: Application
    Filed: February 6, 2023
    Publication date: June 6, 2024
    Inventors: Shao-Wei Yang, Chin-Lung Chan, Yi-Hsien Lin
  • Publication number: 20240184195
    Abstract: In a method of manufacturing a photo mask, a resist layer is formed over a mask blank, which includes a mask substrate, a phase shift layer disposed on the mask substrate and a light blocking layer disposed on the phase shift layer. A resist pattern is formed by using a lithographic operation. The light blocking layer is patterned by using the resist pattern as an etching mask. The phase shift layer is patterned by using the patterned light blocking layer as an etching mask. A border region of the mask substrate is covered with an etching hard cover, while a pattern region of the mask substrate is opened. The patterned light blocking layer in the pattern region is patterned through the opening of the etching hard cover. A photo-etching operation is performed on the pattern region to remove residues of the light blocking layer.
    Type: Application
    Filed: January 12, 2024
    Publication date: June 6, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chieh TIEN, Cheng-Hsuen CHIANG, Chih-Ming CHEN, Cheng-Ming LIN, Yen-Wei HUANG, Hao-Ming CHANG, Kuo-Chin LIN, Kuan-Shien LEE
  • Publication number: 20240180075
    Abstract: The present invention provides an electric tool comprising a body, an operating component, an output shaft, and a stop mechanism. An arresting disc is disposed on the output shaft, and a groove is formed on the arresting disc; the stop mechanism comprises a protrusion, for example, a pin, which is operable so that the protrusion extends to insert into the groove to lock the output shaft. A stop mechanism of the present invention is easy to operate, delivers good safety performance, and has a relatively simple structure, which allows convenient production and subsequent maintenance. Further, a stop mechanism of the present invention automatically springs back to a non-stop position at which it detaches from the output shaft or the transmission gear of the transmission mechanism when the external force is lost, which prevents possible damage to the output shaft or transmission mechanism when a user starts the electric tool before releasing the stop mechanism.
    Type: Application
    Filed: December 6, 2023
    Publication date: June 6, 2024
    Inventors: Miles Andrew Hsu, Tyler Wilson Boyles, Eduardo Olvera, Nicholas Proby, Andrew Maclay Schmidt, Lin Qiang Lin, Wei Wei An, Kar Tat Wong, Adis Sabic
  • Publication number: 20240186320
    Abstract: In some embodiments, the present disclosure relates to a semiconductor device comprising a source and drain region arranged within a substrate. A conductive gate is disposed over a doped region of the substrate. A gate dielectric layer is disposed between the source region and the drain region and separates the conductive gate from the doped region. A bottommost surface of the gate dielectric layer is below a topmost surface of the substrate. First and second sidewall spacers are arranged along first and second sides of the conductive gate, respectively. An inner portion of the first sidewall spacer and an inner portion of the second sidewall spacer respectively cover a first and second top surface of the gate dielectric layer. A drain extension region and a source extension region respectively separate the drain region and the source region from the gate dielectric layer.
    Type: Application
    Filed: February 14, 2024
    Publication date: June 6, 2024
    Inventors: Yi-Huan Chen, Chien-Chih Chou, Ta-Wei Lin, Hsiao-Chin Tuan, Alexander Kalnitsky, Kong-Beng Thei, Shi-Chuang Hsiao, Yu-Hong Kuo
  • Publication number: 20240183082
    Abstract: A method for manufacturing an elastic fiber and the elastic fiber are provided. The method includes: providing a thermoplastic polyester elastomer; drying the thermoplastic polyester elastomer; melting the thermoplastic polyester elastomer by an extruder to form a melt; extruding the melt by a spinneret plate to form a plurality of filamentous streams; feeding the filamentous streams into a spinning channel for cooling and curing to form a plurality of monofilaments; and bundling and oiling the monofilaments by an oil wheel, after extending and guiding the monofilaments by a first godet roller and a second godet roller, and winding the monofilaments by a winder to obtain a thermoplastic polyester elastic fiber.
    Type: Application
    Filed: October 27, 2023
    Publication date: June 6, 2024
    Inventors: CHIH-YI LIN, KUO-KUANG CHENG, LI-YUAN CHEN, CHI-WEI CHANG, CHIA-CHUN YANG
  • Publication number: 20240184047
    Abstract: Embodiments herein relate to a chip comprising: a silicon substrate, a first waveguide that includes silicon and nitrogen, and a second waveguide that includes silicon. A portion of the first waveguide may overlap a portion of the second waveguide. An oxide layer may be coupled with a face of the silicon substrate. A first portion of the oxide layer between the silicon substrate and the first waveguide may have a thickness that is greater than a thickness of a second portion of the oxide layer that is between the second waveguide and the oxide layer. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: November 28, 2023
    Publication date: June 6, 2024
    Inventors: Tiehui Su, Boris M. Vulovic, Wei Qian, Kelly Magruder, Pegah Seddighian, Wenhua Lin, Harel Frish, Nutan Gautam
  • Publication number: 20240186238
    Abstract: An interfacial layer is provided that binds a hydrophilic interlayer dielectric to a hydrophobic gap-filling dielectric. The hydrophobic gap-filling dielectric extends over and fill gaps between devices in an array of devices disposed between two metal interconnect layers over a semiconductor substrate and is the product of a flowable CVD process. The interfacial layer provides a hydrophilic upper surface to which the interlayer dielectric adheres. Optionally, the interfacial layer is also the product of a flowable CVD process. Alternatively, the interfacial layer may be silicon nitride or another dielectric that is hydrophilic. The interfacial layer may have a wafer contact angle (WCA) intermediate between a WCA of the hydrophobic dielectric and a WCA of the interlayer dielectric.
    Type: Application
    Filed: January 3, 2024
    Publication date: June 6, 2024
    Inventors: Hsing-Lien Lin, Chin-Wei Liang, Hsun-Chung Kuang, Ching Ju Yang
  • Publication number: 20240184051
    Abstract: Embodiments herein may relate to an optical coupler that includes a silicon substrate and a silicon nitride waveguide positioned on the silicon substrate. The silicon nitride waveguide may be configured to guide an optical signal along a first axis. The optical coupler may further include a silicon waveguide positioned on the silicon substrate. The silicon waveguide may be configured to receive, from an output end of the silicon nitride waveguide, the optical signal at an input end of the silicon waveguide and guide the optical signal along a second axis that is at a first angle to the first axis. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: November 28, 2023
    Publication date: June 6, 2024
    Inventors: Tiehui Su, Boris M. Vulovic, Wei Qian, Kelly Magruder, Pegah Seddighian, Wenhua Lin, Harel Frish, Nutan Gautam