Patents by Inventor Wei Lin

Wei Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220022316
    Abstract: A package carrier includes a build-up circuit structure, a first insulation protective layer, a plurality of connection pads, and a plurality of metal balls. The build-up circuit structure has an upper surface. The first insulation protective layer is disposed on the upper surface of the build-up circuit structure and has a plurality of first openings. The connection pads are respectively disposed in the first openings of the first insulation protective layer and are structurally and electrically connected to the build-up circuit structure. Each of the connection pads has an arc-shaped groove. The metal balls are respectively disposed in the arc-shaped groove of the connection pads. The metal balls and the corresponding connection pads define a plurality of bump structures, and a plurality of top surfaces of the bump structures are on a same plane.
    Type: Application
    Filed: August 19, 2020
    Publication date: January 20, 2022
    Applicant: Unimicron Technology Corp.
    Inventors: Po-Wei Chen, Wei-Ti Lin, Chun-Hsien Chien
  • Publication number: 20220020646
    Abstract: A method of performing epitaxial growth of a source and drain on levels of a complementary field effect transistor (CFET) is provided. The method includes depositing a first blocking material in a vertical channel of an unfinished CFET structure, oxidizing silicon at a surface of an upper level of the CFET to provide one or more SiO2 protective layers, etching away a portion of silicon from a lower level of the CFET to form a lateral recess that is exposed to the vertical channel, and performing silicon epitaxial growth in the lower level of the unfinished CFET structure. Further, after the silicon epitaxial growth on the lower level, the method includes depositing a second blocking material in the vertical channel to cover at least a portion of the silicon epitaxial growth in the lower level, removing the SiO2 protective layer, and performing epitaxial growth on the upper level.
    Type: Application
    Filed: July 9, 2021
    Publication date: January 20, 2022
    Applicant: Synopsys, Inc.
    Inventors: Xi-Wei LIN, Victor MOROZ
  • Publication number: 20220020647
    Abstract: A method of forming a complementary field effect transistor (CFET) is provided. The method includes adding a blocking material to a vertical channel of the CFET having an epitaxial growth, the blocking material being located below and in contact with a lower portion of the growth, adding an insulating material to an open area within the vertical channel to surround a portion of the epitaxial growth, performing an etch to (i) remove a portion of the insulating material, (ii) expose a contact surface of the epitaxial growth and (iii) provide a vertical opening within the vertical channel, the etch leaving a portion of the blocking material, and filling in the vertical opening with a conductive material, the conductive material reaching the exposed contact surface of the epitaxial growth, the blocking material remaining below the conductive material to prevent contact between the conductive material and a silicon substrate below the growth.
    Type: Application
    Filed: July 9, 2021
    Publication date: January 20, 2022
    Applicant: Synopsys, Inc.
    Inventors: Xi-Wei Lin, Victor Moroz
  • Publication number: 20220020595
    Abstract: A technique for semiconductor manufacturing is provided. The technique includes the operations as follows. A semiconductor structure having a first material and a second material is revived. The first material has a first incubation time to a first etching chemistry. The second material has a second incubation time to the first etching chemistry. The first incubation time is shorter than the second incubation time. A first main etch to the semiconductor structure for a first duration by the first etching chemistry is performed. The first duration is greater than the first incubation time and shorter than the second incubation time.
    Type: Application
    Filed: January 20, 2021
    Publication date: January 20, 2022
    Inventors: HAN-YU LIN, LI-TE LIN, TZE-CHUNG LIN, FANG-WEI LEE, YI-LUN CHEN, JUNG-HAO CHANG, YI-CHEN LO, FO-JU LIN, KENICHI SANO, PINYEN LIN
  • Publication number: 20220021830
    Abstract: An optical sensing device, including a first power rail, a second power rail, and a plurality of optical sensing elements arranged in an array, is provided. Each optical sensing element can include a photo diode, a reset switch, and a buffer. The reset switch can have a control terminal to receive a reset signal. A first terminal of the reset switch can be coupled to the first power rail and a second terminal of the reset switch is coupled to the photo diode. A first terminal of the buffer can be coupled to the second power rail, a second terminal of the buffer can be coupled to the second terminal of the reset switch and the photo diode, and a third terminal of the buffer is configured to provide a sensing signal. The second power rail is separate or independent from the first power rail.
    Type: Application
    Filed: July 20, 2020
    Publication date: January 20, 2022
    Applicant: Novatek Microelectronics Corp.
    Inventors: Kuo Wei Cheng, Jen-Yi Lin, Jung-Chen Chung
  • Publication number: 20220020573
    Abstract: A radio frequency (RF) screen for a microwave powered ultraviolet (UV) lamp system is disclosed. In one example, a disclosed RF screen includes: a sheet comprising a conductive material; and a frame around edges of the sheet. The conductive material defines a predetermined mesh pattern of individual openings across substantially an operative area of the screen. Each of the individual openings has a triangular shape.
    Type: Application
    Filed: July 15, 2020
    Publication date: January 20, 2022
    Inventors: Sheng-chun YANG, Po-Wei LIANG, Chao-Hung WAN, Yi-Ming LIN, Liu Che KANG
  • Publication number: 20220019473
    Abstract: The present disclosure provides an apparatus and method for positioning, and particularly, for data processing resource allocation positioning. The method includes determining a current system state of a system and allocating data processing resources of a data processing device based on the current system state. The system state may be determined based on operation conditions of positioning sensors of the system. The system state may correspond to one or more lifespan parameters. The method may enable allocation of limited computing resources to sensor data analysis models corresponding to positioning sensors in good operation conditions. Therefore, positioning can be performed accurately and efficiently.
    Type: Application
    Filed: June 28, 2021
    Publication date: January 20, 2022
    Applicant: UISEE TECHNOLOGIES (BEIJING) CO., LTD
    Inventors: Wei Feng, Wei Lin, Yu Zhang, Lei Shi, Xiaotong LIU
  • Publication number: 20220020191
    Abstract: The present application provides a method and a computer program product for image style transfer. The method uses an AI algorithm based on convolution to extract the content representation of a content image and the style representation of a style image, and generate a new image according to the extracted content representation and style representation. This new image not only has both the features of the content image and the features of the style image, but it also more aesthetically pleasing than the images generated by the commonly known methods do.
    Type: Application
    Filed: May 5, 2021
    Publication date: January 20, 2022
    Inventors: Shih-Hao LIN, Chao-Kuang YANG, Liang-Chi CHEN, Shu-Wei YEH
  • Publication number: 20220019487
    Abstract: A host system compiles a set of local programs which are provided over a network to a plurality of subsystems. By defining the synchronisation activity on the host, and then providing that information to the subsystems, the host can service a large number of subsystems. The defined synchronisation activity includes defining the synchronisation groups between which synchronisation barriers occur and the points during program execution at which data exchange with the host occurs. Defining synchronisation activity between the subsystems allows a large number of subsystems to be connecting whilst minimising the required exchanges with the host.
    Type: Application
    Filed: June 4, 2021
    Publication date: January 20, 2022
    Inventors: Ola TORUDBAKKEN, Wei-Lin GUAY
  • Patent number: 11227272
    Abstract: A business method of providing trade and data and analyzing suggestion to product and service platform includes following steps: a step of providing at least one vending machine, wherein a cash flow for a payment is processed by a consumer via the vending machine, and the vending machine provides a logistic flow of supplying product to the buyer; a step of listing at least one supplier; a step of establishing at least one payment mode means; a step of establishing at least one platform; and a step of establishing at least one data analysis; accordingly, the buyer and the supplier can both be provided with the product and the purchase payment in a safe means, the supplier can be prevented from wasting the product via a product data analysis or suggestion, so that the platform and the supplier can both have benefits and share the financial gains.
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: January 18, 2022
    Assignee: EZ PLATFORM
    Inventors: Wen-Hsin Chen, Jack Tseng, Hai-Wei Lin
  • Patent number: 11227794
    Abstract: A multi-layer interconnect structure with a self-aligning barrier structure and a method for fabricating the same is disclosed. For example, the method includes forming a via through an interlayer dielectric (ILD) layer, an etch stop layer (ESL), and a contact structure, pre-cleaning the via with a metal halide, forming a barrier structure on the contact structure in-situ during the pre-cleaning of the via with the metal halide, and depositing a second metal in the via on top of the barrier structure.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: January 18, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Sung-Li Wang, Shuen-Shin Liang, Yu-Yun Peng, Fang-Wei Lee, Chia-Hung Chu, Mrunal Abhijith Khaderbad, Keng-Chu Lin
  • Patent number: 11226363
    Abstract: A chip reliability testing method includes mounting a first test chip on a test board, wherein the first test chip comprises a silicon device having a plurality of metallization layers configured to establish a plurality of test circuits, a conductive redistribution layer contacting at least one of the plurality of metallization layers, and contact pads on exposed portions of the conductive redistribution layer. The mounting includes bonding the contact pads of the first test chip to corresponding contact pads of the test board. The method further includes applying a test voltage to a first contact pad connected to a first test circuit of the plurality of test circuits and, while maintaining the test voltage, subjecting the first test circuit to a reliability test. The method further includes monitoring an output voltage at a second contact pad connected to the first test circuit during a test period during the reliability test.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: January 18, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shiang-Ruei Su, Liang-Chen Lin, Chia-Wei Tu
  • Patent number: 11224766
    Abstract: A neutron capture therapy system and a target for a particle beam generating device, which may improve the heat dissipation performance of the target, reduce blistering and extend the service life of the target. The neutron capture therapy system includes a neutron generating device and a beam shaping assembly. The neutron generating device includes an accelerator and a target, and a charged particle beam generated by acceleration of the accelerator interacts with the target to generate a neutron beam. The target includes an acting layer, a backing layer and a heat dissipating layer, the acting layer interacts with the charged particle beam to generate the neutron beam, the base layer supports the action layer, and the heat dissipating layer includes a tubular member composed of tubes arranged side by side.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: January 18, 2022
    Assignee: NEUBORON MEDTECH LTD.
    Inventors: Yuan-Hao Liu, Wei-Lin Chen
  • Patent number: 11224967
    Abstract: A user location in a parking lot or other designated area may be identified based on sensor data, such as from one or more sensors in or around the designated area. Also within the designated area, a transport location of a transport associated with an order of the user may be identified based on image data provided by one or more cameras remote from the transport. The transport can be controlled to move from the identified transport location to the identified user location.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: January 18, 2022
    Assignee: Amazon Technologies, Inc.
    Inventors: Sheng-Wei Lin, Todd Beckett, Jon Robert Ducrou, Alexander Edwards, Ryan David Hapgood, Michael John Neville, Jenna Christine Owens, Lev Zelenskiy
  • Patent number: 11226494
    Abstract: A wearable device and an electrical connector with magnetic attraction are provided. The wearable device includes a first body and a second body. The first body has a first pivotal structure and two inner walls respectively provided with a first magnetic attraction member and a plurality of first terminal structures. The second body has a second pivotal structure, and is provided with a second magnetic attraction member and a plurality of second terminal structures. When the second pivotal structure is pivotally connected to the first pivotal structure, the second body is rotatable relative to the first body, and the first and second magnetic attraction members are moved by following the first and second bodies. When the first and second magnetic attraction members are magnetically attracted to each other so as to fix the first body and the second body, the first terminal structures contact the second terminal structures.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: January 18, 2022
    Assignee: C.C.P.CONTACT PROBES CO., LTD.
    Inventors: Yen-Wei Lin, Bor-Chen Tsai
  • Patent number: 11227133
    Abstract: The present invention provides a product label with a colorimetric sensor array and a code, and the system and the method of the present invention are mainly that the product label is attached to a fresh food, so that at least one sensing material of the colorimetric sensor array undergoes a chemical reaction with at least one metabolic molecule of the fresh food to change from an initial color to an indicating color. The present invention, by obtaining an image comprising an appearance, the code and the indicating color of the fresh food through an image acquisition device, also provides an instant information associated with the fresh food by a processing device according to a comparison result of the image and a database.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: January 18, 2022
    Assignee: TAIWAN CARBON NANO TECHNOLOGY CORPORATION
    Inventors: Ching-Tung Hsu, Chao-Chieh Lin, Yuan-Shin Huang, Chun-Wei Shih, Chia-Hung Li, Chun-Hsien Tsai, Chun-Jung Tsai
  • Patent number: 11226506
    Abstract: In some embodiments, the present disclosure relates to a modulator device that includes an input terminal configured to receive impingent light. A first waveguide has a first output region and a first input region that is coupled to the input terminal. A second waveguide is optically coupled to the first waveguide and has second input region and a second output region that is coupled to the input terminal. An output terminal coupled to the first output region of the first waveguide and the second output region of the second waveguide is configured to provide outgoing light that is modulated. A heater structure is configured to provide heat to the first waveguide to induce a temperature difference between the first and second waveguides. A gas-filled isolation structure is proximate to the heater structure and is configured to thermally isolate the second waveguide from the heat provided to the first waveguide.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: January 18, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Wei Lin, Ming Chyi Liu
  • Patent number: 11227940
    Abstract: A method of forming a semiconductor device includes removing a dummy gate from over a semiconductor fin; depositing a glue layer and a fill metal over the semiconductor fin; and simultaneously etching the glue layer and the fill metal with a wet etching solution, the wet etching solution etching the glue layer at a faster rate than the fill metal and reshaping the fill metal.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: January 18, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jian-Jou Lian, Chun-Neng Lin, Ming-Hsi Yeh, Chieh-Wei Chen, Tzu-Ang Chiang
  • Patent number: 11226857
    Abstract: When the inspection unit corresponding to at least one disabled layer of a multilayer system is unavailable, a fault-eliminating device defines the at least one disabled layer and a target layer as a combined layer. The fault dependency of the target layer is the lowest among the fault dependency of the at least one available layer. The inspection unit of the at least one available layer is active and the fault dependency thereof is higher than the disabled layer. Then, the device makes the inspection unit and the fault symptom corresponding to the target layer correspond to the combined layer, so as to update a list of layers and a fault model. After that, the device determines a source of a fault from the layers according to the list of layers and the fault model, and performs a strategy of fault elimination corresponding to the source, to eliminate the fault.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: January 18, 2022
    Assignee: NATIONAL CENTRAL UNIVERSITY
    Inventors: Deron Liang, Yen-Lin Lee, Wei-Jen Wang
  • Patent number: 11227747
    Abstract: The present disclosure describes an exemplary etch process in a reactor that includes a shower head and an electrostatic chuck configured to receive a radio frequency (RF) power. The shower head includes a top plate and a bottom plate with one or more gas channels that receive incoming gases. The method can include (i) rotating the top plate or the bottom plate of the shower head to a first position to allow a gas to flow through the shower head; (ii) performing a surface modification cycle that includes: applying a negative direct current (DC) bias voltage to the shower head, applying an RF power signal to the wafer chuck; and (iii) performing an etching cycle that includes: removing the negative DC bias voltage from the shower head and lowering the RF power signal applied to the wafer chuck.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: January 18, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Chi Lin, Yi-Wei Chiu, Hung-Jui Chang, Chin-Hsing Lin, Yu Lun Ke