Patents by Inventor Wei Ming
Wei Ming has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11953120Abstract: A champagne tower-type multi-stage throttle control valve includes a valve body, a valve cover, a throttle sleeve, and a valve core. A sleeve cavity of the throttle sleeve is shaped as a stepped hole with two or more layers. The valve core is shaped as a stepped shaft with two or more layers coaxial with the throttle sleeve. The number of shaft shoulders of the valve core is smaller than or equal to the number of hole shoulders of the sleeve cavity of the throttle sleeve, such that each set of shaft shoulders of the valve core in an axial direction can form a sealing surface fit with corresponding hole shoulders of the throttle sleeve. A flow channel groove is axially or obliquely formed on each of the hole shoulders of the throttle sleeve and/or the shaft shoulders of the valve core.Type: GrantFiled: March 11, 2021Date of Patent: April 9, 2024Assignee: HEFEI GENERAL MACHINERY RESEARCH INSTITUTE CO., LTDInventors: Wei Wang, Fengguan Chen, You Ming, Hongbing Yu, Shengtao Geng, Xiaojie Ye, Qin Wang
-
Patent number: 11954117Abstract: Techniques are described herein for routing queries to particular nodes of a multi-node database system based on the query. A database table is partitioned into a plurality of affinity groups. Each affinity group is assigned a particular node as the master node of the affinity group. A mapping is sent to a query router indicating the master node for each affinity group of the plurality of affinity groups. The query router determines, for a particular query, a target node to which to send the particular query based on the mapping and the particular query.Type: GrantFiled: December 18, 2017Date of Patent: April 9, 2024Assignee: ORACLE INTERNATIONAL CORPORATIONInventors: Juan R. Loaiza, Wei-Ming Hu, Mark Dilman, Leonid Novak
-
Publication number: 20240113034Abstract: A method for forming a semiconductor package is provided. The method includes forming a first alignment mark in a first substrate of a first wafer and forming a first bonding structure over the first substrate. The method also includes forming a second bonding structure over a second substrate of a second wafer and trimming the second substrate, so that a first width of the first substrate is greater than a second width of the second substrate. The method further includes attaching the second wafer to the first wafer via the first bonding structure and the second bonding structure, thinning the second wafer until a through-substrate via in the second substrate is exposed, and performing a photolithography process on the second wafer using the first alignment mark.Type: ApplicationFiled: February 8, 2023Publication date: April 4, 2024Inventors: Yu-Hung LIN, Wei-Ming WANG, Chih-Hao YU, PaoTai HUANG, Pei-Hsuan LO, Shih-Peng TAI
-
Publication number: 20240112707Abstract: A dynamic random access memory applied to an embedded display port includes a memory core unit, a peripheral circuit unit, and an input/output unit. The memory core unit is used for operating in a first predetermined voltage. The peripheral circuit unit is electrically connected to the memory core unit for operating in a second predetermined voltage, where the second predetermined voltage is lower than 1.1V. The input/output unit is electrically connected to the memory core unit and the peripheral circuit unit for operating in a third predetermined voltage, where the third predetermined voltage is lower than 1.1V.Type: ApplicationFiled: December 15, 2023Publication date: April 4, 2024Applicant: Etron Technology, IncInventors: Der-Min Yuan, Yen-An Chang, Wei-Ming Huang
-
Publication number: 20240111256Abstract: A machine learning model that uses composite metrology data determines at least one parameter of a device under test using measured metrology data from the device. The composite metrology data is generated by merging measured metrology data from a reference device with synthetic metrology data calculated from a model of the reference device. The composite metrology data may be generated further based on a synthetic metrology data calculated from a model for a modified reference device. The modified reference device may be generated using variations of at least one parameter of the model to expand the parameter space of the training range.Type: ApplicationFiled: June 22, 2023Publication date: April 4, 2024Applicant: Onto Innovation Inc.Inventors: Haodong Qiu, Zhuo Chen, Wei Ming Chiew, Jie Li, Jingsheng Shi, Shashank Srivastava
-
Patent number: 11945004Abstract: A semiconductor manufacturing equipment cleaning system has a multi-station cleaning and inspection system. Within semiconductor manufacturing equipment cleaning system, a tray cleaning station uses a first rotating brush passing over a first surface of a carrier and possibly semiconductor die, and a second rotating brush passing over a second surface of the carrier and semiconductor die opposite the first surface of the carrier and semiconductor die. Debris and contaminants dislodged from the first surface and second surface of the carrier by the first rotating brush and second rotating brush are removed under vacuum suction. A conveyor transports the carrier through the multi-station cleaning and inspection system. The first rotating brush and second rotating brush move in tandem across the first surface and second surface of the carrier. Air pressure is injected across the first rotating brush and second rotating brush to further remove debris and contaminants.Type: GrantFiled: November 11, 2021Date of Patent: April 2, 2024Assignee: UTAC Headquarters Pte. Ltd.Inventors: Hua Hong Tan, Wing Keung Lam, Zong Xiang Cai, Wei Ming Xian, Yao Hong Wu, Tao Hu
-
Patent number: 11944412Abstract: A blood pressure detection device manufactured by a semiconductor process includes a substrate, a microelectromechanical element, a gas-pressure-sensing element, a driving-chip element, an encapsulation layer and a valve layer. The substrate includes inlet apertures. The microelectromechanical element and the gas-pressure-sensing element are stacked and integrally formed on the substrate. The encapsulation layer is encapsulated and positioned on the substrate. A flowing-channel space is formed above the microelectromechanical element and the gas-pressure-sensing element. The encapsulation layer includes an outlet aperture in communication with an airbag. The driving-chip element controls the microelectromechanical element, the gas-pressure-sensing element and valve units to transport gas.Type: GrantFiled: June 2, 2021Date of Patent: April 2, 2024Assignee: MICROJET TECHNOLOGY CO., LTD.Inventors: Hao-Jan Mou, Ying-Lun Chang, Ching-Sung Lin, Chi-Feng Huang, Yung-Lung Han, Chang-Yen Tsai, Wei-Ming Lee, Chun-Yi Kuo, Tsung-I Lin
-
Patent number: 11944935Abstract: A gas detection purification device is disclosed and includes a main body, a purification unit, a gas guider, a gas detection module and a controlling-driving module. The main body includes an inlet, an outlet, an external socket and a gas-flow channel disposed between the inlet and the outlet. The purification unit is disposed in the gas-flow channel for filtering gas introduced through the gas-flow channel. The gas guider is disposed in the gas channel and located at a side of the purification unit. The gas is inhaled through the inlet, flows through the purification unit and is discharged out through the outlet. The gas detection module is plugged into or detached from the external socket. The controlling driving module is disposed within the main body and electrically connected to the gas guider to control the operation of the gas guider in an enabled state and a disabled state.Type: GrantFiled: December 2, 2020Date of Patent: April 2, 2024Assignee: MICROJET TECHNOLOGY CO., LTD.Inventors: Hao-Jan Mou, Yung-Lung Han, Chi-Feng Huang, Chang-Yen Tsai, Wei-Ming Lee, Tsung-I Lin
-
Patent number: 11950491Abstract: A semiconductor mixed material comprises an electron donor, a first electron acceptor and a second electron acceptor. The first electron donor is a conjugated polymer. The energy gap of the first electron acceptor is less than 1.4 eV. At least one of the molecular stackability, ?-?*stackability, and crystallinity of the second electron acceptor is smaller than the first electron acceptor. The electron donor system is configured to be a matrix to blend the first electron acceptor and the second electron acceptor. The present invention also provides an organic electronic device including the semiconductor mixed material.Type: GrantFiled: November 17, 2020Date of Patent: April 2, 2024Assignee: RAYNERGY TEK INCORPORATIONInventors: Yi-Ming Chang, Chuang-Yi Liao, Wei-Long Li, Yu-Tang Hsiao, Chun-Chieh Lee, Chia-Hua Li, Huei-Shuan Tan
-
Patent number: 11949002Abstract: In an embodiment, a method includes: forming a fin extending from a substrate, the fin having a first width and a first height after the forming; forming a dummy gate stack over a channel region of the fin; growing an epitaxial source/drain in the fin adjacent the channel region; and after growing the epitaxial source/drain, replacing the dummy gate stack with a metal gate stack, the channel region of the fin having the first width and the first height before the replacing, the channel region of the fin having a second width and a second height after the replacing, the second width being less than the first width, the second height being less than the first height.Type: GrantFiled: June 13, 2022Date of Patent: April 2, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: I-Hsieh Wong, Yen-Ting Chen, Wei-Yang Lee, Feng-Cheng Yang, Yen-Ming Chen
-
Publication number: 20240107731Abstract: The present disclosure provides a matte-type electromagnetic interference shielding film including bio-based components, which includes a bio-based insulating layer, a bio-based adhesive layer, a metal layer, and a bio-based electrically conductive adhesive layer. The matte-type electromagnetic interference shielding film including the bio-based component of the present disclosure has a matte appearance and high bio-based content and has the advantages of good surface insulation, high surface hardness, good chemical resistance, high shielding performance, good adhesion strength, low transmission loss, high transmission quality, good operability, high heat resistance, and the inner electrically conductive adhesive layer with long shelf life and storage life. The present disclosure further provides a preparation method thereof.Type: ApplicationFiled: July 14, 2023Publication date: March 28, 2024Inventors: Bo-Sian DU, Wei-Chih LEE, Chia-Hua HO, Chih-Ming LIN, Chien-Hui LEE
-
Publication number: 20240107495Abstract: During operation, a computer system may provide instructions to access points in an indoor environment to measure relative distances between the access points. Then, the computer system may receive the measured relative distances. Moreover, the computer system may calculate geographic locations of the access points based at least in part on the measured relative distances. Next, the computer system may select potential anchor access points in the access points, and may provide, to an electronic device, information specifying the potential anchor access points. Furthermore, the computer system may receive, from the electronic device, second information specifying anchor access points in the potential access points and defined locations of the anchor access points. Additionally, the computer system may update the geographic locations based at least in part on the defined of the anchor access points, and may provide, to the access points, the updated geographic locations.Type: ApplicationFiled: September 19, 2023Publication date: March 28, 2024Applicant: ARRIS Enterprises LLCInventors: See Ho Ting, Cheng-Ming Chien, Kuan-Chih Chou, Lin Zeng, Chih-Ming Lam, Wei Xiang Ng, Arsalan Habib, Anand Krishnamachari
-
Publication number: 20240105454Abstract: A method for manufacturing a semiconductor device is described. The method includes the following steps. A low-dimensional material (LDM) layer is formed on a semiconductor substrate, wherein the LDM layer includes sublayers stacked upon one another. A plasma treatment is performed to the LDM layer to transform at least one sublayer into an oxide layer, wherein the plasma treatment is performed under a temperature equivalent to or lower than about 80 degrees Celsius. At least one electrode is disposed over the oxide layer.Type: ApplicationFiled: March 2, 2023Publication date: March 28, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tung-Ying Lee, Wei-Sheng Yun, Yi-Tse HUNG, Shao-Ming YU, Meng-Zhan Li
-
Patent number: 11940547Abstract: Systems and methods are provided for determining the quality of a civic address produced by a reverse geocoder, utilizing the uncertainty of a geodetic location and a distance between the geodetic location and a geocoded location (i.e., a civic address) determined by the reverse geocoder. Upon receiving a request by a PSAP for a civic address corresponding to a UE initiating a call for emergency services, a node initially identifies a geodetic location of the UE and an uncertainty of the geodetic location. The node initiates an API call to a reverse geocoder API. The node receives a geocoded location corresponding to the geodetic location and compares the geocoded location to the geodetic location to determine a distance between them. Based on the uncertainty of the geodetic location and the distance between the geodetic location and the geocoded location, a quality of the civic address is determined.Type: GrantFiled: April 24, 2023Date of Patent: March 26, 2024Assignee: T-MOBILE INNOVATIONS LLCInventor: Wei-Ming Lan
-
Patent number: 11941338Abstract: Integrated circuits (IC) are provided. An IC includes a plurality of macros and a top channel. Each macro includes a macro boundary and a main pattern surrounded by the macro boundary. The top channel includes a plurality of first and second sub-channels. Each first sub-channel is arranged between a first macro and a second macro, and is formed by a plurality of first dummy boundary cells. Each second sub-channel is arranged between two of the second macros, and is formed by a plurality of second dummy boundary cells. The macro boundaries of the first macros are formed by the first dummy boundary cells, and the macro boundaries of the second macros are formed by the second dummy boundary cells. A first gate length of dummy patterns within the first dummy boundary cells is greater than a second gate length of dummy patterns within the second dummy boundary cells.Type: GrantFiled: July 26, 2022Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Yi Hu, Chih-Ming Chao, Chi-Yeh Yu
-
Patent number: 11937903Abstract: A blood pressure device includes a first blood pressure measuring device, a second blood pressure measuring device, and a controller. The first blood pressure measuring device is to be worn on a first position of a wrist so as to obtain a first blood pressure information of the first position. The second blood pressure measuring device is to be worn on a second position of the wrist so as to obtain a second blood pressure information of the second position. The controller is electrically coupled to the first blood pressure measuring device and the second blood pressure measuring device so as to adjust tightness between the expanders and the user's skin, respectively. The controller receives, processes, and calculates a pulse transit time between the first blood pressure information and the second blood pressure information, and the controller obtains at least one blood pressure value based on the pulse transit time.Type: GrantFiled: December 29, 2020Date of Patent: March 26, 2024Assignee: MICROJET TECHNOLOGY CO., LTD.Inventors: Hao-Jan Mou, Yung-Lung Han, Chi-Feng Huang, Chang-Yen Tsai, Wei-Ming Lee, Chun-Yi Kuo, Chin-Wen Hsieh
-
Publication number: 20240095439Abstract: Disclosed are semiconductor devices having an interconnection pattern that includes a plurality of parallel conductors including a first conductor aligned with a first axis and a first dummy pattern aligned with a second axis on a first side of the first axis and offset from the first axis by an axis offset distance LAO in which the first dummy pattern includes N dummy conductors having a first dummy conductor length LDC with the dummy conductors being separated by a dummy conductor-to-dummy conductor spacing EED.Type: ApplicationFiled: December 1, 2023Publication date: March 21, 2024Inventors: Wei-Yi HU, Chih-Ming CHAO, Jung-Chou TSAI
-
Publication number: 20240097033Abstract: The present disclosure provides one embodiment of a method making semiconductor structure. The method includes forming a composite stress layer on a semiconductor substrate, wherein the forming of the composite stress layer includes forming a first stress layer of a dielectric material with a first compressive stress and forming a second stress layer of the dielectric material with a second compressive stress on the first stress layer, the second compressive stress being greater than the first compressive stress; and patterning the semiconductor substrate to form fin active regions using the composite stress layer as an etch mask.Type: ApplicationFiled: November 28, 2023Publication date: March 21, 2024Inventors: Wei-Jen LAI, Yen-Ming CHEN, Tsung-Lin LEE
-
Publication number: 20240095868Abstract: A watermark embedding method includes the following steps. The input video signal is received by a processing circuit. Grayscale information of a watermark signal is generated by the processing circuit according to a time series data and a predetermined plane. During a dark sate and a bright state in each of a plurality of consecutive periods, phases of the time series data are opposite and integral values of the grayscales of the predetermined plane are the same. The processing circuit embeds the watermark signal into the input video signal to generate an output video signal with the watermark information. The display panel displays an image according to the output video signal.Type: ApplicationFiled: December 28, 2022Publication date: March 21, 2024Inventors: Yang-En WU, Wen-Rei GUO, Wei-Ming CHENG, Chao-Wei LI
-
Publication number: 20240096830Abstract: A method includes forming a first sealing layer at a first edge region of a first wafer; and bonding the first wafer to a second wafer to form a wafer stack. At a time after the bonding, the first sealing layer is between the first edge region of the first wafer and a second edge region of the second wafer, with the first edge region and the second edge region comprising bevels. An edge trimming process is then performed on the wafer stack. After the edge trimming process, the second edge region of the second wafer is at least partially removed, and a portion of the first sealing layer is left as a part of the wafer stack. An interconnect structure is formed as a part of the second wafer. The interconnect structure includes redistribution lines electrically connected to integrated circuit devices in the second wafer.Type: ApplicationFiled: January 9, 2023Publication date: March 21, 2024Inventors: Yu-Yi Huang, Yu-Hung Lin, Wei-Ming Wang, Chen Chen, Shih-Peng Tai, Kuo-Chung Yee