Abstract: The present disclosure provides circuit structure configured to decrease a phase difference between a first signal and a second signal. The circuit structure includes substrate. The substrate includes a first conductive layer, a first woven dielectric layer, and a second woven dielectric layer. The first conductive layer is disposed over the substrate. The first conductive layer includes a circuit pattern configured to transmit the first signal and the second signal. The first woven dielectric layer is stacked below the first conductive layer. The first woven dielectric layer has a plurality of first opens. The second woven dielectric layer is stacked below the first woven dielectric layer. The second woven dielectric layer has a plurality of second opens. The plurality of first opens and the plurality of second opens are misaligned from a top view.

Abstract: A viral exposure signature (VES) that can identify early stage, pre-symptomatic hepatocellular carcinoma (HCC) among at-risk patients is described. The VES was developed using serological profiling and synthetic virome technology to identify unique viral peptide epitopes corresponding to 61 viral species. Methods of identifying a subject with early stage (pre-symptomatic) HCC using the VES are described.

Abstract: A method and an apparatus for determining a connection relation of subspaces, and a non-transitory computer-readable recording medium are provided. In the method, a plurality of sets of panoramic images respectively corresponding to two respective adjacent subspaces are obtained. Each set of the panoramic images includes two first panoramic images, and a second panoramic image photographed at a connection opening. Orientations of the connection openings are determined based on positions of the connection openings, and orientations of a camera. Relative positions of the two adjacent subspaces are determined based on correspondence relations between the two first panoramic images and parts of the respective second panoramic images. The connection relation of the subspaces is determined based on the connection relation determined based on the same subspace, the orientations of the connection openings, and the relative positions of the two adjacent subspaces.

Abstract: A semiconductor device includes substrate having a fin structure thereon, a gate structure overlying the fin structure, a polymer block at a corner between the gate structure and the fin structure, and a source/drain region on the fin structure. The polymer block includes a nitridation layer in proximity to a sidewall of the gate structure.

Abstract: A package structure including a circuit board and a heat generating element is provided. The circuit board includes a plurality of circuit layers and a composite material layer. A thermal conductivity of the composite material layer is between 450 W/mK and 700 W/mK. The heat generating element is disposed on the circuit board and electrically connected to the circuit layers. Heat generated by the heat generating element is transmitted to an external environment through the composite material layer.

Abstract: A method includes receiving an image by a deep neural network (DNN) and obtaining a first feature map based on the image while the DNN is in a trained state, wherein the DNN is configured to perform a task based on the image, and is trained with a training image by using a feature sparsification with smoothness regularization process and a back propagation and weight update process that updates the DNN based on an output of the feature sparsification with smoothness regularization process.

Abstract: A display panel, a display device and a display method. The display panel includes a first microlens array, a pixel island array and a second lens. The pixel island array is configured to display a plurality of sub-original images. The first microlens array is configured to converge light emitted from the plurality of sub-original images so as to obtain imaging light, and the imaging light is capable of forming a first virtual image. The second lens is on a user viewing side of the display panel relative to the first microlens array, and the second lens is configured to converge the imaging light so as to obtain a second virtual image. The first virtual image is a virtual image in which the plurality of sub-original images are stitched and enlarged, and the second virtual image is an enlarged virtual image of the first virtual image.

Abstract: A method, system, and computer program product for data reorganization and logs reorganization. The method includes receiving, by one or more processing units, original data. The method also includes classifying, by the one or more processing units, the original data into different types based on a trained type classification model. The method also includes generating, by the one or more processing units, at least one severity for at least part of the original data based on a trained severity classification model, the at least part of the original data corresponding to at least one type. The method also includes outputting, by the one or more processing units, at least one message, the at least one message indicating the severity of the at least part of the original data.

Abstract: The present application provides a data storage method, a data storage apparatus and a storage system, wherein the method includes: determining a data type of to-be-stored data when the to-be-stored data is obtained (S410); determining a target storage area with a data type same as that of the to-be-stored data based on the data type of data stored in each storage area in the SMR disk (S420); determining in the target storage area a target storage block into which the to-be-stored data is to be written (S430); generating the main index information and backup index information of the to-be-stored data based on the identifier of the target storage block (S440); generating the database index information of the to-be-stored data based on the to-be-stored data and the identifier of the target storage block (S450); and writing the to-be-stored data and the backup index information of the to-be-stored data into the target storage block, writing the main index information of the to-be-stored data into the CMR area or

Abstract: A joint link-level and network-level intelligent system and method for dynamic spectrum anti-jamming are provided. The system includes a link-level anti-jamming subsystem and a network-level anti-jamming subsystem. The link-level anti-jamming subsystem sets a reward value as system transmission throughput in a single decision cycle, and a user makes an intelligent frequency usage decision based on the obtained reward value to skip a frequency band in which jamming exists. The network-level anti-jamming subsystem performs reasonable frequency band allocation and management for lower-level sub-users when link-level anti-jamming fails to further enhance a frequency domain anti-jamming capability of the entire system. The users make intelligent frequency usage decisions through a dynamic spectrum anti-jamming algorithm based on reinforcement learning to effectively avoid external malicious jamming, realize dynamic spectrum access, and enhance a frequency domain anti-jamming capability of the system.

Abstract: A method of manufacturing a semiconductor device includes forming a fin, the fin having an epitaxial portion and a base portion protruding from a substrate. Sidewalls of the base portion are tapered with respect to sidewalls of the epitaxial portion. The method also includes depositing a polymeric material on the sidewalls of the epitaxial portion, performing an etching process to modify a profile of the sidewalls of the base portion, such that the sidewalls of the base portion are laterally recessed with a narrowest width of the base portion located under a top surface of the base portion, removing the polymeric material from the sidewalls of the epitaxial portion, depositing an isolation feature on the sidewalls of the base portion, and forming a gate structure engaging the epitaxial portion.

Abstract: The present invention provides a processor including a core circuit, a plurality of clock signal generation circuits, a multiplexer and a detection circuit is disclosed. The core circuit is supplied by a supply voltage. The plurality of clock signal generation circuits are configured to generate a plurality of clock signals with different frequencies, respectively, wherein a number of the plurality of clock signals is equal to or greater than three. The multiplexer is configured to receive the plurality of clock signals, and to select one of the plurality of clock signals to serve as an output clock signal according to a control signal, wherein the core circuit uses the output clock signal to serve as an operating clock. The detection circuit is configured to detect a level of the supply voltage received by the core circuit in a real-time manner, to generate the control signal.

Abstract: A transparent displaying base plate and a transparent displaying device. The transparent displaying base plate includes a displaying layer (2) and a liquid-crystal grating layer (3) provided on one side of the displaying layer (2), the displaying layer (2) includes black matrixes (15) and displaying regions (A) defined by the black matrixes (15), the liquid-crystal grating layer (3) is provided with a backlight unit on one side that is further away from the displaying layer (2), and the backlight unit includes a backlight layer for exiting backlight light rays to the displaying layer (2), and at least a light focusing layer for focusing the backlight light rays directly facing the positions of the displaying regions (A) to the black matrixes (15).

Abstract: A method for using an integrated battery and device structure includes using two or more stacked electrochemical cells integrated with each other formed overlying a surface of a substrate. The two or more stacked electrochemical cells include related two or more different electrochemistries with one or more devices formed using one or more sequential deposition processes. The one or more devices are integrated with the two or more stacked electrochemical cells to form the integrated battery and device structure as a unified structure overlying the surface of the substrate. The one or more stacked electrochemical cells and the one or more devices are integrated as the unified structure using the one or more sequential deposition processes. The integrated battery and device structure is configured such that the two or more stacked electrochemical cells and one or more devices are in electrical, chemical, and thermal conduction with each other.

Abstract: Spherical grains and sacrificial particles are mixed in a suspension. The sacrificial particles are larger than the spherical grains. The suspension is injected into a channel in a microfluidic chip, and the spherical grains form microporous structures in the channel. The microporous structures are sintered in the channel. A solvent is injected into the channel, and the solvent dissolves the sacrificial particles and forms macropores between at least some of the microporous structures, thereby forming a mixed-porosity microfluidic chip.

Abstract: An optical device and a spectral detection apparatus are provided. The optical device includes an optical waveguide, including: a polychromatic light channel configured to transport a polychromatic light beam, and provided with a light incident surface for receiving the incident polychromatic light beam at an input end of the polychromatic light channel; a chromatic dispersion device arranged downstream from the polychromatic light channel in an optical path and configured to separate the polychromatic light beam from the polychromatic light channel into a plurality of monochromatic light beams; and a plurality of monochromatic light channels arranged downstream from the chromatic dispersion device in the optical path and configured to respectively conduct the plurality of monochromatic light beams with different colors from the chromatic dispersion device.

Abstract: A query string for an encrypted database storing a plurality of encrypted data records is received from a requestor. The query string is segmented to obtain at least one word. The at least one word is encrypted with the irreversible encryption algorithm to obtain at least one encrypted word. At least one first encrypted item with a co-occurrence weight higher than a preset threshold based on the at least one encrypted word and a co-occurrence statistics model is acquired. The co-occurrence statistics model is built to provide co-occurrence weights, each indicating a probability that the at least one encrypted word appears in a first encrypted data item of the plurality of encrypted data records. At least one second encrypted data item corresponding to the at least one first encrypted data item is acquired from the plurality of encrypted data records.

Abstract: A semiconductor device package includes a semiconductor device with a ball grid array having a first subset of solder balls composed of metallic solder, and a second subset of solder balls composed of a composite material that includes a polymer core surrounded by a solder layer. The solder balls of the second subset can have a lower elastic modulus than the solder balls of the first subset and resist cracking due to thermal stresses on the semiconductor device package. In one embodiment, at least a portion of the second subset of solder balls is located on the periphery of the ball grid array such that the first subset of solder balls may be surrounded, at least partially, by the second subset of solder balls.

Abstract: A digital signal modulation method for a photon artificial intelligence computing chip, including: modulating one or more groups of digital electrical signals into optical signals; where the group of digital electrical signals comprises several timing signals being outputted in sequence in a channel within a fixed period; where each timing signal has the same base clock and signal time length; where each timing signal conveying N-bit digital information has 2N?1 base clocks, the number of the base clocks of a high-level signal or the number of a digital signal “1” in the timing signal is a signal value of the timing signal, and the signal value is equal to a value of the N-bit digital information being transmitted; and where the timing signal is a modulating signal for converting the electrical signal to the optical signal.

Abstract: Methods, apparatus, computer program products for resource scheduling are provided. The method comprises: receiving a workload request; publishing the information of the workload to a workload billboard accessible to a plurality of computer hosts, each of the plurality of computer hosts being associated with a corresponding proxy configured to manage the resource scheduling of the computer host; receiving a request to schedule at least a portion of the workload from a proxy; and sending the portion of the workload to the computer host associated with the proxy.