Patents by Inventor Wei Yan

Wei Yan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136297
    Abstract: A multi-chip interconnection package structure with a heat dissipation plate and a preparation method thereof are provided. The multi-chip interconnection package structure with a heat dissipation plate includes a fine circuit layer, at least one die, a heat dissipation plate, a plastic package body, and a package circuit layer, the heat dissipation plate is provided on the fine circuit layer, and is mounted on a side of the die away from the fine circuit layer, the plastic package body wraps the die and the heat dissipation plate, and the package circuit layer is provided on the plastic package body.
    Type: Application
    Filed: February 22, 2023
    Publication date: April 25, 2024
    Applicant: Institute of Semiconductors, Guangdong Academy of Sciences
    Inventors: Yingqiang YAN, Chuan HU, Yao WANG, Wei ZHENG, Zhitao CHEN
  • Publication number: 20240138148
    Abstract: A method of forming a three-dimensional (3D) NAND memory device includes: forming a gate line slit through alternating layers of an oxide layer and a conductive material layer, wherein the conductive material layer is further formed on a sidewall and a bottom of the gate line slit; performing a first etch process to remove portions of the conductive material layer from the sidewall and the bottom of the gate line slit and from between adjacent oxide layers, thereby exposing portions of the oxide layer in the gate line slit; removing the exposed portions of the oxide layer on the sidewall of the gate line slit; and performing a second etch process to remove residues of the conductive material layer in the gate line slit.
    Type: Application
    Filed: October 23, 2022
    Publication date: April 25, 2024
    Inventors: Longxiang YAN, Wei XU, Lei XUE, Zongliang HUO
  • Publication number: 20240132905
    Abstract: The present disclosure provides use of sweetpotato IbSAP15 gene in regulating leaf shape and flower shape of sweetpotato. Compared with the control, Ipomoea batatas cv. Xuzishu 8, IbSAP15-overexpressing lines have more deeply incised blades, dehiscent corollas, and higher ornamental value. In the present disclosure, overexpression of the sweetpotato IbSAP15 gene in sweetpotato can deepen leaf incisions, make trumpet-shaped corollas dehiscent, and change leaf shape and flower shape of sweetpotato. The present disclosure is suitable for developing sweetpotato germplasms with different leaf shape and flower shape and promotes ornamental flowering/foliage sweetpotato breeding.
    Type: Application
    Filed: November 17, 2022
    Publication date: April 25, 2024
    Applicant: XUZHOU INSTITUTE OF AGRICULTURAL SCIENCES
    Inventors: Yaju LIU, Hao XIE, Qiang LI, Yungang ZHANG, Hui YAN, Meng KOU, Wei TANG, Xin WANG, Qiangqiang YANG, Xiaoxiao WANG, Ranqiu LI
  • Publication number: 20240130362
    Abstract: A composite solution for enhancing induced disease resistance of lentinan (LNT) to a plant, a preparation method of the composite solution, and a method for enhancing induced disease resistance of LNT to a plant are provided. The composite solution for enhancing induced disease resistance of LNT to a plant includes: an LNT-containing solution and an SPc-containing solution, where SPc is a dendritic macromolecule functionalized by an amino functional group, and has a structural formula shown in formula I, where n=1 to 100. An LNT/SPc complex is produced in the composite solution. SPc spontaneously combines with LNT through hydrogen bonding, such that an agglomerate structure formed by LNT in an aqueous solution is broken and reduced to a nano-scale particle size, and a spherical particle is produced, which can significantly reduce a contact angle of the LNT aqueous solution, and promote the distribution and diffusion of LNT.
    Type: Application
    Filed: August 15, 2023
    Publication date: April 25, 2024
    Applicants: KUNMING CO YUNNAN TOBACCO CO, China Agricultural University
    Inventors: Yonghui XIE, Dekai NING, Zhijiang WANG, Shuo YAN, Wei LI, Jie SHEN, Zhengling LIU, Qinhong JIANG, Youguo ZHAN, Yuanshen WANG, Cun GUO, Sihao WU, Haohao LI
  • Patent number: 11968800
    Abstract: A centrifugal heat dissipation fan including a housing and an impeller is provided. The housing has at least one inlet disposed along an axis and at least one first outlet and a second outlet located in different radial directions, wherein the first outlet and the second outlet are opposite to and separated from each other. The impeller is disposed in the housing along the axis. A heat dissipation system of an electronic device is also provided.
    Type: Grant
    Filed: May 23, 2023
    Date of Patent: April 23, 2024
    Assignee: Acer Incorporated
    Inventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Kuang-Hua Lin, Sheng-Yan Chen
  • Patent number: 11968856
    Abstract: Exemplary subpixel structures include a directional light-emitting diode structure characterized by a full-width-half-maximum (FWHM) of emitted light having a divergence angle of less than or about 10°. The subpixel structure further includes a lens positioned a first distance from the light-emitting diode structure, where the lens is shaped to focus the emitted light from the light-emitting diode structure. The subpixel structure still further includes a patterned light absorption barrier positioned a second distance from the lens. The patterned light absorption barrier defines an opening in the barrier, and the focal point of the light focused by the lens is positioned within the opening. The subpixels structures may be incorporated into a pixel structure, and pixel structures may be incorporated into a display that is free of a polarizer layer.
    Type: Grant
    Filed: October 4, 2021
    Date of Patent: April 23, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Chung-Chih Wu, Po-Jui Chen, Hoang Yan Lin, Guo-Dong Su, Wei-Kai Lee, Chi-Jui Chang, Wan-Yu Lin, Byung Sung Kwak, Robert Jan Visser
  • Patent number: 11968906
    Abstract: A method for fabricating a semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a contact hole in the first IMD layer; forming a bottom electrode layer in the contact hole; forming a magnetic tunneling junction (MTJ) stack on the bottom electrode layer; and removing the MTJ stack and the bottom electrode layer to form a MTJ on a bottom electrode. Preferably, the bottom electrode protrudes above a top surface of the first IMD layer.
    Type: Grant
    Filed: May 25, 2020
    Date of Patent: April 23, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Jin-Yan Chiou, Wei-Chuan Tsai, Hsin-Fu Huang, Yen-Tsai Yi, Hsiang-Wen Ke
  • Publication number: 20240129509
    Abstract: A method for decoding a video block in GPM includes: partitioning the video block into two geometric partitions; constructing a uni-directional motion victor (MV) candidate list by adding regular merge candidates; in response to determining that the candidate list is not full, constructing a first updated candidate list by adding additional uni-directional MVs derived from bi-prediction MVs of a regular merge candidate list to the candidate list; in response to determining that the first updated candidate list is not full, constructing a second updated candidate list by adding pairwise average candidates to the first updated candidate list; in response to determining that the second updated candidate list is not full, periodically adding zero uni-directional MVs to the second updated candidate list until a maximum length is reached; and respectively generating a uni-directional MV for each geometric partition.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: BEIJING DAJIA INTERNET INFORMATION TECHNOLOGY CO., LTD.
    Inventors: Xiaoyu XIU, Wei CHEN, Che-Wei KUO, Hong-Jheng JHU, Ning YAN, Yi-Wen CHEN, Xianglin WANG, Bing YU
  • Publication number: 20240129519
    Abstract: Implementations of the disclosure provide systems and methods for motion refinement in a video. The method may include determining an initial motion vector for a video block of a video frame from the video. The method may include determining a matching target based on a weighted combination of a first reference block from a first reference frame in the video and a second reference block from a second reference frame in the video. The method may include performing a bilateral matching based motion refinement process at a block level to iteratively update the initial motion vector based on the matching target until a refined motion vector is obtained. The method may include refining a motion vector for each sub-block in the video block using the refined motion vector of the video block. Refining the motion vector at a sub-block level applies an affine motion model of the video block.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 18, 2024
    Applicant: BEIJING DAJIA INTERNET INFORMATION TECHNOLOGY CO., LTD.
    Inventors: Wei CHEN, Xiaoyu Xiu, Che-Wei KUO, Yi-Wen Chen, Hong-Jheng Jhu, Ning YAN, Xianglin Wang, Bing Yu
  • Publication number: 20240128142
    Abstract: The present application discloses a double-sided SiP packaging structure and a manufacturing method thereof, wherein the double-sided SiP packaging structure comprises a substrate, a first packaging structure arranged on the substrate, and a second packaging structure arranged below the substrate; the second packaging structure comprises a chip, interposer and a molding material; a conductive structure array is arranged on an upper surface of the interposer; the interposer is arranged below the substrate through the conductive structure array; a space region among a lower surface of the substrate, the chip and the interposer is filled with the molding material; a conductive bonding pad array is arranged on the lower surface of the interposer; and a groove is formed in a part of region between the conductive bonding pad and an edge contour of the interposer.
    Type: Application
    Filed: October 12, 2023
    Publication date: April 18, 2024
    Applicant: JCET GROUP CO., LTD.
    Inventors: Shuo Liu, Yaojian Lin, Jianyong Wu, Wei Yan, Jing Zhao
  • Patent number: 11962527
    Abstract: A communications apparatus includes a processor configured to generate a radio frame. The radio frame comprises a data block. The data block comprises a plurality of N pilot blocks, a plurality of M sub-data blocks, and one guard interval (GI). Every two N pilot blocks of the plurality of N pilot blocks are not adjacent. The GI is located at a tail end of the data block, 4?N?8, N is an integer, M?N?1, and M is an integer. The communications apparatus also includes transceiver configured to send the radio frame to a receiver.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: April 16, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Min Yan, Guangjian Wang, Wei Lin, Mengyao Ma, Yanchun Li
  • Patent number: 11963356
    Abstract: Embodiments of structure and methods for forming a three-dimensional (3D) memory device are provided. In an example, a 3D memory device includes a stack structure including a memory block including a plurality of memory cells. The 3D memory device also includes a first top select structure and a bottom select structure in the memory block and aligned with each other vertically; and a second top select structure in the memory block is separated from the first top select structure by at least one of the plurality of memory cells. The first top select structure, the bottom select structure, and the second top select structure each includes an insulating material.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: April 16, 2024
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Zongliang Huo, Haohao Yang, Wei Xu, Ping Yan, Pan Huang, Wenbin Zhou
  • Patent number: 11961442
    Abstract: A shift register unit, a driving method, a drive circuit, and a display apparatus are disclosed. The shift register unit includes: a control circuit, which is configured to adjust signals of a first node and a second node according to an input signal end, a first control signal end, a second control signal end and a first reference signal end; a cascade circuit, which is configured to provide, according to the signal of the first node, a signal of a first cascade clock signal end to a cascade output end; and an output circuit, which is configured to provide, according to the signal of the first node, a signal of a control clock signal end to a drive output end, and provide, according to the signal of the second node, a signal of a second reference signal end to the drive output end.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: April 16, 2024
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Wei Yan, Wenwen Qin, Yue Shan, Deshuai Wang, Jiguo Wang, Zhen Wang, Xiaoyan Yang, Han Zhang, Jian Zhang, Yadong Zhang, Jian Sun
  • Publication number: 20240122047
    Abstract: A display substrate includes an underlaying substrate, a display structure layer arranged on the underlaying substrate, and a light regulation layer arranged at a light exiting side of the display structure layer. The display structure layer includes multiple sub-pixels. An orthographic projection of the light regulation layer on the underlaying substrate does not overlap with opening regions of the multiple sub-pixels. The light regulation layer is configured to adjust an emergent direction of light of at least one color emitted from the display structure layer.
    Type: Application
    Filed: March 22, 2021
    Publication date: April 11, 2024
    Inventors: Wanmei QING, Baiqiang WANG, Chao KONG, Wei ZHANG, Lingjun DAI, Tiancheng YU, Zhen SUN, Zidi YAN
  • Publication number: 20240116909
    Abstract: Compounds of general Formula I, II, III, IV, V and their pharmaceutically acceptable salts, that may be useful as inductors of type I interferon production, specifically as STING active agents, are provided. Also provided are synthesis, compositions, and uses of such compounds.
    Type: Application
    Filed: March 29, 2022
    Publication date: April 11, 2024
    Inventors: Yang YE, Xiuwei LI, Guiqun YANG, Fashun YAN, Yanping WANG, Wei LONG
  • Patent number: 11956994
    Abstract: The present disclosure is generally related to 3D imaging capable OLED displays. A light field display comprises an array of 3D light field pixels, each of which comprises an array of corrugated OLED pixels, a metasurface layer disposed adjacent to the array of 3D light field pixels, and a plurality of median layers disposed between the metasurface layer and the corrugated OLED pixels. Each of the corrugated OLED pixels comprises primary or non-primary color subpixels, and produces a different view of an image through the median layers to the metasurface to form a 3D image. The corrugated OLED pixels combined with a cavity effect reduce a divergence of emitted light to enable effective beam direction manipulation by the metasurface. The metasurface having a higher refractive index and a smaller filling factor enables the deflection and direction of the emitted light from the corrugated OLED pixels to be well controlled.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: April 9, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Chung-Chih Wu, Hoang Yan Lin, Guo-Dong Su, Zih-Rou Cyue, Li-Yu Yu, Wei-Kai Lee, Guan-Yu Chen, Chung-Chia Chen, Wan-Yu Lin, Gang Yu, Byung-Sung Kwak, Robert Jan Visser, Chi-Jui Chang
  • Publication number: 20240113519
    Abstract: A method and a device for forecasting an electric load, an electronic device, and a computer-readable storage medium are provided. The method includes: acquiring historical load data prior to a forecast date; generating a load sequence based on the historical load data; performing variational mode decomposition on the load sequence, to obtain multiple intrinsic mode components and a residual that are corresponding to the load sequence; and inputting the multiple intrinsic mode components and the residual into respective forecasting models, and determining a load value on the forecast date based on forecasting results of all the forecasting models. With the method and the device, the electronic device, and the computer-readable storage medium, the load sequence is decomposed based on the variational mode decomposition, so that more dimensional feature information in the load sequence can be mined. Moreover, the residual is also used as valid data.
    Type: Application
    Filed: September 6, 2023
    Publication date: April 4, 2024
    Applicant: Shanghai Makesens Energy Storage Technology Co., Ltd.
    Inventors: Decheng WANG, Peng DING, Weikun WU, Haowen REN, Yuan FENG, Wei SONG, Guopeng ZHOU, Zonglin CAI, Xiao YAN, Enhai ZHAO
  • Publication number: 20240114080
    Abstract: A content delivery network (CDN) edge node scheduling method includes receiving, by a scheduling proxy server, a first request message from a terminal device, determining, based on a first Internet Protocol (IP) address and configuration information, a target CDN scheduling center corresponding to the first IP address, sending a second request message to the target CDN scheduling center when the target CDN scheduling center supports proxy scheduling setting, receiving the second IP address from the target CDN scheduling center, and sending a request response message to the terminal device to obtain delivery content from the target CDN edge node based on the second IP address.
    Type: Application
    Filed: December 15, 2023
    Publication date: April 4, 2024
    Inventors: Wei Yan, Wei Wang
  • Publication number: 20240110965
    Abstract: The present application discloses an insulation sampling circuit. The insulation sampling circuit includes: a first sampling circuit composed of a first sampling module, a first resistor, and a first switch module; a second sampling circuit composed of a second sampling module, a second resistor, and a second switch module; and a voltage withstand module. The first resistor is connected in parallel to the first sampling module; the first switch module is configured to control the first sampling module and/or the first resistor to be connected between a positive bus and a ground wire; the second resistor is connected in parallel to the second sampling module; the second switch module is configured to control the second sampling module and/or the second resistor to be connected between a negative bus and the ground wire; and the voltage withstand module is disposed on the ground wire to disconnect the ground wire.
    Type: Application
    Filed: December 4, 2023
    Publication date: April 4, 2024
    Inventors: Xingchang WANG, Wei TIAN, Zhiwei YAN, Hang MA, Fangyou LU
  • Patent number: 11950075
    Abstract: The present disclosure discloses a sounding device including a frame, a magnetic circuit system with a magnetic part and a vibration system. The vibration system includes a diaphragm fixed to the frame, a voice coil driving the diaphragm to vibrate and arranged around the magnetic part, and a metal shrapnel with conductive function. One end of the metal shrapnel is fixed to the frame and electrically connected to an external circuit, and the other end of the metal shrapnel is fixed to the voice coil and electrically connected to the lead wire of the voice coil. The metal shrapnel restrains a movement of the voice coil in a direction perpendicular to a vibration direction of the diaphragm. Compared with the related art, the sounding device disclosed by the present disclosure can reduce the number of elements to simplify the product structure.
    Type: Grant
    Filed: December 31, 2021
    Date of Patent: April 2, 2024
    Assignee: AAC Microtech (Changzhou) Co., Ltd.
    Inventors: Pengfei Zhang, Wei Liu, Xudong Yan