Patents by Inventor Wei Yen
Wei Yen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250118657Abstract: A method includes forming a first complementary Field-Effect Transistor (CFET) and a second CFET. The first CFET includes a first lower transistor, and a first upper transistor overlapping the first lower transistor. The second CFET includes a second lower transistor, and a second upper transistor overlapping the second lower transistor. The method further includes performing a first etching process to form a first opening, wherein the first etching process includes etching a first gate stack between the first upper transistor and the second upper transistor, and etching a second gate stack between the first lower transistor and the second lower transistor. The first opening is filled with a dielectric material to form a dielectric region. The method further includes performing a second etching process to etch a middle portion of the dielectric region and to form a second opening, and filling the second opening with a conductive material to form a through-via.Type: ApplicationFiled: October 6, 2023Publication date: April 10, 2025Inventors: Wei-Xiang You, Jui-Chien Huang, Chun-Yen Lin, Szuya Liao
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Publication number: 20250119654Abstract: This disclosure provides systems, methods, and devices for image processing that support enhanced white balancing operations. In a first aspect, a method of image processing includes receiving first image data obtained at a first aperture; determining a first output image frame based on the first image data by applying a first white balancing to at least a portion of the first image data; receiving second image data obtained at a second aperture; and determining a second output image frame based on the second image data by applying a second white balancing based on the first aperture and the second aperture to at least a portion of the second image data. The second white balancing may be based on a first compensation factor based on the first aperture and the second aperture used to adjust the first white balancing. Other aspects and features are also claimed and described.Type: ApplicationFiled: March 25, 2022Publication date: April 10, 2025Inventors: Yi-Chun Hsu, Tai-Hsiang Jen, Zhi Qin, Tsung-yen Chen, Wei-Chih Liu
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Patent number: 12270847Abstract: An antenna test system includes a box body, a supporting device, at least one probe device, a signal measuring device, and a moving device. The box body has at least an operation side configured to be opened to allow access to devices inside the box body. The supporting device is disposed in the box body and the antenna circuit to be tested is arranged thereon. The probe device is disposed in the box body and configured to apply an antenna testing signal to the antenna circuit to emit an antenna working signal. The signal measuring device is disposed in the box body to receive the antenna working signal emitted from the antenna circuit. The moving device is disposed in the box body and configured to carry the signal measuring device to maneuver in three directions of X-axis, Y-axis, and Z-axis to receive the antenna working signal in different positions.Type: GrantFiled: May 10, 2023Date of Patent: April 8, 2025Assignee: QuantumZ Inc.Inventors: Meng-Hua Tsai, Wei-Ting Lee, Chun-Yen Wang, Wei-Cheng Lin
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Publication number: 20250107721Abstract: A pulse pressure measuring apparatus including a plurality of pressing elements, a plurality of pressure sensors, and a processing unit is provided. The pressing elements are used to press the site to be measured, and each pressing element has a position coordinate Pi (i=1, 2, 3 . . . ). The pressure sensors are configured to respectively measure pressure on the pressing elements to generate measured values of pressure intensity Ii (i=1, 2, 3 . . . ) at the position coordinates Pi (i=1, 2, 3 . . . ). The processing unit utilizes the position coordinates Pi (i=1, 2, 3 . . . ) and the measured values of pressure intensity Ii (i=1, 2, 3 . . . ) to determine the blood vessel locus.Type: ApplicationFiled: March 28, 2024Publication date: April 3, 2025Applicant: GUANGZHOU LUXVISIONS INNOVATION TECHNOLOGY LIMITEDInventors: Chih-Ju Lin, Shih-Chieh Yen, Yi-Wei Liu, Wei-Han Wu
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Publication number: 20250112221Abstract: Provided are a precursor solution, and a modified layer and a lithium-based battery prepared by using the same. The modified layer is formed on the negative electrode, the positive electrode and/or the separator of the lithium-based battery by using the precursor solution through photo-polymerization reaction or thermal curing. The lithium-based battery comprising the modified layer effectively promotes the charge and discharge capability, cycling life, and safety. The modified layer can be applied to a roll-to-roll process. The formation of lithium dendrites in the lithium-based battery comprising the modified layer is significantly suppressed or reduced during the charge-discharge cycles. The shuttle effect is effectively suppressed or reduced in lithium sulfur batteries and lithium iodine batteries. All the above effects are beneficial to increasing the product value of lithium ion batteries, lithium metal batteries, anode-free lithium batteries, lithium sulfur batteries, and lithium iodine batteries.Type: ApplicationFiled: December 12, 2024Publication date: April 3, 2025Applicant: National Tsing Hua UniversityInventors: Chi-Chang HU, Chih-Han YEN, Li-Qian WANG, Chen-Wei TAI, Hao-Yu KU
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Publication number: 20250112001Abstract: A keycap lifting mechanism increases the stability of supporting a keycap through structure designs of supports. For example, a pivot of two supports overlaps base holes of the supports along the pivot axis. For another example, each of supports has support arms extending non-parallel to the pivot axis. The free end of each support arm is connected to a base plate. For another example, among a plurality of pivotally-connecting structures between supports, at least one includes a fully-open pivot hole, achieved by two opposite hooks, and at least one includes a semi-open pivot hole, achieved by two opposite hooks and a blind hole. A long rectangular keyswitch structure includes a keycap and any of the above mechanisms. The distance from a sliding hole of one support to an adjacent keycap long side is greater than the distance from a holder hole of another support to another adjacent keycap long side.Type: ApplicationFiled: September 25, 2024Publication date: April 3, 2025Applicant: DARFON ELECTRONICS CORP.Inventors: Chih-Chung Yen, Po-Wei Tsai, Hsun-Kun Peng, Po-Min Huang
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Publication number: 20250108475Abstract: A method includes providing a wafer including a layer; performing a surface treatment to the layer; polishing the layer using a polishing pad; determining whether a surface roughness or a thickness of the layer reaches a pre-determined condition; and stopping polishing the layer when the surface roughness or the thickness of the layer reaches the pre-determined condition.Type: ApplicationFiled: January 19, 2024Publication date: April 3, 2025Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jin-Hao JHANG, James June Fan HSU, Wei-Yen WOON
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Publication number: 20250112002Abstract: A keycap lifting mechanism increases the stability of supporting a keycap through structure designs of supports. For example, vertical projections of a sliding hole, a holder hole, and a base hole of supports overlap in a short side direction. For another example, vertical projections of a sliding hole, a holder hole, and a pivot hole of supports overlap in the short side direction. For another example, within the coverage range of a dome hole formed by supports in a long side direction, the supports do not have a structure connecting with other components. For another example, within the coverage range of two arms on opposite sides of the dome hole, there are more than 8 connection portions on the supports for connecting with a keycap and a base plate. For another example, the width of the arm is 0.8 to 2 times the length of the arm.Type: ApplicationFiled: September 25, 2024Publication date: April 3, 2025Applicant: DARFON ELECTRONICS CORP.Inventors: Chih-Chung Yen, Po-Wei Tsai, Hsun-Kun Peng, Po-Min Huang
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Publication number: 20250112050Abstract: A method includes providing a wafer including a layer; projecting a beam for a surface treatment on the layer to form a material-modified portion at a top of the layer, wherein the material-modified portion is spaced apart from a bottom surface of the layer; and polishing, by using a polishing pad, the material-modified portion of the layer.Type: ApplicationFiled: September 28, 2023Publication date: April 3, 2025Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jin-Hao JHANG, Wei-Yen WOON, Szuya LIAO
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Publication number: 20250112088Abstract: A semiconductor structure is provided. The semiconductor structure includes a first low dielectric constant (low-k) layer, a first metal layer, a metal cap layer, a dielectric on dielectric (DoD) layer, an etch stop layer (ESL), a second low-k layer, a metal via and a second metal layer. The dielectric constant of the first low-k layer is less than 4. The first metal layer is embodied in the first low-k layer. The first low-k layer exposes the first metal layer. The metal cap layer is disposed on the first metal layer. The DoD layer is disposed on the first low-k layer. The etch stop layer is disposed on the metal cap layer and the DoD layer. The second low-k layer is disposed above the etch stop layer. The metal via is embodied in the second low-k layer and connected to the first metal layer.Type: ApplicationFiled: September 28, 2023Publication date: April 3, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Chin LEE, Yen Ju WU, Shao-Kuan LEE, Kuang-Wei YANG, Hsin-Yen HUANG, Jing Ting SU, Kai-Fang CHENG, Hsiao-Kang CHANG, Wei-Chen CHU, Shu-Yun KU, Chia-Tien WU, Ming-Han LEE, Hsin-Ping CHEN
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Patent number: 12264102Abstract: A method for producing photocatalytic mortar includes providing a mortar-producing material including a fine aggregate and cement, a reactant mixture including a zinc source and urea, and a microorganism-containing mixture including water and a urease-producing microorganism, subjecting the microorganism-containing mixture and the reactant mixture to microbial induced precipitation in the mortar-producing material, subjecting zinc carbonate crystal-containing mortar produced to curing for the same to undergo hydration, and subjecting cured mortar to hydrothermal synthesis, so that zinc carbonate crystals therein are converted to nano zinc oxide crystals.Type: GrantFiled: March 29, 2022Date of Patent: April 1, 2025Assignee: NATIONAL CHUNG CHENG UNIVERSITYInventors: Chien-Yen Chen, Yi-Hsun Huang, Pin-Yun Lin, Wei-Fan Ye
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Publication number: 20250104903Abstract: An improved integrated coil structure includes an iron core body and first, second, third, and fourth coils. The iron core body includes first and second wire-winding portions. The iron core body is provided with first and second flanges respectively at two sides thereof and a third flange arranged between the first and second flanges. First and second electrodes are arranged on the first flange. Third and fourth electrodes are arranged on the second flange. Fifth, sixth, and seventh electrodes are arranged on the third flange. Two terminals of the first coil are electrically connected with the first and fifth electrodes. Two terminals of the second coil are electrically connected with the second and seventh electrodes. Two terminals of the third coil are electrically connected with the third and sixth electrodes. Two terminals of the fourth coil are electrically connected with the fourth and seventh electrodes.Type: ApplicationFiled: September 25, 2023Publication date: March 27, 2025Inventors: Ming-Yen Hsieh, Pao-Lin Shen, Hsiang-Chung Yang, Wei-Hsuan Lo
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Publication number: 20250102621Abstract: In a radar sensor, a transmitting antenna is configured to radiate a transmitted RF signal, a receiving antenna is configured to receive a reflected RF signal from a target, and a frontend circuit is configured to calculate the distance between the target and the radar sensor by measuring the frequency shift between the transmitted RF signal and the reflected RF signal. The frontend circuit includes a crystal-less signal synthesizer configured to generate the transmitted RF signal without using a crystal, and a mixer configured to provide an IF-band signal associated with the frequency shift between the transmitted RF signal and the reflected RF signal by mixing the reflected RF signal and the transmitted RF signal.Type: ApplicationFiled: April 8, 2024Publication date: March 27, 2025Applicant: KaiKuTek INC.Inventors: Mike Chun-Hung Wang, Yi-Chu Chen, Tun-Yen Liao, Yi-Ting Tseng, Wei-Chi Li
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Patent number: 12258470Abstract: The present disclosure provides for porous polymer materials that include an ordered array of voids separated by a polymer framework. The porous polymer material can have a recovery state where the voids are in an uncollapsed state and iridescent color, and a deformed state having voids in a collapsed state that is non-iridescent or substantially transparent. The materials can have regions of both states simultaneously. Also described are methods for fabricating a polymer material as above, as well as chromogenic sensors including the polymer material. The sensors can have hidden anti-counterfeiting patterns, hydrophobic/oleophobic properties, and chromogenic transformation can be triggered by various stimuli such as solid target compounds, light energy, and more.Type: GrantFiled: February 13, 2019Date of Patent: March 25, 2025Assignee: University of Florida Research Foundation, INC.Inventors: Peng Jiang, Ruochen Liu, Rao Fei, Wei Zhang, Sin-Yen Leo, Calen Leverant, Helena Jiang, Curtis Taylor, Yifan Zhang
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Publication number: 20250095908Abstract: The network transformer includes an iron core body, and first, second, and third winding assemblies. The iron core body has first and second winding sections. A first flange and a second flange are on both ends of the iron core body, and a third flange situated between the first and second flanges. The first winding section is positioned between the first and third flange s, while the second winding section is located between the second and third flanges. The first, second, and third flanges respectively have first, second, and third electrode sets. The two ends of the coils in the first winding assembly are electrically connected to the first electrode set. The second winding assembly has the two ends of the coils electrically connected to the third electrode set. The third winding assembly has the two ends of the coils electrically connected to the second and third electrode sets.Type: ApplicationFiled: September 14, 2023Publication date: March 20, 2025Inventors: Ming-Yen Hsieh, Pao-Lin Shen, Hsiang-Chung Yang, Wei-Hsuan Lo
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Publication number: 20250096203Abstract: A manufacturing method of a semiconductor package includes the following steps. A first lower semiconductor device and a second lower semiconductor device are provided. A plurality of first conductive pillars are formed on the first lower semiconductor device along a first direction parallel to a side of the first lower semiconductor device. A plurality of second conductive pillars are formed on the second lower semiconductor device along a second direction parallel to a side of the second lower semiconductor device, wherein the first direction is substantially collinear with the second direction. An upper semiconductor device is disposed on the first lower semiconductor device and the second lower semiconductor device and revealing a portion where the plurality of first conductive pillars and the plurality of second conductive pillars are disposed.Type: ApplicationFiled: November 7, 2024Publication date: March 20, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Kang Hsieh, Hung-Yi Kuo, Hao-Yi Tsai, Kuo-Lung Pan, Ting Hao Kuo, Yu-Chia Lai, Mao-Yen Chang, Po-Yuan Teng, Shu-Rong Chun
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Publication number: 20250095997Abstract: A method of forming a semiconductor device includes depositing a target metal layer in an opening. Depositing the target metal layer comprises performing a plurality of deposition cycles. An initial deposition cycle of the plurality of deposition cycles comprises: flowing a first precursor in the opening, flowing a second precursor in the opening after flowing the first precursor, and flowing a reactant in the opening. The first precursor attaches to upper surfaces in the opening, and the second precursor attaches to remaining surfaces in the opening. The first precursor does not react with the second precursor, and the reactant reacts with the second precursor at a greater rate than the reactant reacts with the first precursor.Type: ApplicationFiled: March 11, 2024Publication date: March 20, 2025Inventors: Kai-Chieh Yang, Kuan-Kan Hu, Wei-Yen Woon, Ku-Feng Yang, Szuya Liao
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Publication number: 20250096146Abstract: A semiconductor device includes a substrate having a plurality of chip regions. In some embodiments, the semiconductor device further includes a plurality of scribe lines interposing the plurality of chip regions. In some examples, the semiconductor device further includes a first plurality of alignment mark regions distributed within the plurality of scribe lines. In some embodiments, the semiconductor device further includes a second plurality of alignment mark regions distributed within each of the plurality of chip regions.Type: ApplicationFiled: January 24, 2024Publication date: March 20, 2025Inventors: Hao Chu Liao, Wei Tse Hsu, Chen-Yen Kao
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Publication number: 20250093721Abstract: An electronic device is provided. The electronic device includes a substrate, a thin-film transistor, a first organic layer, a conductive layer, a second organic layer and a photoresist element. The thin-film transistor is disposed on the substrate. The first organic layer is disposed on the thin-film transistor and has a through-hole. The conductive layer is disposed on the first organic layer and electrically connected to the thin-film transistor through the through-hole. The second organic layer includes a first portion and a second portion. The first portion of the second organic layer is disposed in the through-hole, and the second portion of the second organic layer covers at least a portion of a flat portion of an upper surface of the first organic layer. The photoresist element is disposed on the second organic layer.Type: ApplicationFiled: November 29, 2024Publication date: March 20, 2025Inventors: Ming-Jou TAI, Chia-Hao TSAI, Yi-Shiuan CHERNG, Wei-Yen CHIU
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Patent number: 12255392Abstract: A wideband antenna system includes a first metal radiation portion, having a coupling distance with a second metal radiation portion; a first feeding contact and a second feeding contact, electrically connected to the first metal radiation portion and the second metal radiation portion respectively, and close to the coupling distance; a first ground contact, electrically connected to the second metal radiation portion; a second ground contact, electrically connected to the first metal radiation portion; an impedance tuner, electrically connected to the first feeding contact, the second feeding contact, the first ground contact, the second ground contact, and a radio frequency signal source, to switch the first metal radiation portion and the second metal radiation portion; an aperture contact, electrically connected to the first metal radiation portion; and an aperture tuner, electrically connected to the aperture contact.Type: GrantFiled: March 9, 2023Date of Patent: March 18, 2025Assignee: ASUSTEK COMPUTER INC.Inventors: Chun-Chieh Su, Wei-Cheng Lo, Chien-Ming Hsu, Che-Yen Lin, Chuan-Chien Huang