Patents by Inventor Wei Yen

Wei Yen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942445
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate having a surface. The semiconductor device includes a conductive pad over a portion of the surface. The conductive pad has a curved top surface, and a width of the conductive pad increases toward the substrate. The semiconductor device includes a device over the conductive pad. The semiconductor device includes a solder layer between the device and the conductive pad. The solder layer covers the curved top surface of the conductive pad, and the conductive pad extends into the solder layer.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-En Yen, Chin-Wei Kang, Kai-Jun Zhan, Wen-Hsiung Lu, Cheng-Jen Lin, Ming-Da Cheng, Mirng-Ji Lii
  • Patent number: 11937903
    Abstract: A blood pressure device includes a first blood pressure measuring device, a second blood pressure measuring device, and a controller. The first blood pressure measuring device is to be worn on a first position of a wrist so as to obtain a first blood pressure information of the first position. The second blood pressure measuring device is to be worn on a second position of the wrist so as to obtain a second blood pressure information of the second position. The controller is electrically coupled to the first blood pressure measuring device and the second blood pressure measuring device so as to adjust tightness between the expanders and the user's skin, respectively. The controller receives, processes, and calculates a pulse transit time between the first blood pressure information and the second blood pressure information, and the controller obtains at least one blood pressure value based on the pulse transit time.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: March 26, 2024
    Assignee: MICROJET TECHNOLOGY CO., LTD.
    Inventors: Hao-Jan Mou, Yung-Lung Han, Chi-Feng Huang, Chang-Yen Tsai, Wei-Ming Lee, Chun-Yi Kuo, Chin-Wen Hsieh
  • Publication number: 20240093267
    Abstract: A high-throughput automated preprocessing method and a system are applied to a nucleic acid preprocessing apparatus including a control system, a sample transfer area, a nucleic acid extraction area, and a reagent setup area. The control system includes a user interface and guides a user to set up on the user interface. In the sample transfer area, the method includes steps of: a user selecting a sampling tube type, a test protocol and an extraction protocol on the user interface, and the control system performing a sample transfer task. In the nucleic acid extraction area, the method includes steps of: the control system performing a nucleic acid extraction task based on the selected extraction protocol. In the reagent setup area, the method includes steps of: the control system performing a reagent deployment task based on the selected test protocol, and the control system performing a nucleic acid transfer task.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 21, 2024
    Inventors: Wei-Te Hsieh, Chia-Yen Lin, Kuang-An Wang, Keng-Ting Liu, Shu-Hui Huang
  • Patent number: 11935957
    Abstract: Semiconductor device structures having gate structures with tunable threshold voltages are provided. Various geometries of device structure can be varied to tune the threshold voltages. In some examples, distances from tops of fins to tops of gate structures can be varied to tune threshold voltages. In some examples, distances from outermost sidewalls of gate structures to respective nearest sidewalls of nearest fins to the respective outermost sidewalls (which respective gate structure overlies the nearest fin) can be varied to tune threshold voltages.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Chiang Wu, Wei-Chin Lee, Shih-Hang Chiu, Chia-Ching Lee, Hsueh Wen Tsau, Cheng-Yen Tsai, Cheng-Lung Hung, Da-Yuan Lee, Ching-Hwanq Su
  • Patent number: 11934106
    Abstract: An optical proximity correction (OPC) device and method is provided. The OPC device includes an analysis unit, a reverse pattern addition unit, a first OPC unit, a second OPC unit and an output unit. The analysis unit is configured to analyze a defect pattern from a photomask layout. The reverse pattern addition unit is configured to provide a reverse pattern within the defect pattern. The first OPC unit is configured to perform a first OPC procedure on whole of the photomask layout. The second OPC unit is configured to perform a second OPC procedure on the defect pattern of the photomask layout to enhance an exposure tolerance window. The output unit is configured to output the photomask layout which is corrected.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: March 19, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shu-Yen Liu, Hui-Fang Kuo, Chian-Ting Huang, Wei-Cyuan Lo, Yung-Feng Cheng, Chung-Yi Chiu
  • Patent number: 11929273
    Abstract: A system and computer-implemented method are provided for manufacturing a semiconductor electronic device. An assembler receives a jig and a boat supporting a die. The assembler includes a separator that separates the jig into a first jig portion and a second jig portion and a loader that positions the boat between the first jig portion and the second jig portion. A robot receives an assembly prepared by the assembler and manipulates a locking system that fixes an alignment of the boat relative to the first jig portion and the second jig portion to form a locked assembly. A process chamber receives the locked assembly and subjects the locked assembly to a fabrication operation.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Tsung-Sheng Kuo, Chih-Hung Huang, Guan-Wei Huang, Ping-Yung Yen, Hsuan Lee, Jiun-Rong Pai
  • Patent number: 11927392
    Abstract: The present disclosure is directed to a wafer drying system and method that detects airborne molecular contaminants in a drying gas as a feedback parameter for a single wafer or multi-wafer drying process. For example, the system comprises a wafer drying station configured to dispense a drying gas over one or more wafers to dry the one or more wafers, a valve configured to divert the drying gas to a first portion and a second portion, and an exhaust line configured to exhaust the first portion of the drying gas. The system further comprises a detector configured to receive the second portion of the drying gas and to determine a real time property of the second portion of the drying gas, and a control unit configured to control a feedback operation of the wafer drying station based on the real time property of the second portion of the drying gas.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Chun Hsu, Sheng-Wei Wu, Shu-Yen Wang
  • Patent number: 11929196
    Abstract: A method of making a slow wave inductive structure includes depositing a first dielectric layer over a first substrate. The method further includes forming a first conductive winding in the first dielectric layer. The method further includes bonding a second substrate to the first dielectric layer, wherein the second substrate is physically separated from the first conductive winding, and the second substrate has a thickness ranging from about 50 nanometers (nm) to about 150 nm. The method further includes depositing a second dielectric layer over the second substrate. The method further includes forming a second conductive winding in the second dielectric layer, wherein the second substrate is physically separated from the second conductive winding.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiao-Tsung Yen, Cheng-Wei Luo
  • Patent number: 11923210
    Abstract: In an embodiment, a method includes: immersing a wafer in a bath within a cleaning chamber; removing the wafer out of the bath through a solvent and into a gas within the cleaning chamber; determining a parameter value from the gas; and performing remediation within the cleaning chamber in response to determining that the parameter value is beyond a threshold value.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Chun Hsu, Shu-Yen Wang, Chui-Ya Peng
  • Patent number: 11915936
    Abstract: A device includes a substrate, a gate structure over the substrate, gate spacers on opposite sidewalls of the gate structure, source/drain structures over the substrate and on opposite sides of the gate structure, and a self-assemble monolayer (SAM) in contact with an inner sidewall of one of the gate spacer and in contact with a top surface of the gate structure.
    Type: Grant
    Filed: January 11, 2023
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Wei Su, Fu-Ting Yen, Ting-Ting Chen, Teng-Chun Tsai
  • Patent number: 11916313
    Abstract: An appressed antenna includes an antenna housing and a metal shell. The antenna housing comprising a housing and a planar antenna, where the planar antenna is bent with one part folded onto the inner surface of the housing and other part pressed onto the outer surface of the housing. The antenna housing is sleeve fitted to the metal shell with a gap between for the planar antenna to radiate. In this all-metal environment, the position of the antenna is close to the gap opening will increase radiation efficiency. By having at least a branch at the tail end of the appressed antenna, the appressed antenna can have a good return loss and antenna gain.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: February 27, 2024
    Assignee: QuantumZ Inc.
    Inventors: Kun-Yen Tu, Meng-Hua Tsai, Wei-Ting Lee, Sin-Siang Wang
  • Patent number: 11913733
    Abstract: The present disclosure provides a heat transferring device and a heat transferring component thereof. The heat transferring device includes a heat transferring component, a lower plate and a positioning component. The heat transferring component is in a shape of pouch and includes at least one input end and at least one output end to allow a fluid to be inputted and outputted. The lower plate includes at least one first perforation. The positioning component is disposed on an exterior of the heat transferring component. An end of the positioning component is connected to the lower plate.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: February 27, 2024
    Assignee: ASIA PACIFIC FUEL CELL TECHNOLOGIES, LTD.
    Inventors: Wei-Pin Lo, Wen-Yen Huang, Chin-Hsien Cheng
  • Patent number: 11913973
    Abstract: A cantilever probe card device and a focusing probe thereof are provided. The focusing probe includes a soldering segment, a testing segment, two outer elastic arms spaced apart from each other, and a focusing portion. The testing segment is spaced apart from the soldering segment along an arrangement direction, and has a needle tip, an outer edge, and an inner edge that is opposite to the outer edge. Each of the two outer elastic arms has two end portions respectively connected to the soldering segment and the inner edge of the testing segment. The focusing portion is connected to the inner edge and is located between the needle tip and the two outer elastic arms, and has a plurality of focusing points arranged on one side thereof away from the two outer elastic arms.
    Type: Grant
    Filed: November 4, 2022
    Date of Patent: February 27, 2024
    Assignee: CHUNGHWA PRECISION TEST TECH. CO., LTD.
    Inventors: Wei-Jhih Su, Chao-Hui Tseng, Hao-Yen Cheng, Rong-Yang Lai
  • Patent number: 11906860
    Abstract: An electronic device includes a substrate, a driving element, a first transparent conductive layer, an insulating layer, and a second transparent conductive layer. The driving element is disposed on the substrate and includes a drain electrode having a first edge. The first transparent conductive layer is disposed on the driving element. The insulating layer is disposed between the driving element and the first transparent conductive layer and includes a hole through which the first transparent conductive layer is electrically connected to the driving element. The second transparent conductive layer is disposed on the insulating layer. One of the first and second transparent conductive layers includes at least one slit, and the first or second transparent conductive layer that includes the at least one slit has a second edge. The second edge is located in the hole, and the at least one slit exposes the first edge of the drain electrode.
    Type: Grant
    Filed: March 21, 2023
    Date of Patent: February 20, 2024
    Assignee: Innolux Corporation
    Inventors: Wei-Yen Chiu, Ming-Jou Tai, You-Cheng Lu, Yi-Shiuan Cherng, Yi-Hsiu Wu, Chia-Hao Tsai, Yung-Hsun Wu
  • Publication number: 20240047298
    Abstract: A semiconductor structure includes a substrate and a first circuit containing composite block over the substrate. The first circuit containing composite block includes a through via therein and a re-distribution layer thereon. The first circuit containing composite block includes a semiconductor block and a diamond block.
    Type: Application
    Filed: August 8, 2023
    Publication date: February 8, 2024
    Applicants: nD-HI Technologies Lab, Inc., ETRON TECHNOLOGY, INC.
    Inventors: Ho-Ming TONG, Wei YEN, Chao-Chun LU
  • Publication number: 20240047297
    Abstract: A method to form a first diamond composite wafer, a second diamond composite wafer or a third diamond composite wafer with a predetermined diameter includes the following steps: preparing a plurality of diamond blocks, wherein each diamond block has a dimension smaller than the predetermined diameter; attaching the plurality of diamond blocks to a first semiconductor substrate with the predetermined diameter to form a first temporary composite wafer, wherein a thermal conductivity of the first semiconductor substrate is smaller than that of the diamond block; and filling gaps among the plurality of diamond blocks of the first temporary composite wafer to form the first diamond composite wafer; or attaching the first diamond composite wafer to a second semiconductor substrate with the predetermined diameter to form the second diamond composite wafer, or removing the first semiconductor substrate from the first diamond composite wafer to form the third diamond composite wafer.
    Type: Application
    Filed: October 21, 2022
    Publication date: February 8, 2024
    Applicants: nD-HI Technologies Lab, Inc., ETRON TECHNOLOGY, INC.
    Inventors: Ho-Ming TONG, Wei YEN, Chao-Chun LU
  • Publication number: 20240047192
    Abstract: A method to process a diamond composite wafer includes the following steps: (a). forming a plurality of through vias in the diamond composite wafer and a first re-distribution layer on a firs side of the diamond composite wafer; (b). attaching a temporary carrier to the first re-distribution layer, and forming a second re-distribution layer on a second side of the diamond composite wafer; and (c). releasing the temporary carrier to form a circuit containing diamond composite wafer.
    Type: Application
    Filed: August 8, 2023
    Publication date: February 8, 2024
    Applicants: nD-HI Technologies Lab,Inc., ETRON TECHNOLOGY, INC.
    Inventors: Ho-Ming TONG, Wei YEN, Chao-Chun LU
  • Publication number: 20240047523
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a gate stack over a substrate. The method includes forming a spacer over first sidewalls of the gate stack using a first precursor. The first precursor includes a first boron- and nitrogen-containing material having a first hexagonal ring structure, the spacer has a plurality of first layers, and each first layer includes boron and nitrogen.
    Type: Application
    Filed: August 4, 2022
    Publication date: February 8, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Ming LIN, Szu-Hua CHEN, Wei-Yen WOON, Szuya LIAO
  • Publication number: 20240038120
    Abstract: An electronic device including a plurality of pixels and a driving element is provided. Each of the plurality of pixels includes a first sub-pixel, a second sub-pixel, and a third sub-pixel. The driving element drives each first sub-pixel of the plurality of pixels.
    Type: Application
    Filed: October 5, 2023
    Publication date: February 1, 2024
    Applicant: Innolux Corporation
    Inventors: Chia-Hao Tsai, You-Cheng Lu, Yi-Shiuan Cherng, Wei-Yen Chiu
  • Publication number: 20240038595
    Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a first transistor over a substrate, wherein the first transistor comprises a first source/drain feature; depositing an interlayer dielectric layer around the first transistor; etching an opening in the interlayer dielectric layer to expose the first source/drain feature; conformably depositing a semimetal layer over the interlayer dielectric layer, wherein the semimetal layer has a first portion in the opening in the interlayer dielectric layer and a second portion over a top surface of the interlayer dielectric layer; and forming a source/drain contact in the opening in the interlayer dielectric layer.
    Type: Application
    Filed: July 28, 2022
    Publication date: February 1, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuan-Kan HU, Jhih-Rong HUANG, Yi-Bo LIAO, Shuen-Shin LIANG, Min-Chiang CHUANG, Sung-Li WANG, Wei-Yen WOON, Szuya LIAO