Patents by Inventor Wei-Yu Chen

Wei-Yu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11342196
    Abstract: A semiconductor device and method for forming the semiconductor device is provided. The semiconductor device includes an integrated circuit having through vias adjacent to the integrated circuit die, wherein a molding compound is interposed between the integrated circuit die and the through vias. The through vias have a projection extending through a patterned layer, and the through vias may be offset from a surface of the patterned layer. The recess may be formed by selectively removing a seed layer used to form the through vias.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: May 24, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsien-Wei Chen, Chen-Hua Yu, Chi-Hsi Wu, Der-Chyang Yeh, An-Jhih Su, Wei-Yu Chen
  • Patent number: 11340430
    Abstract: An optical lens system includes nine lens elements which are, in order from an object side to an image side: a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element, a seventh lens element, an eighth lens element and a ninth lens element. At least one lens surface of the seventh lens element, the eighth lens element and the ninth lens element has at least one critical point in an off-axis region thereof, and each of the seventh lens element, the eighth lens element and the ninth lens element has at least one lens surface being aspheric.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: May 24, 2022
    Assignee: LARGAN PRECISION CO., LTD.
    Inventor: Wei-Yu Chen
  • Patent number: 11333861
    Abstract: An image capturing lens assembly includes seven lens elements, which are, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element and a seventh lens element. The fifth lens element with positive refractive power has an object-side surface being concave in a paraxial region thereof and an image-side surface being convex in a paraxial region thereof. The sixth lens element has an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof. The seventh lens element has an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof, and the image-side surface thereof includes at least one convex shape in an off-axis region thereof.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: May 17, 2022
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Chun-Yen Chen, Chun-Che Hsueh, Wei-Yu Chen
  • Patent number: 11336346
    Abstract: A method and apparatus are disclosed from the perspective of an User Equipment (UE). In one embodiment, the method includes the UE performing sensing on a second direction or beam. The method also includes the UE performing a sidelink transmission on a resource on a first direction or beam, wherein the resource is selected based on at least sensing result of the second direction or beam.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: May 17, 2022
    Assignee: ASUSTek Computer Inc.
    Inventors: Ming-Che Li, Li-Chih Tseng, Wei-Yu Chen, Li-Te Pan
  • Patent number: 11333860
    Abstract: An imaging lens system includes five lens elements, which are, in order from an object side to an image side: a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. At least one of an object-side surface and an image-side surface of the fifth lens element has at least one inflection point. The object-side surface and the image-side surface of the fifth lens element are both aspheric.
    Type: Grant
    Filed: January 18, 2020
    Date of Patent: May 17, 2022
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Kuan-Ting Yeh, Hung-Shuo Chen, Chien-Hsun Wu, Wei-Yu Chen
  • Patent number: 11333862
    Abstract: A photographing lens assembly includes, in order from an object side to an image side: a first, a second, a third, a fourth, a fifth and a sixth lens elements. The first lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof, wherein the object-side surface has at least one convex critical point in an off-axis region thereof. The third lens element has an image-side surface being convex in a paraxial region thereof. The fourth lens element has positive refractive power. The fifth lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof, and an image-side surface being convex in a paraxial region thereof. The sixth lens element has an image-side surface being concave in a paraxial region thereof, wherein the image-side surface has at least one convex critical point in an off-axis region thereof.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: May 17, 2022
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Po-Lun Hsu, Wei-Yu Chen, Kuan-Ting Yeh, Ssu-Hsin Liu
  • Patent number: 11322360
    Abstract: A method of manufacturing a semiconductor structure includes receiving a die comprising a top surface and a sacrificial layer covering the top surface; disposing the die on a substrate; disposing a molding surrounding the die; removing a portion of the molding to expose a sidewall of the sacrificial layer, wherein a top surface of the molding is at a level substantially same as the top surface of the die; and removing the sacrificial layer from the die.
    Type: Grant
    Filed: June 9, 2020
    Date of Patent: May 3, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Hsiang Hu, Wei-Yu Chen, Hung-Jui Kuo, Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 11321799
    Abstract: Examples described herein relate to a software and hardware optimization that manages scenarios where a write operation to a register is less than an entirety of the register. A compiler detects instructions that make partial writes to the same register, groups such instructions, and provides hints to hardware of the partial write. The execution unit combines the output data for grouped instructions and updates the destination register as single write instead of multiple separate partial writes.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: May 3, 2022
    Assignee: Intel Corporation
    Inventors: Chandra S. Gurram, Gang Y. Chen, Subramaniam Maiyuran, Supratim Pal, Ashutosh Garg, Jorge E. Parra, Darin M. Starkey, Guei-Yuan Lueh, Wei-Yu Chen
  • Publication number: 20220130795
    Abstract: A system for reflowing a semiconductor workpiece including a stage, a first vacuum module and a second vacuum module, and an energy source is provided. The stage includes a base and a protrusion connected to the base, the stage is movable along a height direction of the stage relative to the semiconductor workpiece, the protrusion operably holds and heats the semiconductor workpiece, and the protrusion includes a first portion and a second portion surrounded by and spatially separated from the first portion. The first vacuum module and the second vacuum module respectively coupled to the first portion and the second portion of the protrusion, and the first vacuum module and the second vacuum module are operable to respectively apply a pressure to the first portion and the second portion. The energy source is disposed over the stage to heat the semiconductor workpiece held by the protrusion of the stage.
    Type: Application
    Filed: October 27, 2020
    Publication date: April 28, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Shiuan Wong, Ching-Hua Hsieh, Hsiu-Jen Lin, Hao-Jan Pei, Hsuan-Ting Kuo, Wei-Yu Chen, Chia-Shen Cheng, Philip Yu-Shuan Chung
  • Publication number: 20220128802
    Abstract: This disclosure provides an image capturing optical lens assembly including, in order from an object side to an image side: a first lens element with refractive power having an object-side surface being convex in a paraxial region thereof; a second lens element having positive refractive power; a third lens element with refractive power having an image-side surface being concave in a paraxial region thereof; a fourth lens element with refractive power having an image-side surface being concave in a paraxial region thereof, wherein both surfaces thereof being aspheric; a fifth lens element with refractive power having an object-side surface being concave in a paraxial region thereof; and a sixth lens element with refractive power having an image-side surface being concave in a paraxial region thereof, wherein both surfaces thereof being aspheric, and the image-side surface having at least one convex shape in an off-axis region thereof.
    Type: Application
    Filed: January 6, 2022
    Publication date: April 28, 2022
    Inventors: Chun-Che Hsueh, Wei-Yu Chen
  • Patent number: 11315862
    Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a redistribution structure, a circuit substrate, and an insulating encapsulation. The redistribution structure includes a first under-bump metallization (UBM) pattern covered by a first dielectric layer, and the first UBM pattern includes a surface substantially leveled with a surface of the first dielectric layer. The circuit substrate is electrically coupled to the redistribution structure through a conductive joint disposed on the surface of the first UBM pattern. The insulating encapsulation is disposed on the redistribution structure to cover the circuit substrate.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: April 26, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Lin Ho, Chin-Liang Chen, Jiun-Yi Wu, Chi-Yang Yu, Yu-Min Liang, Wei-Yu Chen
  • Patent number: 11317454
    Abstract: A method and apparatus are disclosed from the perspective of a User Equipment (UE) for the UE to request sidelink resources for an one-to-one V2X (Vehicle-to-Everything) sidelink communication, wherein the UE supports both LTE (Long Term Evolution) RAT (Radio Access Technology) and NR (New Radio) RAT. In one embodiment, the method includes the UE initiating a one-to-one V2X sidelink communication. The method further includes the UE transmitting a RRC (Radio Resource Control) message to a network node to request sidelink resources from NR RAT for the one-to-one V2X sidelink communication and not transmitting any RRC message to the network node to request sidelink resources from LTE RAT for the one-to-one V2X sidelink communication.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: April 26, 2022
    Assignee: ASUSTek Computer Inc.
    Inventors: Wei-Yu Chen, Richard Lee-Chee Kuo, Li-Chih Tseng, Li-Te Pan
  • Patent number: 11314515
    Abstract: Embodiments described herein provide for an instruction and associated logic to enable a vector multiply add instructions with automatic zero skipping for sparse input. One embodiment provides for a general-purpose graphics processor comprising logic to perform operations comprising fetching a hardware macro instruction having a predicate mask, a repeat count, and a set of initial operands, where the initial operands include a destination operand and multiple source operands. The hardware macro instruction is configured to perform one or more multiply/add operations on input data associated with a set of matrices.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: April 26, 2022
    Assignee: Intel Corporation
    Inventors: Supratim Pal, Sasikanth Avancha, Ishwar Bhati, Wei-Yu Chen, Dipankar Das, Ashutosh Garg, Chandra S. Gurram, Junjie Gu, Guei-Yuan Lueh, Subramaniam Maiyuran, Jorge E. Parra, Sudarshan Srinivasan, Varghese George
  • Publication number: 20220122926
    Abstract: Provided is a package structure, including a die, a plurality of through vias, an encapsulant, a plurality of first connectors, a warpage control material and a protection material. The plurality of through vias are disposed around the die. The encapsulant laterally encapsulate the die and the plurality of through vias. The plurality of first connectors are electrically connected to a first surface of the plurality of through vias. The warpage control material is disposed over a first surface of the die. The protection material is disposed over the encapsulant, around the plurality of first connectors and the warpage control material. A Young's modulus of the warpage control material is greater than a Young's modulus of the encapsulant, and the Young's modulus of the encapsulant is greater than a Young's modulus of the protection material.
    Type: Application
    Filed: December 24, 2021
    Publication date: April 21, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Ching-Hua Hsieh, Hsiu-Jen Lin, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Jen-Jui Yu, Cheng-Shiuan Wong
  • Publication number: 20220122952
    Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a first package including at least one first semiconductor die encapsulated in an insulating encapsulation and through insulator vias electrically connected to the at least one first semiconductor die, a second package including at least one second semiconductor die and conductive pads electrically connected to the at least one second semiconductor die, and solder joints located between the first package and the second package. The through insulator vias are encapsulated in the insulating encapsulation. The first package and the second package are electrically connected through the solder joints. A maximum size of the solder joints is greater than a maximum size of the through insulator vias measuring along a horizontal direction, and is greater than or substantially equal to a maximum size of the conductive pads measuring along the horizontal direction.
    Type: Application
    Filed: January 3, 2022
    Publication date: April 21, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Yu Chen, An-Jhih Su, Chi-Hsi Wu, Der-Chyang Yeh, Li-Hsien Huang, Po-Hao Tsai, Ming-Shih Yeh, Ta-Wei Liu
  • Publication number: 20220107482
    Abstract: An electronic device includes an optical lens assembly. The optical lens assembly includes four lens elements which are, in order from an outer side to an inner side: a first lens element, a second lens element, a third lens element and a fourth lens element. The first lens element has negative refractive power. An outer-side surface of the first lens element is concave in a paraxial region thereof and has at least one convex critical point in an off-axis region thereof. The third lens element has positive refractive power. The fourth lens element has an inner-side surface being convex in a paraxial region thereof and having at least one concave critical point in an off-axis region thereof. The optical lens assembly has a total of four lens elements.
    Type: Application
    Filed: December 16, 2021
    Publication date: April 7, 2022
    Applicant: LARGAN PRECISION CO.,LTD.
    Inventors: Yu Jui LIN, Wei-Yu CHEN
  • Patent number: 11294149
    Abstract: An optical photographing lens assembly includes six lens elements, in order from an object side to an image side, the six lens elements are a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element and a sixth lens element. The first lens element has positive refractive power. The fourth lens element has negative refractive power. The fifth lens element has an object-side surface being concave in a paraxial region thereof. The sixth lens element has an image-side surface being convex in a paraxial region thereof, both an object-side surface and the image-side surface of the seventh lens element are aspheric, and at least one of the object-side surface and the image-side surface of the sixth lens element includes at least one inflection point.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: April 5, 2022
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Hung-Shuo Chen, Wei-Yu Chen
  • Publication number: 20220099944
    Abstract: An image lens assembly includes five lens elements, which are, in order from an object side to an image side along an optical path, a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. The first lens element has positive refractive power. The third lens element has negative refractive power. The fourth lens element with positive refractive power has an object-side surface being convex in a paraxial region thereof and an image-side surface being convex in a paraxial region thereof. The fifth lens element has an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof. The image-side surface of the fifth lens element includes at least one convex critical point in an off-axis region thereof.
    Type: Application
    Filed: June 10, 2021
    Publication date: March 31, 2022
    Inventors: Chung-Yu WEI, Hung-Shuo CHEN, Kuan-Chun WANG, Wei-Yu CHEN
  • Patent number: 11291052
    Abstract: A method and apparatus are disclosed, from the perspective of the UE, for performing random access procedure. In one embodiment, the method includes the UE receiving a message from a network. The message includes a TTI information of Msg3. In addition, the method includes the UE transmitting a preamble to the network. The method also includes the UE receiving a Msg2 from the network for responding the preamble. The method further includes the UE performing a Msg3 transmission to the network according to the TTI information of Msg3.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: March 29, 2022
    Assignee: ASUSTek Computer Inc.
    Inventors: Wei-Yu Chen, Li-Chih Tseng
  • Patent number: 11284221
    Abstract: A method and apparatus are disclosed from the perspective of a UE. In one embodiment, the method includes receiving a first signaling, wherein the first signaling includes an identity of a broadcast or multicast service. The method further includes receiving a second signaling, wherein the second signaling indicates an association between a numerology and an information of the broadcast or multicast service. The method also includes using the numerology to receive the broadcast or multicast service.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: March 22, 2022
    Assignee: ASUSTek Computer Inc.
    Inventors: Yu-Hsuan Guo, Richard Lee-Chee Kuo, Wei-Yu Chen, Li-Te Pan