Abstract: An air-floating guide rail device includes a guide rail unit, a slider unit, and a linear motor unit. The guide rail unit includes a guide rail body and two air-floating block sets made of a material different from that of the guide rail body and each including top and side air-floating blocks. The slider unit includes a main sliding seat and two lateral sliding seats connected integrally to the main sliding seat and each having first and second guiding surfaces transverse to each other and disposed respectively adjacent to corresponding top and side air-floating blocks, and first and second air guiding passages connecting the first and second guiding surfaces to the external environment. The linear motor unit includes a stator and a mover mounted fixedly to the main sliding seat and movable relative to the stator for driving linear movement of the slider unit relative to the guide rail unit.

Abstract: A semiconductor package structure includes a capacitor substrate and a first semiconductor die. The capacitor substrate has a first surface and a second surface opposite the first surface and includes a first redistribution structure, a second redistribution structure, a through via, and a first capacitor structure. The first redistribution structure is disposed on the first surface. The second redistribution structure is disposed on the second surface. The through via electrically couples the first redistribution structure to the second redistribution structure. The first capacitor structure is disposed between the first redistribution structure and the second redistribution structure and is electrically coupled to the second redistribution structure. The first semiconductor die is disposed over the capacitor substrate and is electrically coupled to the first capacitor structure through the second redistribution structure.

Abstract: A package includes an interposer structure free of any active devices. The interposer structure includes an interconnect device; a dielectric film surrounding the interconnect device; and first metallization pattern bonded to the interconnect device. The package further includes a first device die bonded to an opposing side of the first metallization pattern as the interconnect device and a second device die bonded to a same side of the first metallization pattern as the first device die. The interconnect device electrically connects the first device die to the second device die.

Abstract: A multi-phase coupled inductor includes a first iron core, a second iron core, and a plurality of coil windings. The first iron core includes a first body and a plurality of first core posts. The plurality of first core posts are connected to the first body. The second iron core is opposite to the first iron core. The second iron core and the first body are spaced apart from each other by a gap. The plurality of coil windings wrap around the plurality of first core posts, respectively. Each of the coil windings has at least two coils.

Abstract: An ionic compound, an absorbent and an absorption device are provided. The ionic compound has a structure represented by Formula (I): ABn, ??Formula (I) wherein A is B is R1, R2, R3, R4, R5, and R6 are independently H, C1-6 alkyl group; and n is 1 or 2.

Abstract: Exemplary subpixel structures include a directional light-emitting diode structure characterized by a full-width-half-maximum (FWHM) of emitted light having a divergence angle of less than or about 10°. The subpixel structure further includes a lens positioned a first distance from the light-emitting diode structure, where the lens is shaped to focus the emitted light from the light-emitting diode structure. The subpixel structure still further includes a patterned light absorption barrier positioned a second distance from the lens. The patterned light absorption barrier defines an opening in the barrier, and the focal point of the light focused by the lens is positioned within the opening. The subpixels structures may be incorporated into a pixel structure, and pixel structures may be incorporated into a display that is free of a polarizer layer.

Abstract: A field effect transistor includes a substrate having a transistor forming region thereon; an insulating layer on the substrate; a first graphene layer on the insulating layer within the transistor forming region; an etch stop layer on the first graphene layer within the transistor forming region; a first inter-layer dielectric layer on the etch stop layer; a gate trench recessed into the first inter-layer dielectric layer and the etch stop layer within the transistor forming region; a second graphene layer on interior surface of the gate trench; a gate dielectric layer on the second graphene layer and on the first inter-layer dielectric layer; and a gate electrode on the gate dielectric layer within the gate trench.

Abstract: A package structure and a method of forming the same are provided. The package structure includes a first die, a second die, a first encapsulant, and a buffer layer. The first die and the second die are disposed side by side. The first encapsulant encapsulates the first die and the second die. The second die includes a die stack encapsulated by a second encapsulant encapsulating a die stack. The buffer layer is disposed between the first encapsulant and the second encapsulant and covers at least a sidewall of the second die and disposed between the first encapsulant and the second encapsulant. The buffer layer has a Young's modulus less than a Young's modulus of the first encapsulant and a Young's modulus of the second encapsulant.

Abstract: A powered industrial truck includes a lateral movement assembly including four sliding members and four pivotal members both on a wheeled carriage, four links having a first end pivotably secured to the sliding member and a second end pivotably secured to either end of the pivotal member, a motor shaft having two ends pivotably secured to the pivotal members respectively, a first electric motor on one frame member, and four mounts attached to the sliding members respectively; two lift assemblies including a second electric motor, a shaft having two ends rotatably secured to the sliding members respectively, two gear trains at the ends of the shaft respectively, a first gear connected to the second electric motor, a second gear on the shaft, and a first roller chain on the first and second gears; two electric attachments on the platform and being laterally moveable, each attachment. The mount has rollers.

Abstract: The present disclosure is generally related to 3D imaging capable OLED displays. A light field display comprises an array of 3D light field pixels, each of which comprises an array of corrugated OLED pixels, a metasurface layer disposed adjacent to the array of 3D light field pixels, and a plurality of median layers disposed between the metasurface layer and the corrugated OLED pixels. Each of the corrugated OLED pixels comprises primary or non-primary color subpixels, and produces a different view of an image through the median layers to the metasurface to form a 3D image. The corrugated OLED pixels combined with a cavity effect reduce a divergence of emitted light to enable effective beam direction manipulation by the metasurface. The metasurface having a higher refractive index and a smaller filling factor enables the deflection and direction of the emitted light from the corrugated OLED pixels to be well controlled.

Abstract: A die includes a substrate, a conductive pad, a connector and a protection layer. The conductive pad is disposed over the substrate. The connector is disposed on the conductive pad. The connector includes a seed layer and a conductive post. The protection layer laterally covers the connector. Topmost surfaces of the seed layer and the conductive post and a top surface of the protection layer are level with each other.

Abstract: The present invention provides a method for accessing a flash memory module, wherein the method includes the steps of: writing data into a plurality of pages of a specific block, and establishes or updates a F2H mapping table based on physical addresses of the plurality of pages and logical addresses of the data; using the F2H mapping table to update a H2F mapping table; initializing a flush-bitmap, wherein the flush-bitmap records a plurality of flush bits corresponding to the physical addresses of the plurality of pages, respectively; receiving a trim command from a host device, wherein the trim command asks to mark at least one of the logical addresses of the data as invalid; updating the H2F mapping data according to the trim command; updating the flush-bitmap according to the trim command; and writing the updated H2F mapping table and the updated flush-bitmap into the flash memory module.

Abstract: A package structure and method of forming the same are provided. The package structure includes a polymer layer, a redistribution layer, a die, and an adhesion promoter layer. The redistribution layer is disposed over the polymer layer. The die is sandwiched between the polymer layer and the redistribution layer. The adhesion promoter layer, an oxide layer, a through via, and an encapsulant are sandwiched between the polymer layer and the redistribution layer. The encapsulant is laterally encapsulates the die. The through via extends through the encapsulant. The adhesion promoter layer and the oxide layer are laterally sandwiched between the through via and the encapsulant. A bottom portion of the encapsulant is longitudinally sandwiched between the adhesion promoter layer and the polymer layer.

Abstract: A liquid-cooled cooling structure includes a cooling main body having a condensation chamber and an evaporation chamber arranged vertically therein; a separation member arranged between and separating the condensation chamber and the evaporation chamber, and having a first through hole and a second through hole communicating with the condensation chamber and the evaporation chamber, a dimension of the first through hole being greater than that of the second through hole; a longitudinal partition board received in the condensation chamber and arranged between the first through hole and the second through hole and separating the condensation chamber into a first channel and a second channel; cooling fins extended from an outer perimeter of the cooling main body.

Abstract: A method and apparatus are disclosed. In an example from the perspective of a first device, a grant is received from a network node. The grant allocates a set of sidelink data resources. One or more sidelink data transmissions are performed on the set of sidelink data resources. A second feedback information associated with the one or more sidelink data transmissions is received and/or detected. An uplink resource is derived. A first feedback information is transmitted on the uplink resource to the network node. The first feedback information is set based upon the second feedback information.

Abstract: A method, system, and article provide image processing with power reduction while using universal serial bus cameras.

Abstract: An immersion cooling system includes a pressure seal tank, an electronic apparatus, a pressure balance pipe and a relief valve. The pressure seal tank is configured to store coolant. A vapor space is formed in the pressure seal tank above the liquid level of the coolant. The electronic apparatus is completely immersed in the coolant. The pressure balance pipe has a gas collection length. The first port of the pressure balance pipe is disposed on the top surface of the pressure seal tank. The relief valve is disposed on the second port of the pressure balance pipe. The second port is farther away from the top surface of the pressure seal tank than the first port. The gas collection length of the pressure equalization tube allows the concentration of vaporized coolant at the first port to be greater than the concentration of vaporized coolant at the second port.

Abstract: An integrated circuit (IC) structure includes a semiconductor substrate, a bottom electrode routing, a capacitor structure, a top electrode routing. The bottom electrode routing is over the semiconductor substrate. The capacitor structure is over the bottom electrode routing. The capacitor structure includes a bottom metal layer, a middle metal layer above the bottom metal layer, and a top metal layer above the middle metal layer. When viewed in a plan view, the top metal layer has opposite straight edges extending along a first direction and opposite square wave-shaped edges connecting the opposite straight edges, the square wave-shaped edges each comprise alternating first and second segments extending along a second direction perpendicular to the first direction, and third segments each connecting adjacent two of the first and second segments, wherein the third segments extend along the first direction.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a resistive element over the substrate. The semiconductor device structure also includes a thermal conductive element over the substrate. A direct projection of the thermal conductive element on a main surface of the resistive element extends across a portion of a first imaginary line and a portion of a second imaginary line of the main surface. The first imaginary line is perpendicular to the second imaginary line, and the first imaginary line and the second imaginary line intersect at a center of the main surface.

Abstract: A semiconductor package includes a partitioned package substrate that is composed of multiple discrete substrates arranged in a side-by-side manner. The discrete substrates include a central substrate and peripheral substrates surrounding the central substrate. At least one integrated circuit die is mounted on a first surface of the partitioned package substrate. A plurality of solder balls is mounted on a second surface of the partitioned package substrate opposite to the first surface.