Abstract: A silicon on insulator integrated high-current N type combined semiconductor device, which can improve the current density, comprises a P type substrate and a buried oxide layer arranged thereon. A P type epitaxial layer divided into a region I and a region II is arranged on the buried oxide layer. The region I comprises an N type drift region, a P type deep well, an N type buffer well, a P type drain region, an N type source region and a P type body contact region; a field oxide layer and agate oxide layer are arranged on a silicon surface, and a polysilicon lattice is arranged on the gate oxide layer. The region II comprises an N type triode drift region, a P type deep well, an N type triode buffer well, a P type emitting region, an N type base region, an N type source region and a P type body contact region; a field oxide layer and a gate oxide layer are arranged on a silicon surface, and a polysilicon lattice is arranged on the gate oxide layer.

Abstract: A switching power supply with a quick transient response is provided. A hysteretic control loop which comprises a hysteretic controller (117) and a control signal gate (116) is added to the original PWM control loop of the switching power supply. The hysteretic controller (117) is used to detect an output voltage (Vout) of the switching power supply and compare the output voltage (Vout) of the switching power supply with a reference voltage (Vref). When a load current (Iout) of the switching power supply is suddenly changed, the output voltage (Vout) of the switching power supply fluctuates. If the output voltage (Vout) of the switching power supply is in a setting range of the hysteretic voltage, output terminals (SELp, SELn) of the hysteretic controller (117) are in a low potential, and the control signal gate (116) selects output signals (Qp1, Qn1) from a PWM controller (101) as input signals of a gate signal drive circuit (106).

Abstract: A switch level circuit (110) with dead time self-adapting control, which minimizes the switching loss in a switching power supply converter with synchronous rectification by changing a dead time between a high-side control transistor (10) and a low-side synchronous rectifying transistor (11). The switch level circuit (110) includes the high-side control transistor (10) and the low-side synchronous rectifying transistor (11) which are controlled to be on and off by external control signals, and a waveform with a given duty cycle is outputted at a node (LX) between the two transistors. The switch level circuit (110) also includes a control module for adjusting the dead time.

Abstract: A computer readable medium configured to approximate the integral of the product of a plurality of functions includes logic configured to factor the plurality of functions into a set of fixed functions and one varying function, logic configured to determine a first vector that represents the product of the fixed functions in the wavelet domain, logic configured to determine a second vector that represents the one varying function in the wavelet domain, and logic configured to determine an inner product of the first vector and the second vector.

Abstract: A method of rendering a graphical scene includes determining a plurality of functions that contribute to a light transport model of the scene, projecting each function of the plurality of functions into the wavelet domain, encoding basis coefficients of each function in a wavelet tree, each function being encoded in at least one wavelet tree such that the plurality of functions are represented in the wavelet domain by a plurality of wavelet trees, traversing direct paths through the plurality of wavelet trees, along which direct paths an integral coefficient may be nonzero, to determine the radiance of a point in the scene, and rendering the scene.

Abstract: A computer readable medium is configured to determine the integral of the product of a plurality of functions. The computer readable medium includes logic configured to project each function of the plurality of functions into the wavelet domain, logic configured to encode basis coefficients of each function in a wavelet tree, each function being encoded in at least one wavelet tree such that the plurality of functions are represented in the wavelet domain by a plurality of wavelet trees, and logic configured to traverse direct paths through the plurality of wavelet trees to determine the integral of the product of the functions represented by the wavelet trees, along which direct paths an integral coefficient may be nonzero.

Abstract: A method of rendering a graphical scene includes determining a plurality of functions that contribute to a light transport model of a scene, factoring the plurality of functions into a set of fixed functions and one varying function, determining a first radiance transfer vector that represents the product of the fixed functions in the wavelet domain, determining a second radiance transfer vector that represents the one varying function in the wavelet domain, determining an inner product of the first and second radiance transfer vectors to approximate a radiance of a point x in the scene, and rendering the scene.

Abstract: The low power consumption CMOS high voltage driving circuit relates to a kind of high voltage driving circuit for output driving, and there is an out buffer stage between the output end of the level switch stage and the input end of the high voltage output stage, comprising a high voltage PMOS pipe and a high voltage NMOS pipe. The source of the high voltage PMOS pipe is connected with the power supply, its gate electrode is connected with the output end of the upper level out buffer unit as the input end of the current level out buffer unit. The source of the high voltage NMOS pipe is put to earth, and its gate electrode serves as the receiving end of the 3ith sequence signal. The drain region of the high voltage PMOS pipe is connected with that of the high voltage NMOS pipe and is connected with the input end of the lower level out buffer unit as the output end of the current level out buffer unit.

Abstract: A method of rendering a graphical scene includes determining a plurality of functions that contribute to a light transport model of the scene, projecting each function of the plurality of functions into the wavelet domain, encoding basis coefficients of each function in a wavelet tree, each function being encoded in at least one wavelet tree such that the plurality of functions are represented in the wavelet domain by a plurality of wavelet trees, traversing direct paths through the plurality of wavelet trees, along which direct paths an integral coefficient may be nonzero, to determine the radiance of a point in the scene, and rendering the scene.

Abstract: A method of rendering a graphical scene includes determining a plurality of functions that contribute to a light transport model of a scene, factoring the plurality of functions into a set of fixed functions and one varying function, determining a first radiance transfer vector that represents the product of the fixed functions in the wavelet domain, determining a second radiance transfer vector that represents the one varying function in the wavelet domain, determining an inner product of the first and second radiance transfer vectors to approximate a radiance of a point x in the scene, and rendering the scene.

Abstract: A computer readable medium is configured to determine the integral of the product of a plurality of functions. The computer readable medium includes logic configured to project each function of the plurality of functions into the wavelet domain, logic configured to encode basis coefficients of each function in a wavelet tree, each function being encoded in at least one wavelet tree such that the plurality of functions are represented in the wavelet domain by a plurality of wavelet trees, and logic configured to traverse direct paths through the plurality of wavelet trees to determine the integral of the product of the functions represented by the wavelet trees, along which direct paths an integral coefficient may be nonzero.

Abstract: A computer readable medium configured to approximate the integral of the product of a plurality of functions includes logic configured to factor the plurality of functions into a set of fixed functions and one varying function, logic configured to determine a first vector that represents the product of the fixed functions in the wavelet domain, logic configured to determine a second vector that represents the one varying function in the wavelet domain, and logic configured to determine an inner product of the first vector and the second vector.

Abstract: The low power consumption CMOS high voltage driving circuit relates to a kind of high voltage driving circuit for output driving, and there is an out buffer stage between the output end of the level switch stage and the input end of the high voltage output stage, comprising a high voltage PMOS pipe and a high voltage NMOS pipe. The source of the high voltage PMOS pipe is connected with the power supply, its gate electrode is connected with the output end of the upper level out buffer unit as the input end of the current level out buffer unit. The source of the high voltage NMOS pipe is put to earth, and its gate electrode serves as the receiving end of the 3ith sequence signal. The drain region of the high voltage PMOS pipe is connected with that of the high voltage NMOS pipe and is connected with the input end of the lower level out buffer unit as the output end of the current level out buffer unit.