Patents by Inventor Wen-An Liang

Wen-An Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11411655
    Abstract: An optical receiving device includes a conversion module, a signal generation module and a control module. The conversion module performs photoelectric conversion and amplification on an optical signal to generate a photocurrent, the signal generation module provides a gain signal, performs transimpedance and amplification on the photocurrent according to an input signal indicating a preset output voltage swing to generate a voltage signal, and generates a measurement signal indicating an average optical power associated with the optical signal according to the photocurrent, the control module outputs a control signal which is variable to adjust a gain of the conversion module, so that a dynamic range of the conversion module changes as the gain of the conversion module itself changes.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: August 9, 2022
    Assignee: Molex, LLC
    Inventors: Kuen-Ting Tsai, Yao-Wen Liang, Zuon-Min Chuang, Wei-Hung Chen
  • Patent number: 11382214
    Abstract: A method for fabricating an assemble substrate is provided, including stacking a circuit portion on a plurality of circuit members. The circuit members are spaced apart from one another in a current packaging process to increase a layer area. The assemble substrate thus fabricated meets the requirements for a packaging substrate of a large size, and has a high yield and low fabrication cost.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: July 5, 2022
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Lung-Yuan Wang, Wen-Liang Lien
  • Patent number: 11348869
    Abstract: A chip packaging structure includes a circuit redistribution structure, a chip, a sealing layer, and an antenna pattern. The circuit redistribution structure includes a first and a second circuit layer, and a conductive pad. The second circuit layer is disposed on and electrically connected to the first circuit layer. The conductive pad is electrically connected to the second circuit layer. The chip is disposed on the circuit redistribution structure and electrically connected to the second circuit layer. The sealing layer having an opening and a groove covers the chip and the circuit redistribution structure. The opening exposes the conductive pad. A portion of the groove communicates with the opening. The antenna pattern includes a first and a second portion. The first portion covers sidewalls of the opening and is electrically connected to the conductive pad. The second portion is filled in the groove and electrically connected to the first portion.
    Type: Grant
    Filed: November 22, 2020
    Date of Patent: May 31, 2022
    Assignee: Unimicron Technology Corp.
    Inventors: Chien-Chou Chen, Chun-Hsien Chien, Wen-Liang Yeh, Wei-Ti Lin
  • Patent number: 11318369
    Abstract: A multiple rhombic dodecahedron puzzle includes a plurality of wooden puzzles arranged in a multiple rhombic dodecahedron. The multiple rhombic dodecahedron is equivalent to a cube formed by a plurality of rhombic dodecahedrons connecting to each other. Each of the wooden puzzles includes two unit elements. The two unit elements are connected to each other and are the same others. Each of the two unit elements has a plurality of surfaces. Each of the surfaces has a diamond shape or a triangular shape. Two of the surfaces which in the triangular shape are connected to each other in order to form a concave shape.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: May 3, 2022
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Wen-Liang Hung, Ku-Yu Fan
  • Patent number: 11250922
    Abstract: A memory cell includes: a latch, powered by a first reference voltage and a second reference voltage different from the first reference voltage, and having a first connecting terminal and a second connecting terminal; a first programmable fuse, having a first terminal coupled to the first connecting terminal and a second terminal coupled to the second reference voltage; and a second programmable fuse, having a first terminal coupled to the second connecting terminal and a second terminal coupled to the second reference voltage.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: February 15, 2022
    Assignee: AP Memory Technology Corp.
    Inventors: Owen Yuwen Li, Wen Liang Chen
  • Publication number: 20210387902
    Abstract: A method for making a beam splitter with photocatalytic coating is disclosed. First, a TiO2—SiO2 sol, a SiO2 sol, and an anatase TiO2 preform sol are prepared. A glass substrate having two opposite surfaces is provided. The two opposite surfaces of the glass substrate is coated with the TiO2—SiO2 sol, the SiO2 sol, and the anatase TiO2 preform sol by dip-coating, thereby forming a coated glass substrate with a multi-layer optical coating on each of the two opposite surfaces. The multi-layer optical coating comprises a TiO2—SiO2 coating, a SiO2 coating, and an anatase TiO2 preform coating. The coated glass substrate is subjected to an anneal process. The coated glass substrate is cut, thereby forming the beam splitter with photocatalytic coating.
    Type: Application
    Filed: June 11, 2020
    Publication date: December 16, 2021
    Inventors: Wen-Liang Huang, Wei-Hong Wang, Zhen-Feng Wang, Wei-Houng Chen, Pei-Feng Sheu
  • Patent number: 11201123
    Abstract: A substrate structure includes a glass substrate, a first circuit layer, a second circuit layer, and at least one conductive region. The glass substrate has a first surface and a second surface opposing the first surface. The first circuit layer is disposed on the first surface. The second circuit layer is disposed on the second surface. The conductive region includes a plurality of conductive micro vias. The conductive micro vias penetrate through the glass substrate. The conductive micro vias are electrically connected to the first circuit layer and the second circuit layer, and the conductive micro vias have a via size of 2 ?m to 10 ?m.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: December 14, 2021
    Assignee: Unimicron Technology Corp.
    Inventors: Chun-Hsien Chien, Po-Chen Lin, Wen-Liang Yeh, Chien-Chou Chen
  • Publication number: 20210375705
    Abstract: A method to manufacture a semiconductor device includes: bonding a first wafer and a second wafer to be stacked vertically with one another, in which the first wafer provides a plurality of memory components and the second wafer provides a control circuit; forming a plurality of input/output channels on a surface of one of the first and second wafers; and cutting the bonded first and second wafers into a plurality of dices; wherein a plurality of first conductive contacts in the first wafer are electrically connected to the control circuit and the first conductive contacts in combinations with a plurality of first conductive vias in the first wafer form a plurality of transmission channels through which the control circuit is capable to access the memory components.
    Type: Application
    Filed: August 12, 2021
    Publication date: December 2, 2021
    Applicant: AP Memory Technology Corp.
    Inventors: Wen Liang CHEN, Lin MA, Chien-An YU, Chun Yi LIN
  • Publication number: 20210376934
    Abstract: An optical receiving device includes a conversion module, a signal generation module and a control module. The conversion module performs photoelectric conversion and amplification on an optical signal to generate a photocurrent, the signal generation module provides a gain signal, performs transimpedance and amplification on the photocurrent according to an input signal indicating a preset output voltage swing to generate a voltage signal, and generates a measurement signal indicating an average optical power associated with the optical signal according to the photocurrent, the control module outputs a control signal which is variable to adjust a gain of the conversion module, so that a dynamic range of the conversion module changes as the gain of the conversion module itself changes.
    Type: Application
    Filed: May 25, 2021
    Publication date: December 2, 2021
    Applicant: Molex, LLC
    Inventors: Kuen-Ting TSAI, Yao-Wen LIANG, Zuon-Min CHUANG, Wei-Hung CHEN
  • Publication number: 20210349299
    Abstract: A method for analyzing 2D material thin film and a system for analyzing 2D material thin film are disclosed. The detection method includes the following steps: capturing sample images of 2D material thin films; measuring the 2D material thin films by a Raman spectrometer; performing a visible light hyperspectral algorithm on the sample images by a processor to generate a plurality of visible light hyperspectral images; performing a training and validation procedure, performing an image feature algorithm on the visible light hyperspectral images, and establishing a thin film prediction model based on a validation; and capturing a thin-film image to be measured by the optical microscope, performing the visible light hyperspectral algorithm, and then generating a distribution result of the thin-film image to be measured according to an analysis of the thin film prediction model.
    Type: Application
    Filed: April 20, 2021
    Publication date: November 11, 2021
    Inventors: HSIANG-CHEN WANG, KAI-CHUN LI, KAI-HSIANG KE, CHUN-WEN LIANG
  • Patent number: 11158552
    Abstract: A semiconductor device includes a first semiconductor portion and a second semiconductor portion. The first semiconductor portion provides a plurality of memory components, including a first substrate layer, a plurality of first interconnect conductive layers, a plurality of first conductive vias, and a plurality of first conductive contacts. The first conductive contacts electrically connect to the first conductive vias, and the first conductive contacts in combination with the first conductive vias are formed on a top first interconnect conductive layer of the first interconnect conductive layers. The second semiconductor portion provides a control circuit, including a second substrate layer and a plurality of second interconnect conductive layers.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: October 26, 2021
    Assignee: AP Memory Technology Corp.
    Inventors: Wen Liang Chen, Lin Ma, Chien-An Yu, Chun Yi Lin
  • Publication number: 20210327521
    Abstract: A memory cell includes: a latch, powered by a first reference voltage and a second reference voltage different from the first reference voltage, and having a first connecting terminal and a second connecting terminal; a first programmable fuse, having a first terminal coupled to the first connecting terminal and a second terminal coupled to the second reference voltage; and a second programmable fuse, having a first terminal coupled to the second connecting terminal and a second terminal coupled to the second reference voltage.
    Type: Application
    Filed: April 20, 2020
    Publication date: October 21, 2021
    Applicant: AP Memory Technology Corp.
    Inventors: Owen Yuwen LI, Wen Liang CHEN
  • Publication number: 20210266495
    Abstract: The present invention provides a control method of a processor, wherein the control method comprises the steps of: transmitting image data of a first frame to an integrated circuit, wherein the first frame corresponds to a first frame rate; determining a second frame rate of a second frame next to the first frame; determining if a difference between the second frame rate and the first frame rate belongs to a large scale frame rate adjustment or a small scale frame rate adjustment; if the difference between the second frame rate and the first frame rate belongs to the large scale frame rate adjustment, using a first mode to transmit image data of the second frame; and if the difference between the second frame rate and the first frame rate belongs to the small scale frame rate adjustment, using a second mode to transmit image data of the second frame.
    Type: Application
    Filed: January 21, 2021
    Publication date: August 26, 2021
    Inventors: Kang-Yi Fan, Chin-Wen Liang, Chang-Chu Liu, Sheng-Hsiang Chang, You-Min Yeh
  • Patent number: 11084760
    Abstract: The present application provides for water capsules, preparation methods of water capsules, a preparation method for lightweight concrete and a structure of lightweight concrete. Each of the water capsules comprises an alkali-sensitive shell and water inside; the water capsules are used to mix with a cementitious matrix, the water capsules can survive during concrete mixing and transportation processes but then gradually rupture in hardened concrete; the water released during the hardening of the concrete is beneficial for the hydration of the concrete. The water capsules and their preparation method, the preparation method for and structure of the lightweight concrete of the present application are of unique design and strong practicability.
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: August 10, 2021
    Assignee: Hip Hing Construction Technology Limited
    Inventors: Hong Gang Zhu, Yuet Kee Lam, Xiao Hu Zhu, Man Lung Sham, Tomi Pekka Bernhard Nissinen, Jing Wen Liang, Su Ping Bao, Kwok Leung So
  • Publication number: 20210219435
    Abstract: A circuit carrier board includes a first build-up layer structure, a substrate, an adhesive layer, and a conductive structure. The first build-up layer includes a plurality of first dielectric layers and a plurality of first circuit layers original stacked. The substrate includes a base and a second build-up layer structure disposed on the base. The second build-up layer structure includes a plurality of second dielectric layers and a plurality of second circuit layer original stacked. A top most layer of the second circuit layers is exposed outside of the second dielectric layers. The conductive structure penetrates through the first dielectric layers, the first circuit layers and the adhesive layer, and contacts with the top most layer of the second circuit layers. The conductive structure electrical connects the first circuit layers to the second circuit layers. A manufacturing method of the circuit carrier board is also provided.
    Type: Application
    Filed: April 1, 2021
    Publication date: July 15, 2021
    Applicant: Unimicron Technology Corp.
    Inventors: Chun-Hsien Chien, Wen-Liang Yeh, Wei-Ti Lin
  • Publication number: 20210211202
    Abstract: The present disclosure provides a dither-free bias control of an optical modulator (OM) for the externally-modulated transmitter with the silicon-based Mach-Zehnder modulator (MZM), while the nonlinear distortions (NLDs) are generated by the plasma dispersion effect of the silicon-based MZM. The present disclosure proposes to intentionally offset the bias point of the MZM from its quadrature points, and therefore the Mach-Zehnder interference (MZI)-induced even-order NLDs can be generated to cancel the plasma dispersion-induced even-order NLDs. In addition, the MZM bias control is also proposed to arbitrarily adjust and lock in the bias point of an OM so a transmitter with the integrated MZM may reach the best even-order NLDs by offsetting from the quadrature points. Moreover, while the proposed scheme could arbitrarily adjust and lock in the bias of MZM, the receiver sensitivity may be optimized by using such a bias control scheme to adjust the extinction ratio of multi-level signals.
    Type: Application
    Filed: December 2, 2016
    Publication date: July 8, 2021
    Applicant: Oplink Communications, LLC
    Inventors: Kuen-Ting TSAI, Zuon-Min CHUANG, Yao-Wen LIANG
  • Publication number: 20210183513
    Abstract: The present disclosure provides a method for disease control of plants, comprising predicting the probability of a disease occurrence and suggesting a suitable and effective control measure for the identified pathogen and/or host. The present disclosure also provides an advisory service with recommended management actions and other alerts and notifications.
    Type: Application
    Filed: October 29, 2018
    Publication date: June 17, 2021
    Inventors: Wen-Liang Chen, Hsiao-Ching Lee, Chia-Heng Lin, Cheng-Hung Wu, Chun-Wei Liang, Tzu-Hsuan Lin, Tiffany Huang, Yi-Ting Chou, Ferng-Chang Chang, Peng-Tzu Chen, Chia-Hsuan Lin, Jung-Yu Liu, Chen-Chuan Wu, Tien-Yu Chang, Yu-Chiao Lo, Kai-Hsiang Su, Ying-Xin Li, Ming-Jie Guo
  • Patent number: 10999939
    Abstract: A circuit carrier board includes a first build-up layer structure, a substrate, an adhesive layer, and a conductive structure. The first build-up layer includes a plurality of first dielectric layers and a plurality of first circuit layers original stacked. The substrate includes a base and a second build-up layer structure disposed on the base. The second build-up layer structure includes a plurality of second dielectric layers and a plurality of second circuit layer original stacked. A top most layer of the second circuit layers is exposed outside of the second dielectric layers. The conductive structure penetrates through the first dielectric layers, the first circuit layers and the adhesive layer, and contacts with the top most layer of the second circuit layers. The conductive structure electrical connects the first circuit layers to the second circuit layers. A manufacturing method of the circuit carrier board is also provided.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: May 4, 2021
    Assignee: Unimicron Technology Corp.
    Inventors: Chun-Hsien Chien, Wen-Liang Yeh, Wei-Ti Lin
  • Publication number: 20210122756
    Abstract: This disclosure relates to crystalline forms of 3-acyl-buprenorphine derivatives and sustained release injectable pharmaceutical compositions for treatment of opioid dependence, pain or depression, including an aqueous suspension of crystalline 3-acyl-buprenoprhine, or a pharmaceutically acceptable salt thereof, wherein the composition does not include an organic solvent, a polylactide polymer, a polyglycolide polymer, or a copolymer of polylactide and polyglycolide. This disclosure also includes 3-acyl-buprenoprhine or a pharmaceutically acceptable salt thereof prepared in a controlled release matrix, including poly(lactide-co-glycolide), sucrose acetoisobutyrate, lecithin, diolein and a combination of two or more thereof.
    Type: Application
    Filed: May 10, 2019
    Publication date: April 29, 2021
    Inventors: Tong-Ho Lin, Yung-Shun Wen, Jui-Wen Liang
  • Patent number: 10977133
    Abstract: Improved methods, systems and apparatus for storing and repairing multimedia files are provided that overcome the limitations of existing multimedia file repair technologies. Backup copies of the multimedia container information associated with given multimedia content data are stored, along with the multimedia content data, on an external storage detachably coupled to a recording device. A primary copy of the multimedia container information is stored on an internal storage associated with the recording device. The recording of the primary container information and the content data is performed in real-time or nearly real-time as the content data is captured by the recording device. In the case of an abnormal event (e.g., battery failure, disconnect of storage media), container information may be selected from the primary copy or the backup copies of the container information, thereby increasing the likelihood that the container file can be successfully repaired or regenerated.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: April 13, 2021
    Assignee: SZ DJI TECHNOLOGY CO., LTD.
    Inventors: Gao Ping Bai, Tai Wen Liang, Yuan Hua Zheng, Mingyu Wang