Patents by Inventor Wen Chen

Wen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11914429
    Abstract: An electronic device includes a host, a display, a sliding plate, and a keyboard. The host has an operating surface. The display is pivoted to the host. The sliding plate is slidably disposed in the host, where the display is mechanically coupled to the sliding plate, and the sliding plate includes a plat portion and a recess portion that are arranged side by side. The keyboard is integrated to the host. The keyboard includes a key structure, where the key structure includes a key cap and a reciprocating element, and the key cap is exposed from the operating surface of the host. The reciprocating element is disposed between the key cap and the sliding plate and has a first end connected to the key cap and a second end contacting the sliding plate. The second end is located on a sliding path of the plat portion and the recess portion.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: February 27, 2024
    Assignee: Acer Incorporated
    Inventors: Hung-Chi Chen, Shun-Bin Chen, Huei-Ting Chuang, Yen-Chieh Chiu, Yu-Wen Lin, Yen-Chou Chueh, Po-Yi Lee
  • Patent number: 11916091
    Abstract: A backside illumination (BSI) image sensor and a method of forming the same are provided. A device includes a substrate and a plurality of photosensitive regions in the substrate. The substrate has a first side and a second side opposite to the first side. The device further includes an interconnect structure on the first side of the substrate, and a plurality of recesses on the second side of the substrate. The plurality of recesses extend into a semiconductor material of the substrate.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Wen Hsu, Jiech-Fun Lu, Yeur-Luen Tu, U-Ting Chen, Shu-Ting Tsai, Hsiu-Yu Cheng
  • Patent number: 11916151
    Abstract: Present disclosure provides a semiconductor structure, including a semiconductor fin having a first portion and a second portion over the first portion, a first conductive region abutting a first lateral surface of the first portion and a first lateral surface of the second portion, a metal gate having a bottom portion and an upper portion, the bottom portion being between the first portion and the second portion of the semiconductor fin, and the upper portion being over the second portion of the semiconductor fin, and a first spacer between the bottom portion of the metal gate and the first conductive region. A method for manufacturing the semiconductor structure described herein is also provided.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chia-Ming Hsu, Yi-Jing Li, Chih-Hsin Ko, Kuang-Hsin Chen, Da-Wen Lin, Clement Hsingjen Wann
  • Patent number: 11916432
    Abstract: A chip with power-glitch detection is provided, which includes a power terminal receiving power, an inverter, and a back-up power storage device coupled to the power terminal. The inverter has an input terminal coupled to the power terminal. The back-up power storage device transforms the power to back-up power. The inverter is powered by the back-up power when a power glitch occurs on the power terminal, and the power glitch is reflected at an output terminal of the inverter.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: February 27, 2024
    Assignee: MEDIATEK INC.
    Inventor: Pin-Wen Chen
  • Patent number: 11916012
    Abstract: A manufacturing method of a semiconductor structure is provided. A first semiconductor die includes a first semiconductor substrate, a first interconnect structure formed thereon, a first bonding conductor formed thereon, and a conductive via extending from the first interconnect structure toward a back surface of the first semiconductor substrate. The first semiconductor substrate is thinned to accessibly expose the conductive via to form a through semiconductor via (TSV). A second semiconductor die is bonded to the first semiconductor die. The second semiconductor die includes a second semiconductor substrate including an active surface facing the back surface of the first semiconductor substrate, a second interconnect structure between the second and the first semiconductor substrates, and a second bonding conductor between the second interconnect structure and the first semiconductor substrate and bonded to the TSV.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Fa Chen, Sung-Feng Yeh, Tzuan-Horng Liu, Chao-Wen Shih
  • Patent number: 11917189
    Abstract: A method of decoding a video signal, apparatus, and a non-transitory computer-readable storage medium are provided. The method includes obtaining a video block from the video signal, obtaining spatial neighboring blocks based on the video block, obtaining up to one left non-scaled motion vector predictor (MVP) based on the multiple left spatial neighboring blocks, obtaining up to one above non-scaled MVP based on the multiple above spatial neighboring blocks, deriving, at the decoder and by reducing possibility of selecting scaled MVPs derived from the spatial neighboring blocks, an MVP candidate list based on the video block, the multiple left spatial neighboring blocks, the multiple above spatial neighboring blocks, receiving a best MVP based on the MVP candidate list, and obtaining a prediction signal of the video block based on the best MVP.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: February 27, 2024
    Assignee: Beijing Dajia Internet Information Technology Co., Ltd.
    Inventors: Yi-Wen Chen, Xiaoyu Xiu, Tsung-Chuan Ma, Hong-Jheng Jhu, Shuiming Ye, Xianglin Wang
  • Patent number: 11913472
    Abstract: A centrifugal heat dissipation fan including a housing and an impeller disposed in the housing on an axis is provided. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions. A heat dissipation system of an electronic device is also provided.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: February 27, 2024
    Assignee: Acer Incorporated
    Inventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Chun-Chieh Wang, Shu-Hao Kuo
  • Patent number: 11912837
    Abstract: The present disclosure provides a thin film including a first thermoplastic polyolefin (TPO) elastomer which is anhydride-grafted. The present disclosure further provides a method for manufacturing the thin film, a laminated material and a method for adhesion.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: February 27, 2024
    Assignee: SAN FANG CHEMICAL INDUSTRY CO., LTD.
    Inventors: Chih-Yi Lin, Kuo-Kuang Cheng, Chi-Chin Chiang, Wen-Hsin Tai, Ming-Chen Chang
  • Patent number: 11917185
    Abstract: A method and apparatus of Inter prediction for video coding using Multi-hypothesis (MH) are disclosed. If an MH mode is used for the current block: at least one MH candidate is derived using reduced reference data by adjusting at least one coding-control setting; an Inter candidate list is generated, where the Inter candidate list comprises said at least one MH candidate; and current motion information associated with the current block is encoded using the Inter candidate list at the video encoder side or the current motion information associated with the current block is decoded at the video decoder side using the Merge candidate list. The coding control setting may correspond to prediction direction setting, filter tap setting, block size of reference block to be fetched, reference picture setting or motion limitation setting.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: February 27, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Man-Shu Chiang, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Patent number: 11914436
    Abstract: An example system can include a noise sensor communicatively coupled to a controller of a computing device to dynamically determine a sound pressure level (SPL) of an environment in which the computing device is present. The computing device can include a cooling fan and the controller comprising a processor in communication with a memory resource including instructions executable to dynamically determine a threshold speed of the cooling fan based on the determined SPL of the environment set a speed of the cooling fan based on the determined threshold speed.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: February 27, 2024
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Hung-Wen Chang, Ai-Tsung Li, Shih-Han Chen
  • Patent number: 11915666
    Abstract: A display device, a display driving integrated circuit (DDIC), and an operation method are provided. The display device includes a display panel, a first DDIC, and a second DDIC. The first DDIC generates a display synchronization signal, and drives a first display area of a display panel according to the display synchronization signal. The second DDIC is coupled to the first DDIC to receive the display synchronization signal. The second DDIC performs a frequency tracking operation on an internal clock signal of the second DDIC by selectively using the display synchronization signal. The second DDIC drives a second display area of the display panel according to the internal clock signal and the display synchronization signal.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: February 27, 2024
    Assignee: Novatek Microelectronics Corp.
    Inventors: Jung-Hsuan Sung, Kai-Wen Shao, Chien-Yu Chen
  • Publication number: 20240063101
    Abstract: A structure including a redistribution structure comprising dielectric layers and conductive layers alternately stacked is provided, wherein a dielectric layer among the dielectric layers of the redistribution structure comprises a first surface, a conductive layer among the conductive layers of the redistribution structure comprising a second surface, and the conductive layer comprises a wiring layer and a seed layer; and an under-bump metallization (UBM) layer comprises a third surface, a fourth surface opposite to the third surface, and a sidewall surface extending from the third surface to the fourth surface, wherein a portion of the seed layer is between the wiring layer and the UBM layer, and the UBM is in contact with the dielectric layer
    Type: Application
    Filed: August 22, 2022
    Publication date: February 22, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Wen Chen, Ming-Che Ho, Hung-Jui Kuo
  • Publication number: 20240061917
    Abstract: A driving record authentication method is provided. The method includes acquiring historical driving records of a driver and associated records of the driver. Once a non-fungible token image of the driver is minted based on the historical driving records and the associated records, the non-fungible token image is transmitted to a user terminal in response to a query request associated with the driver that sent the user terminal.
    Type: Application
    Filed: October 25, 2022
    Publication date: February 22, 2024
    Inventors: SHIH CHUN WANG, YU-WEN CHEN, SHIH-YIN TSENG, TING-YU DU
  • Publication number: 20240064296
    Abstract: A method and an apparatus for image filtering in video coding using a neural network are provided. The method includes: loading, a plurality of quantization parameter (QP) map (QpMap) values at a plurality of QpMap channels into the neural network; obtaining a QP scaling factor by adjusting a plurality of input QP values related to an input frame; and adjusting, according to a QP scaling factor, the plurality of QpMap values for the neural network to learn and filter the input frame to the neural network.
    Type: Application
    Filed: October 31, 2023
    Publication date: February 22, 2024
    Applicant: BEIJING DAJIA INTERNET INFORMATION TECHNOLOGY CO., LTD.
    Inventors: Wei CHEN, Xiaoyu XIU, Yi-Wen CHEN, Hong-Jheng JHU, Che-Wei KUO, Xianglin WANG, Bing YU
  • Patent number: 11909969
    Abstract: A method for video coding is provided. The method includes: partitioning video pictures into a plurality of coding units (CUs), at least one of which is further portioned into two prediction units (PUs) including at least one triangular shaped PU with a partitioning orientation in one of: from top-left corner to bottom-right corner, and from top-right corner to bottom-left corner; constructing a uni-prediction motion vector candidate list; determining whether a current CU is coded as triangle prediction mode according to coded information; signaling a partition orientation flag indicating the partitioning orientation; and signaling index values that indicate selected entries in the constructed uni-prediction motion vector candidate list.
    Type: Grant
    Filed: October 27, 2022
    Date of Patent: February 20, 2024
    Assignee: BEIJING DAJIA INTERNET INFORMATION TECHNOLOGY CO., LTD.
    Inventors: Xianglin Wang, Yi-Wen Chen
  • Patent number: 11907188
    Abstract: Techniques for managing data patterns involve: acquiring multiple sets of data patterns respectively associated with multiple collection devices, wherein a set of data patterns in the multiple sets of data patterns represent patterns of duplicate data in data from one of the multiple collection devices; dividing the multiple collection devices into multiple groups based on clusters of the multiple sets of data patterns; and determining, based on sets of data patterns associated with collection devices in a group in the multiple groups, a set of shared data patterns for sharing among the collection devices in the group. Accordingly, data patterns that can be shared among multiple collection devices can be determined in a more accurate and effective manner, thereby facilitating the removal of duplicate data from the multiple collection devices.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: February 20, 2024
    Assignee: EMC IP Holding Company LLC
    Inventors: Weilan Pu, Jian Kang, Chi Chen, Wen Chen
  • Patent number: 11905973
    Abstract: A fan assembly including a fan frame and an impeller. The fan frame includes a frame body and a first peripheral protruding plate and has an air inlet and an air outlet. The first peripheral protruding plate protrudes from a side of the frame body and forms an air channel together with the frame body. The first peripheral protruding plate is configured to reduce a noise made by the fan assembly. The air inlet is in fluid communication with the air outlet via the air channel. The impeller is rotatably disposed on the frame body and located in the air channel. The protruding height of the first peripheral protruding plate relative to the frame body ranges from 50 to 100 percent of an overall axial thickness of the impeller.
    Type: Grant
    Filed: June 22, 2022
    Date of Patent: February 20, 2024
    Assignees: MICRO-STAR INT'L CO., LTD., MSI COMPUTER (SHENZHEN) CO., LTD.
    Inventors: Yi Wen Chen, Yung Ching Huang, Shang-Chih Yang
  • Patent number: 11906997
    Abstract: A middle-range (mid) low dropout (LDO) voltage has both sinking and sourcing current capability. The mid LDO can provide a voltage reference in active mode and power mode for core only design to work in a Safe Operating Area (SOA). The output of mid LDO can track TO power and/or core power dynamically. The mid LDO can comprise a voltage reference generator and a power-down controller connected to an amplifier, which output is connected to a decoupling capacitor. The provision of a high ground signal allows the mid LDO provide the sinking and sourcing currents.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: February 20, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Szu-Chun Tsao, Yi-Wen Chen, Jaw-Juinn Horng
  • Publication number: 20240056086
    Abstract: A frequency locked loop circuit, comprising an operational circuit, a first impedance circuit, a second impedance circuit, a switching circuit and a frequency generation circuit. The operational circuit is configured to output an operational signal according to a voltage difference between a positive terminal and a negative terminal. The switching circuit is configured to periodically conduct the negative terminal to one of the first impedance node and the second impedance node, and periodically conduct the positive terminal to the other one of the first impedance node and the second impedance node. The frequency generation circuit is configured to periodically sample the operational signal to generate a sample signal to generate a clock signal. An operational frequency of the operational signal is an integer multiple of a sampling frequency of the frequency generation circuit.
    Type: Application
    Filed: October 29, 2023
    Publication date: February 15, 2024
    Inventors: Chin-Tung CHAN, Yan-Ting WANG, Ren-Hong LUO, Chih-Wen CHEN, Hao-Che HSU, Li-Wei LIN
  • Publication number: 20240057003
    Abstract: A method for small data transmission (SDT) in RRC_INACTIVE state and related devices are provided. The method includes receiving a first SDT Timing Advance Command Media Access Control (MAC) Control Element (CE) from the network; starting or restarting Timing Alignment Timer (TAT) upon the reception of a Timing Advance (TA) command carried by the first SDT Timing Advance Command MAC CE, for keeping uplink (UL) time alignment during SDT in RRC_INACTIVE state; and when UL data arriving in UE TX buffer, transmitting SDT to the network while the TAT is running. With this method, UL synchronization/timing maintenance in RRC_INACTIVE state is realized.
    Type: Application
    Filed: December 23, 2021
    Publication date: February 15, 2024
    Applicant: PURPLEVINE INNOVATION COMPANY LIMITED
    Inventor: Chiu-Wen CHEN