Patents by Inventor Wen-Chi Wang

Wen-Chi Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7181028
    Abstract: An audio converting device including a digital high-pass filter, an expander, a digital low-pass filter, a delta-sigma modulator, a digital-to-analog converter, an analog low-pass filter and a gain control unit is provided. The digital high-pass filter in this invention can filter out a direct-current component of digital audio data such that the production of noise is avoided when the volume is adjusted by users.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: February 20, 2007
    Assignee: Realtek Semiconductor Corp.
    Inventors: Shih-Yu Ku, Wen-Chi Wang, Yi-Shu Chang, Chao-Cheng Lee
  • Publication number: 20070030037
    Abstract: A reference voltage generating circuit includes a first capacitor having a first end and a second end; a second capacitor having a third end and a fourth end; a first switch for selectively coupling a predetermined voltage to the first end of the first capacitor; a second switch for selectively coupling the third end of the second capacitor to the first end of the first capacitor; a third switch for selectively coupling the first end of the first capacitor to a reference voltage level; and a fourth switch for selectively coupling the second end of the first capacitor to a reference voltage level; wherein the first capacitor samples the predetermined voltage in a first stage and re-distributes charges to the second capacitor in a second stage.
    Type: Application
    Filed: July 24, 2006
    Publication date: February 8, 2007
    Inventors: Wen-Chi Wang, Chang-Shun Liu, Chao-Cheng Lee, Jui-Yuan Tsai
  • Publication number: 20070024483
    Abstract: An application circuit and method for shaping noises are provided. In an embodiment, an analog-to-digital converter converts a first analog signal into an n-bit digital signal for an encoder to generate a p-bit digital signal. Then a control circuit generates a plurality of control signals based on the p-bit digital signal, wherein p is two to the power of n minus one, and n is an integer greater than one. Each of the (2n?1) unit elements with element mismatch in an internal n-bit digital-to-analog converter executes the digital to analog conversion in response to the corresponding control signal, thereby generating a second analog signal, and an adder outputs the first analog signal based on the second analog signal and a third analog signal.
    Type: Application
    Filed: April 20, 2006
    Publication date: February 1, 2007
    Inventors: Chieh-Chuan Chin, Bing-I Chang, Wen-Chi Wang
  • Patent number: 7138869
    Abstract: An amplifier circuit having a high time constant. An operational amplifier includes a non-converting input terminal coupled to a ground, a converting input terminal and an output terminal. A first resistor network including at least one stage is coupled between the converting input terminal and the output terminal. Each stage of the first resistor network includes a first node, a first current path and a second current path connected to the first node. The first current path of each stage of the first resistor network is connected to the first node of the next stage, the second current path of each stage of the first resistor network is grounded, and the first current path of the first stage of the first resistor network is connected to the converting input terminal. A loading unit is coupled between the converting input terminal and the output terminal.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: November 21, 2006
    Assignee: Realtek Semiconductors Corp.
    Inventors: Chao-Cheng Lee, Jui-Cheng Huang, Jui-Yuan Tsai, Wen-Chi Wang
  • Publication number: 20060197590
    Abstract: An amplifier includes a subtracting unit for generating an error signal according to an input signal and an output signal; a noise shaping unit for executing a noise shaping operation on the error signal to produce a noise-shaped signal; a pulse adjustment unit for generating a control signal according to the noise-shaped signal and the input signal; and a power stage for generating the output signal according to the control signal.
    Type: Application
    Filed: January 16, 2006
    Publication date: September 7, 2006
    Inventors: Wen-Chi Wang, Fu-Yi Hsieh, Yi-Chang Tu, Chieh-Chuan Chin
  • Patent number: 7071856
    Abstract: A pipeline ADC has a plurality of analog-to-digital conversion units cascaded in series to form a pipeline. An error correcting method for the pipeline ADC includes during a first mode, measuring the plurality of analog-to-digital conversion units utilizing an extra analog-to-digital conversion module; calculating a plurality of correction constant sets according to digital output values of the extra analog-to-digital conversion module in the measuring step; and during a second mode, correcting output signals of the plurality of analog-to-digital conversion units according to the correction constant sets.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: July 4, 2006
    Assignee: Realtek Semiconductor Corp.
    Inventors: Jui-Yuan Tsai, Wen-Chi Wang, Chia-Liang Chiang, Chao-Cheng Lee
  • Patent number: 7068107
    Abstract: The variable gain amplifier of the present invention includes at least an operation amplifier. By choosing one of output stages, a feedback resistor is selected and the gain of the variable gain amplifier is decided according to the resistance of the selected feedback resistor, as desired. By adjusting the gain of the variable gain amplifier, the received signals can be amplified or attenuated in accordance with design requirement. The variable gain amplifier can include a two-stage architecture, in which a first stage is used for coarse gain adjustment and a second stage is used for fine gain adjustment. The gain of the two-stage variable gain amplifier can be easily adjusted to a desired value.
    Type: Grant
    Filed: March 22, 2004
    Date of Patent: June 27, 2006
    Assignee: Realtek Semiconductor
    Inventors: Wen-Chi Wang, Chao-Cheng Lee, Jui-Cheng Huang, Jui-Yuan Tsai
  • Patent number: 7042373
    Abstract: A pipeline ADC includes a pipeline structure having a plurality of analog-to-digital converting units cascaded in series; and a correcting unit coupled to the pipeline structure for correcting an output value of the pipeline structure according to a set of calibration constants. One of the analog-to-digital converting units contains a capacitor switching circuit. During error measurement of the pipeline ADC, the capacitor switching circuit switches to change capacitance allocation of the analog-to-digital converting unit so as to obtain the set of calibration constants.
    Type: Grant
    Filed: April 11, 2005
    Date of Patent: May 9, 2006
    Assignee: Realtek Semiconductor Corp.
    Inventors: Jui-Yuan Tsai, Wen-Chi Wang, Chia-Liang Chiang, Chao-Cheng Lee
  • Patent number: 7019552
    Abstract: The line driver with active termination includes: a differential amplifier having an inverting output terminal, a non-inverting output terminal, an inverting input terminal, and a non-inverting input terminal; a first resistor unit coupled to the inverting input terminal; a impedance matching resistor unit coupled to the non-inverting output terminal; and a resistive feedback network, having a plurality of resistors in symmetric configuration. The resistive feedback network further includes: a second resistor unit coupled to the impedance matching resistor unit and the inverting input terminal; a third resistor unit coupled to the non-inverting output terminal and the inverting input terminal; a fourth resistor unit coupled to the impedance matching resistor unit and the inverting input terminal; and a fifth resistor unit coupled to the inverting output terminal and the inverting input terminal.
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: March 28, 2006
    Assignee: Realtek Semiconductor Corp.
    Inventors: Wen-Chi Wang, Chao-Cheng Lee, Jui-Yuan Tsai
  • Publication number: 20060044015
    Abstract: An output stage structure includes first and second PMOS transistors and first and second NMOS transistors, wherein the MOS transistors are manufactured with a twin well process. The first PMOS transistor has a source coupled to a supply voltage (VDD), and a gate coupled to the first voltage. The second PMOS transistor has a source coupled to a drain of the first PMOS transistor, a gate coupled to the second voltage, and a drain coupled to an output pad. The first NMOS transistor has a drain coupled to the output pad, and a gate coupled to the third voltage. The second NMOS transistor has a drain coupled to source of the first NMOS transistor, a gate coupled to the fourth voltage, and a source coupled to ground.
    Type: Application
    Filed: August 25, 2005
    Publication date: March 2, 2006
    Inventors: Chao-Cheng Lee, Yung-Hao Lin, Wen-Chi Wang, Jui-Yuan Tsai
  • Publication number: 20050284572
    Abstract: A system for heating a load-lock chamber, particularly that of a plasma etching system for etching semiconductor wafer substrates. The load-lock chamber heating system includes a heater that is provided in fluid communication with a gas supply which contains an inert gas such as nitrogen. A gas pump pumps the gas from the gas supply through the heater, and from the heater into the load-lock chamber. The gas heats the load-lock chamber to prevent or minimize condensation of corrosive etching gases onto the interior surfaces of the load-lock chamber as well as the surfaces of substrates contained therein.
    Type: Application
    Filed: June 29, 2004
    Publication date: December 29, 2005
    Inventors: Wen-Ming Chen, Wen-Chi Wang, Kou-Ien Chang
  • Publication number: 20050225462
    Abstract: A pipeline ADC has a plurality of analog-to-digital conversion units cascaded in series to form a pipeline. An error correcting method for the pipeline ADC includes during a first mode, measuring the plurality of analog-to-digital conversion units utilizing an extra analog-to-digital conversion module; calculating a plurality of correction constant sets according to digital output values of the extra analog-to-digital conversion module in the measuring step; and during a second mode, correcting output signals of the plurality of analog-to-digital conversion units according to the correction constant sets.
    Type: Application
    Filed: April 12, 2005
    Publication date: October 13, 2005
    Inventors: Jui-Yuan Tsai, Wen-Chi Wang, Chia-Liang Chiang, Chao-Cheng Lee
  • Publication number: 20050225470
    Abstract: A pipeline ADC for converting an analog input signal to a digital output signal includes: a plurality of analog-to-digital converting units cascading in series to form a pipeline including a plurality of digital output ends; a calculation unit coupled to the analog-to-digital converting units for generating a plurality of calibration parameters in a first mode according to signals at the digital output ends; and a calibration unit coupled to the calculation unit and the analog-to-digital converting units for calibrating signals at the digital output ends in a second mode according to the calibration parameters, so as to generate the digital output signal.
    Type: Application
    Filed: April 8, 2005
    Publication date: October 13, 2005
    Inventors: Jui-Yuan Tsai, Wen-Chi Wang, Chia-Liang Chiang, Chao-Cheng Lee
  • Publication number: 20050225461
    Abstract: A pipeline ADC includes a pipeline structure having a plurality of analog-to-digital converting units cascaded in series; and a correcting unit coupled to the pipeline structure for correcting an output value of the pipeline structure according to a set of calibration constants. One of the analog-to-digital converting units contains a capacitor switching circuit. During error measurement of the pipeline ADC, the capacitor switching circuit switches to change capacitance allocation of the analog-to-digital converting unit so as to obtain the set of calibration constants.
    Type: Application
    Filed: April 11, 2005
    Publication date: October 13, 2005
    Inventors: Jui-Yuan Tsai, Wen-Chi Wang, Chia-Liang Chiang, Chao-Cheng Lee
  • Patent number: 6911927
    Abstract: The present invention offers an over-sampling digital-to-analog converter with variable sampling frequencies to process input signals of variable sampling frequencies. The over-sampling digital-to-analog converter comprises an expander, which expands said input signals with a fixed rate of M to produce over-sampling signals; a digital low-pass filter, which filters out high-frequency ingredients of over-sampling signals and then outputs data with a first rate; a data buffer, which receives the outputted data by said digital low-pass filter with the first rate and outputs the data with a second rate; a modulator, which reads data in said data buffer with the second rate and modulates the data; a digital-to-analog converter, which converts the modulated data to analog signals; and an analog low-pass filter, which filters out high-frequency ingredients of said analog signals for producing output signals.
    Type: Grant
    Filed: December 5, 2002
    Date of Patent: June 28, 2005
    Assignee: Realtek Semiconductor Corp.
    Inventors: Wen-Chi Wang, Shih-Yu Ku, Jui-Cheng Huang, Yi-Shu Chang
  • Publication number: 20040239421
    Abstract: The variable gain amplifier of the present invention includes at least an operation amplifier. By choosing one of output stages, a feedback resistor is selected and the gain of the variable gain amplifier is decided according to the resistance of the selected feedback resistor, as desired. By adjusting the gain of the variable gain amplifier, the received signals can be amplified or attenuated in accordance with design requirement. The variable gain amplifier can include a two-stage architecture, in which a first stage is used for coarse gain adjustment and a second stage is used for fine gain adjustment. The gain of the two-stage variable gain amplifier can be easily adjusted to a desired value.
    Type: Application
    Filed: March 22, 2004
    Publication date: December 2, 2004
    Applicant: Realtek Semiconductor Corp.
    Inventors: Wen-Chi Wang, Chao-Cheng Lee, Jui-Cheng Huang, Jui-Yuan Tsai
  • Publication number: 20040239545
    Abstract: An AFE device with adjustable bandwidth filtering functions includes an input buffer and an ADC, and the adjustable bandwidth filtering functions may be integrated in the ADC or the input buffer. When they are integrated in the ADC, a capacitor and a switch module in the ADC may implement the functions, wherein the capacitor originally samples and holds analog signals. The switch module includes a plurality of transistor switches connected in parallel, and one (or multiple ones connected in parallel) of the transistor switches may be selected, according to a selection code, as an equivalent resistor to be serially connected to the capacitor to form a filter circuit. The selection code may be a one-of-N code or a thermometer code.
    Type: Application
    Filed: February 4, 2004
    Publication date: December 2, 2004
    Inventors: Jui-Yuan Tsai, Jui-Cheng Huang, Chao-Cheng Lee, Wen-Chi Wang
  • Publication number: 20040232981
    Abstract: An amplifier circuit having a high time constant. An operational amplifier includes a non-converting input terminal coupled to a ground, a converting input terminal and an output terminal. A first resistor network including at least one stage is coupled between the converting input terminal and the output terminal. Each stage of the first resistor network includes a first node, a first current path and a second current path connected to the first node. The first current path of each stage of the first resistor network is connected to the first node of the next stage, the second current path of each stage of the first resistor network is grounded, and the first current path of the first stage of the first resistor network is connected to the converting input terminal. A loading unit is coupled between the converting input terminal and the output terminal.
    Type: Application
    Filed: December 31, 2003
    Publication date: November 25, 2004
    Inventors: Chao-Cheng Lee, Jui-Cheng Huang, Jui-Yuan Tsai, Wen-Chi Wang
  • Publication number: 20040232977
    Abstract: A filter circuit of the present invention provides a transconductance device for outputting a current signal according to an input voltage and a feedback voltage; a transresistance device coupled to the transconductance device for outputting a output voltage according to the current signal; and a feedback device coupled between the transconductance device and the transresistance device for outputting the feedback voltage according to the output voltage. The transresistance device is coupled to the transconductance device via a resistor network comprising a plurality of stages connected serially, wherein each stage of the resistor network comprises: an input node; an output node; a first resistor coupled between the input node and the ground; and a second resistor coupled between the input node and the output node.
    Type: Application
    Filed: December 31, 2003
    Publication date: November 25, 2004
    Inventors: Chao-Cheng Lee, Jui-Cheng Huang, Jui-Yuan Tsai, Wen-Chi Wang
  • Patent number: 6822575
    Abstract: A backfill prevention system for a gas flow conduit, comprising a gas flow monitor circuit which measures the rate and direction of gas flow through a gas flow conduit and converts the measured data into a voltage signal. A valve control circuit operably connected to a valve or valves in the gas flow conduit receives the voltage signal from the gas flow monitor circuit and closes the valve or valves in the event that the voltage signal indicates backflow of a gas through the gas flow conduit. The valve control conduit may further be provided with a first light emitting diode (LED) which is illuminated during normal flow of the gas through the conduit, and a second LED which is illuminated in the event of gas backflow through the conduit. The system is typically used in conjunction with a mass flow controller in the conduit.
    Type: Grant
    Filed: July 25, 2002
    Date of Patent: November 23, 2004
    Assignee: Taiwan SEmiconductor Manufacturing, Co., Ltd
    Inventors: Wen-Ming Chen, Wen-Chi Wang, Ming-Shong Fu, Jing-Hou Chen