Abstract: A semiconductor device includes a substrate, a channel layer, a spacer layer, a barrier layer, and an oxidized cap layer. The channel layer is disposed on or above the substrate. The spacer layer is disposed on the channel layer. The barrier layer is disposed on the spacer layer. The oxidized cap layer is disposed on the barrier layer. The oxidized cap layer is made of oxynitride.

Abstract: A semiconductor device includes a substrate, an active layer, a source electrode, a drain electrode, a gate electrode, a first metal layer, and a second metal layer. The active layer is disposed on the substrate. The source electrode and the drain electrode are electrically connected to the active layer. The gate electrode is disposed on the active layer and between the source electrode and the drain electrode. The gate electrode has a first extending portion extending toward the drain electrode. The first metal layer is partially disposed between the first extending portion and the active layer, and extends toward the drain electrode. The second metal layer is disposed above the first extending portion and extends toward the drain electrode. Another portions of the first and second metal layers protrude from the first extending portion. The first metal layer and the second metal layer are electrically connected to the source electrode.

Abstract: A semiconductor device including a substrate, a plurality of III-nitride semiconductor layers, a source electrode, a gate electrode, a drain electrode, and a doped layer. The III-nitride semiconductor layers are disposed on the substrate. A two dimensional electron gas (2DEG) channel is formed in the III-nitride semiconductor layers. The source electrode, the gate electrode, and the drain electrode are disposed on the III-nitride semiconductor layers. The gate electrode is located between the source electrode and the drain electrode. The source electrode and the drain electrode are electrically connected to the 2DEG channel. A lateral direction is defined from the source electrode to the drain electrode. The doped layer is disposed between the gate electrode and the III-nitride semiconductor layers. The doped layer includes a plurality of dopants, and a concentration of the dopants varies along the lateral direction.

Abstract: A semiconductor device includes a substrate, an active layer, a transistor, and a capacitor. The active layer is disposed on the substrate, and the active layer is divided into a first portion and a second portion. The transistor and the capacitor are disposed on the substrate. The transistor includes the second portion, a source electrode, a drain electrode, and a gate electrode. The source electrode and the drain electrode are respectively and electrically connected to the second portion. The gate electrode is disposed on the second portion. The capacitor includes the first portion, a first electrode, a first insulating layer, and a second electrode. The first electrode is electrically connected to the first portion and the source electrode. The first insulating layer is disposed on the first portion. The second electrode is disposed on the first insulating layer and is electrically connected to the gate electrode.

Abstract: A semiconductor device includes a substrate, a channel layer, a spacer layer, a barrier layer, and an oxidized cap layer. The channel layer is disposed on or above the substrate. The spacer layer is disposed on the channel layer. The barrier layer is disposed on the spacer layer. The oxidized cap layer is disposed on the barrier layer. The oxidized cap layer is made of oxynitride.

Abstract: A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, an interlayer dielectric, an inter-source layer, an inter-source plug, an inter-drain layer, an inter-drain plug, an inter-gate layer, and an inter-gate plug. The active layer is made of III-V group semiconductors. The source electrode, the drain electrode, and the gate electrode are disposed on the active layer. The gate electrode is disposed between the source electrode and the drain electrode. The interlayer dielectric covers the source electrode, the drain electrode, and the gate electrode. The inter-source layer, the inter-drain layer, and the inter-gate layer are disposed on the interlayer dielectric. The inter-source plug is electrically connected to the source electrode and the inter-source layer. The inter-drain plug is electrically connected to the drain electrode and the inter-drain layer. The inter-gate plug is electrically connected to the gate electrode and the inter-gate layer.

Abstract: A semiconductor device includes a substrate, an active layer, a transistor, and a capacitor. The active layer is disposed on the substrate, and the active layer is divided into a first portion and a second portion. The transistor and the capacitor are disposed on the substrate. The transistor includes the second portion, a source electrode, a drain electrode, and a gate electrode. The source electrode and the drain electrode are respectively and electrically connected to the second portion. The gate electrode is disposed on the second portion. The capacitor includes the first portion, a first electrode, a first insulating layer, and a second electrode. The first electrode is electrically connected to the first portion and the source electrode. The first insulating layer is disposed on the first portion. The second electrode is disposed on the first insulating layer and is electrically connected to the gate electrode.

Abstract: A semiconductor device includes a substrate, an active layer, a source electrode, a drain electrode, a gate electrode, a first metal layer, and a second metal layer. The active layer is disposed on the substrate. The source electrode and the drain electrode are electrically connected to the active layer. The gate electrode is disposed on the active layer and between the source electrode and the drain electrode. The gate electrode has a first extending portion extending toward the drain electrode. The first metal layer is partially disposed between the first extending portion and the active layer, and extends toward the drain electrode. The second metal layer is disposed above the first extending portion and extends toward the drain electrode. Another portions of the first and second metal layers protrude from the first extending portion. The first metal layer and the second metal layer are electrically connected to the source electrode.

Abstract: A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, an interlayer dielectric, an inter-source layer, an inter-source plug, an inter-drain layer, an inter-drain plug, an inter-gate layer, and an inter-gate plug. The active layer is made of III-V group semiconductors. The source electrode, the drain electrode, and the gate electrode are disposed on the active layer. The gate electrode is disposed between the source electrode and the drain electrode. The interlayer dielectric covers the source electrode, the drain electrode, and the gate electrode. The inter-source layer, the inter-drain layer, and the inter-gate layer are disposed on the interlayer dielectric. The inter-source plug is electrically connected to the source electrode and the inter-source layer. The inter-drain plug is electrically connected to the drain electrode and the inter-drain layer. The inter-gate plug is electrically connected to the gate electrode and the inter-gate layer.

Abstract: A semiconductor device includes a substrate, an active layer, a source electrode, a drain electrode, a gate electrode, a field plate, a first passivation layer, and a metal layer. The active layer is disposed on the substrate. The source electrode and the drain electrode are respectively electrically connected to the active layer. The gate electrode is disposed between the source electrode and the drain electrode and above the active layer. The field plate is disposed above the active layer and between the gate electrode and the drain electrode. The first passivation layer covers the gate electrode and the field plate. The metal layer is disposed on the first passivation layer, is disposed above the gate electrode and the field plate, and is electrically connected to the source electrode.

Abstract: A semiconductor device includes a substrate, a channel layer, a spacer layer, a barrier layer, and an oxidized cap layer. The channel layer is disposed on or above the substrate. The spacer layer is disposed on the channel layer. The barrier layer is disposed on the spacer layer. The oxidized cap layer is disposed on the barrier layer. The oxidized cap layer is made of oxynitride.

Abstract: A power semiconductor device and a method for fabricating the same are provided. The power semiconductor device includes a substrate and an active layer on the substrate. A gate electrode is disposed on the active layer. A first electrode and a second electrode are disposed on the active layer, on opposite sides of the gate electrode. A first metal pattern is coupled to the first electrode. A second metal pattern is coupled to the second electrode. A first insulating layer is disposed on the first and second metal patterns. A third metal pattern covers the first insulating layer, coupled to the second metal pattern. An interface between the third metal pattern and the first insulating layer is a substantially planar surface.

Abstract: A semiconductor device and a cascode circuit are disclosed herein. The semiconductor device includes a first transistor and a second transistor. The first transistor includes a first electrode, a second electrode, a control electrode, and a control pad. The second transistor includes a first electrode, a second electrode, a control electrode, and a control pad. The second electrode of the first transistor is configured to receive a first predetermined voltage. The control electrode of the first transistor is configured to receive an input signal. The first electrode of the second transistor configured to receive a second predetermined voltage. The second electrode of the second transistor is electrically coupled to the first electrode of the first transistor. The control pad is disposed between the first electrode of the second transistor and the control electrode of the second transistor, and is configured to receive a first adjust signal.

Abstract: A light emitting semiconductor element includes at least two electrically conductive units, at least a light emitting semiconductor die and a light transmitting layer. A groove is located between the two electrically conductive units. The light emitting semiconductor die is cross over the electrically conductive units. The light transmitting layer covers the light emitting semiconductor and partially fills within the groove for linking the electrically conductive units.

Abstract: A semiconductor device includes a substrate, an active layer, a source electrode, a drain electrode, a p-type doped layer, a gate electrode, a passivation layer, and a field plate. The active layer is disposed on the substrate. The source electrode, the drain electrode and the p-type doped layer are disposed on the active layer. The p-type doped layer is disposed between the source electrode and the drain electrode, and has a first thickness. The gate electrode is disposed on the p-type doped layer. The passivation layer covers the gate electrode and the active layer. The field plate is disposed on the passivation layer and is electrically connected to the source electrode. The field plate includes a field dispersion portion disposed between the gate electrode and the drain electrode. The passivation layer between the field dispersion portion and the active layer has a second thickness smaller than the first thickness.

Abstract: A semiconductor device and a cascode circuit are disclosed herein. The semiconductor device includes a first transistor and a second transistor. The first transistor includes a first electrode, a second electrode, a control electrode, and a control pad. The second transistor includes a first electrode, a second electrode, a control electrode, and a control pad. The second electrode of the first transistor is configured to receive a first predetermined voltage. The control electrode of the first transistor is configured to receive an input signal. The first electrode of the second transistor configured to receive a second predetermined voltage. The second electrode of the second transistor is electrically coupled to the first electrode of the first transistor. The control pad is disposed between the first electrode of the second transistor and the control electrode of the second transistor, and is configured to receive a first adjust signal.

Abstract: A semiconductor device includes a substrate, a channel layer, a spacer layer, a barrier layer, and an oxidized cap layer. The channel layer is disposed on or above the substrate. The spacer layer is disposed on the channel layer. The barrier layer is disposed on the spacer layer. The oxidized cap layer is disposed on the barrier layer. The oxidized cap layer is made of oxynitride.

Abstract: A semiconductor device package includes a substrate, a transistor, and a lead frame disposed on a side of the substrate opposite to the transistor. The transistor is disposed on the substrate, and includes an active layer, a source electrode, a drain electrode, a gate electrode, a first insulating layer, a first source pad, a first drain pad, a source plug, and a drain plug. The source and the drain electrodes are disposed on the active layer. An orthogonal projection of the source electrode on the active layer forms a source region. The first insulating layer covers at least a portion of the source electrode and at least a portion of the drain electrode. The first source pad and the first drain pad are disposed on the first insulating layer. An orthogonal projection of the first source pad on the active layer forms a source pad region overlaps the drain region.

Abstract: A semiconductor device package includes a substrate, a transistor, and a lead frame disposed on a side of the substrate opposite to the transistor. The transistor is disposed on the substrate, and includes an active layer, a source electrode, a drain electrode, a gate electrode, a first insulating layer, a first source pad, a first drain pad, a source plug, and a drain plug. The source and the drain electrodes are disposed on the active layer. An orthogonal projection of the source electrode on the active layer forms a source region. The first insulating layer covers at least a portion of the source electrode and at least a portion of the drain electrode. The first source pad and the first drain pad are disposed on the first insulating layer. An orthogonal projection of the first source pad on the active layer forms a source pad region overlaps the drain region.

Abstract: An illumination apparatus includes a first light-emitting device, a second light-emitting device, and a third light-emitting device. The light emitted from the third light-emitting device is selectively mixed with the light emitted from the first light-emitting device or the second light-emitting device to form a white light having a chromaticity coordinate point substantially located on a Black Body Locus. A color of the light emitted from the third light-emitting device is determined by linear relationships between chromaticity coordinate points corresponding to wavelengths of the lights emitted form the first light-emitting device and the second light-emitting device and corresponding to a color temperature of the white light. A method for generating a white light is also disclosed herein.