Patents by Inventor Wen-Chiang Tu
Wen-Chiang Tu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10741459Abstract: In fabrication of an integrated circuit having a layer with a plurality of conductive interconnects, a layer of a substrate is polished to provide the layer of the integrated circuit. The layer of the substrate includes conductive lines to provide the conductive interconnects. The layer of the substrate includes a closed conductive loop formed of a conductive material in a trench. A depth of the conductive material in the trench is monitored using an inductive monitoring system and a signal is generated. Monitoring includes generating a magnetic field that intermittently passes through the closed conductive loop. A sequence of values over time is extracted from the signal, the sequence of values representing the depth of the conductive material over time.Type: GrantFiled: October 2, 2018Date of Patent: August 11, 2020Assignee: Applied Materials, Inc.Inventors: Wei Lu, Zhefu Wang, Zhihong Wang, Hassan G. Iravani, Dominic J. Benvegnu, Ingemar Carlsson, Boguslaw A. Swedek, Wen-Chiang Tu
-
Patent number: 10589397Abstract: A difference between a first expected required polish time for a first substrate and a second expected required polish time for a second substrate is determined using a first pre-polish thickness and a second pre-polish thickness measured at an in-line metrology station. A duration of an initial period is determined based on the difference between the first expected required polish time and the second expected required polish time. For the initial period at a beginning of a polishing operation, no pressure is applied to whichever of the first substrate and the second substrate has a lesser expected required polish time while simultaneously pressure is applied to whichever of the first substrate and the second substrate has a greater expected required polish time. After the initial period, pressure is applied to both the first substrate and the second substrate.Type: GrantFiled: February 3, 2017Date of Patent: March 17, 2020Assignee: Applied Materials, Inc.Inventors: Alain Duboust, Wen-Chiang Tu, Shih-Haur Shen, Jimin Zhang, Ingemar Carlsson, Boguslaw A. Swedek, Zhihong Wang, Stephen Jew, David H. Mai, Huyen Tran
-
Patent number: 10556315Abstract: A method of controlling polishing includes polishing a substrate at a first polishing station, monitoring the substrate with a first eddy current monitoring system to generate a first signal, determining an ending value of the first signal for an end of polishing of the substrate at the first polishing station, determining a first temperature at the first polishing station, polishing the substrate at a second polishing station, monitoring the substrate with a second eddy current monitoring system to generate a second signal, determining a starting value of the second signal for a start of polishing of the substrate at the second polishing station, determining a gain for the second polishing station based on the ending value, the starting value and the first temperature, and calculating a third signal based on the second signal and the gain.Type: GrantFiled: January 4, 2019Date of Patent: February 11, 2020Assignee: Applied Materials, Inc.Inventors: Kun Xu, Shih-Haur Shen, Boguslaw A. Swedek, Ingemar Carlsson, Doyle E. Bennett, Wen-Chiang Tu, Hassan G. Iravani, Tzu-Yu Liu
-
Patent number: 10464184Abstract: Before a first surface of a substrate is polished using a chemical mechanical process, the substrate is transferred to a modification station. The substrate comprises a side wall connected with the first surface at an edge and a second surface opposite to the first surface and also connected to the side wall. The first surface is substantially flat. The side wall is substantially perpendicular to the first surface. The edge of the substrate is modified at the modification station by removing material from a region of the first surface. The side wall of the substrate is a boundary of the region. The modified edge comprises a modified first surface that tapers within the region towards the second surface. The side wall remains substantially perpendicular to the first surface.Type: GrantFiled: May 7, 2014Date of Patent: November 5, 2019Assignee: Applied Materials, Inc.Inventors: Jimin Zhang, Zhihong Wang, Wen-Chiang Tu
-
Publication number: 20190134775Abstract: A method of controlling polishing includes polishing a substrate at a first polishing station, monitoring the substrate with a first eddy current monitoring system to generate a first signal, determining an ending value of the first signal for an end of polishing of the substrate at the first polishing station, determining a first temperature at the first polishing station, polishing the substrate at a second polishing station, monitoring the substrate with a second eddy current monitoring system to generate a second signal, determining a starting value of the second signal for a start of polishing of the substrate at the second polishing station, determining a gain for the second polishing station based on the ending value, the starting value and the first temperature, and calculating a third signal based on the second signal and the gain.Type: ApplicationFiled: January 4, 2019Publication date: May 9, 2019Inventors: Kun Xu, Shih-Haur Shen, Boguslaw A. Swedek, Ingemar Carlsson, Doyle E. Bennett, Wen-Chiang Tu, Hassan G. Iravani, Tzu-Yu Liu
-
Patent number: 10207386Abstract: A method of controlling polishing includes polishing a substrate at a first polishing station, monitoring the substrate with a first eddy current monitoring system to generate a first signal, determining an ending value of the first signal for an end of polishing of the substrate at the first polishing station, determining a first temperature at the first polishing station, polishing the substrate at a second polishing station, monitoring the substrate with a second eddy current monitoring system to generate a second signal, determining a starting value of the second signal for a start of polishing of the substrate at the second polishing station, determining a gain for the second polishing station based on the ending value, the starting value and the first temperature, and calculating a third signal based on the second signal and the gain.Type: GrantFiled: February 17, 2016Date of Patent: February 19, 2019Assignee: Applied Materials, Inc.Inventors: Kun Xu, Shih-Haur Shen, Boguslaw A. Swedek, Ingemar Carlsson, Doyle E. Bennett, Wen-Chiang Tu, Hassan G. Iravani, Tzu-Yu Liu
-
Patent number: 10199281Abstract: A substrate for use in fabrication of an integrated circuit has a layer with a plurality of conductive interconnects. The substrate includes a semiconductor body, a dielectric layer disposed over the semiconductor body, a plurality of conductive lines of a conductive material disposed in first trenches in the dielectric layer to provide the conductive interconnects, and a closed conductive loop structure of the conductive material disposed in second trenches in the dielectric layer. The closed conductive loop is not electrically connected to any of the conductive lines.Type: GrantFiled: February 7, 2018Date of Patent: February 5, 2019Assignee: Applied Materials, Inc.Inventors: Wei Lu, Zhihong Wang, Wen-Chiang Tu, Zhefu Wang, Hassan G. Iravani, Boguslaw A. Swedek, Fred C. Redeker, William H. McClintock
-
Publication number: 20190035699Abstract: In fabrication of an integrated circuit having a layer with a plurality of conductive interconnects, a layer of a substrate is polished to provide the layer of the integrated circuit. The layer of the substrate includes conductive lines to provide the conductive interconnects. The layer of the substrate includes a closed conductive loop formed of a conductive material in a trench. A depth of the conductive material in the trench is monitored using an inductive monitoring system and a signal is generated. Monitoring includes generating a magnetic field that intermittently passes through the closed conductive loop. A sequence of values over time is extracted from the signal, the sequence of values representing the depth of the conductive material over time.Type: ApplicationFiled: October 2, 2018Publication date: January 31, 2019Inventors: Wei Lu, Zhefu Wang, Zhihong Wang, Hassan G. Iravani, Dominic J. Benvegnu, Ingemar Carlsson, Boguslaw A. Swedek, Wen-Chiang Tu
-
Patent number: 10103073Abstract: In fabrication of an integrated circuit having a layer with a plurality of conductive interconnects, a layer of a substrate is polished to provide the layer of the integrated circuit. The layer of the substrate includes conductive lines to provide the conductive interconnects. The layer of the substrate includes a closed conductive loop formed of a conductive material in a trench. A depth of the conductive material in the trench is monitored using an inductive monitoring system and a signal is generated. Monitoring includes generating a magnetic field that intermittently passes through the closed conductive loop. A sequence of values over time is extracted from the signal, the sequence of values representing the depth of the conductive material over time.Type: GrantFiled: September 1, 2017Date of Patent: October 16, 2018Assignee: Applied Materials, Inc.Inventors: Wei Lu, Zhefu Wang, Zhihong Wang, Hassan G. Iravani, Dominic J. Benvegnu, Ingemar Carlsson, Boguslaw A. Swedek, Wen-Chiang Tu
-
Publication number: 20180166347Abstract: A substrate for use in fabrication of an integrated circuit has a layer with a plurality of conductive interconnects. The substrate includes a semiconductor body, a dielectric layer disposed over the semiconductor body, a plurality of conductive lines of a conductive material disposed in first trenches in the dielectric layer to provide the conductive interconnects, and a closed conductive loop structure of the conductive material disposed in second trenches in the dielectric layer. The closed conductive loop is not electrically connected to any of the conductive lines.Type: ApplicationFiled: February 7, 2018Publication date: June 14, 2018Inventors: Wei Lu, Zhihong Wang, Wen-Chiang Tu, Zhefu Wang, Hassan G. Iravani, Boguslaw A. Swedek, Fred C. Redeker, William H. McClintock
-
Patent number: 9911664Abstract: A substrate for use in fabrication of an integrated circuit has a layer with a plurality of conductive interconnects. The substrate includes a semiconductor body, a dielectric layer disposed over the semiconductor body, a plurality of conductive lines of a conductive material disposed in first trenches in the dielectric layer to provide the conductive interconnects, and a closed conductive loop structure of the conductive material disposed in second trenches in the dielectric layer. The closed conductive loop is not electrically connected to any of the conductive lines.Type: GrantFiled: June 23, 2014Date of Patent: March 6, 2018Assignee: Applied Materials, Inc.Inventors: Wei Lu, Zhihong Wang, Wen-Chiang Tu, Zhefu Wang, Hassan G. Iravani, Boguslaw A. Swedek, Fred C. Redeker, William H. McClintock
-
Publication number: 20180056476Abstract: An apparatus for chemical mechanical polishing includes a platen having a surface to support a polishing pad, a carrier head to hold a substrate against a polishing surface of the polishing pad, a pad conditioner including a conductive body to be pressed against the polishing surface, an in-situ polishing pad thickness monitoring system including a sensor disposed in the platen to generate a magnetic field that passes through the polishing pad, and a controller configured to receive a signal from the monitoring system and generate a measure of polishing pad thickness based on a portion of the signal corresponding to a time that the sensor is below the conductive body of the pad conditioner.Type: ApplicationFiled: August 25, 2017Publication date: March 1, 2018Inventors: Jimin Zhang, Zhihong Wang, Harry Q. Lee, Brian J. Brown, Wen-Chiang Tu, William H. McClintock, Wei Lu
-
Publication number: 20170365532Abstract: In fabrication of an integrated circuit having a layer with a plurality of conductive interconnects, a layer of a substrate is polished to provide the layer of the integrated circuit. The layer of the substrate includes conductive lines to provide the conductive interconnects. The layer of the substrate includes a closed conductive loop formed of a conductive material in a trench. A depth of the conductive material in the trench is monitored using an inductive monitoring system and a signal is generated. Monitoring includes generating a magnetic field that intermittently passes through the closed conductive loop. A sequence of values over time is extracted from the signal, the sequence of values representing the depth of the conductive material over time.Type: ApplicationFiled: September 1, 2017Publication date: December 21, 2017Inventors: Wei Lu, Zhefu Wang, Zhihong Wang, Hassan G. Iravani, Dominic J. Benvegnu, Ingemar Carlsson, Boguslaw A. Swedek, Wen-Chiang Tu
-
Patent number: 9754846Abstract: In fabrication of an integrated circuit having a layer with a plurality of conductive interconnects, a layer of a substrate is polished to provide the layer of the integrated circuit. The layer of the substrate includes conductive lines to provide the conductive interconnects. The layer of the substrate includes a closed conductive loop formed of a conductive material in a trench. A depth of the conductive material in the trench is monitored using an inductive monitoring system and a signal is generated. Monitoring includes generating a magnetic field that intermittently passes through the closed conductive loop. A sequence of values over time is extracted from the signal, the sequence of values representing the depth of the conductive material over time.Type: GrantFiled: June 23, 2014Date of Patent: September 5, 2017Assignee: Applied Materials, Inc.Inventors: Wei Lu, Zhefu Wang, Zhihong Wang, Hassan G. Iravani, Dominic J. Benvegnu, Ingemar Carlsson, Boguslaw A. Swedek, Wen-Chiang Tu
-
Publication number: 20170151647Abstract: A difference between a first expected required polish time for a first substrate and a second expected required polish time for a second substrate is determined using a first pre-polish thickness and a second pre-polish thickness measured at an in-line metrology station. A duration of an initial period is determined based on the difference between the first expected required polish time and the second expected required polish time. For the initial period at a beginning of a polishing operation, no pressure is applied to whichever of the first substrate and the second substrate has a lesser expected required polish time while simultaneously pressure is applied to whichever of the first substrate and the second substrate has a greater expected required polish time. After the initial period, pressure is applied to both the first substrate and the second substrate.Type: ApplicationFiled: February 3, 2017Publication date: June 1, 2017Applicant: Applied Materials, Inc.Inventors: Alain Duboust, Wen-Chiang Tu, Shih-Haur Shen, Jimin Zhang, Ingemar Carlsson, Boguslaw A. Swedek, Zhihong Wang, Stephen Jew, David H. Mai, Huyen Tran
-
Patent number: 9636797Abstract: Among other things, a method of controlling polishing during a polishing process is described. The method includes receiving a measurement of a thickness, thick(t), of a conductive layer of a substrate undergoing polishing from an in-situ monitoring system at a time t; receiving a measured temperature, T(t), associated with the conductive layer at the time t; calculating resistivity ?T of the conductive layer at the measured temperature T(t); adjusting the measurement of the thickness using the calculated resistivity ?T to generate an adjusted measured thickness; and detecting a polishing endpoint or an adjustment for a polishing parameter based on the adjusted measured thickness.Type: GrantFiled: February 12, 2014Date of Patent: May 2, 2017Assignee: Applied Materials, Inc.Inventors: Kun Xu, Ingemar Carlsson, Boguslaw A. Swedek, Doyle E. Bennett, Shih-Haur Shen, Hassan G Iravani, Wen-Chiang Tu, Tzu-Yu Liu
-
Patent number: 9496190Abstract: During polishing of a first substrate at a first polishing station, a sequence of measurements by a first in-situ monitoring system is monitored to determining a first time at which the first sequence exhibits a first predefined feature indicating a predetermined thickness of an overlying layer, and during polishing of the first substrate at a second polishing station, a sequence of measurements by a second in-situ monitoring system is monitored to determine a second time indicating clearance of the overlying layer and exposure of the underlying layer. The first time is used to calculate a first adjusted polishing pressure for a second substrate at the first polishing station, and the second time is used to calculate a second adjusted polishing pressure for the second substrate at the second polishing station.Type: GrantFiled: March 23, 2015Date of Patent: November 15, 2016Assignee: Applied Materials, Inc.Inventors: Kun Xu, Feng Liu, Dominic J. Benvegnu, Boguslaw A. Swedek, Yuchun Wang, Wen-Chiang Tu, Laksh Karuppiah
-
Patent number: 9472475Abstract: A method of controlling polishing includes storing a desired ratio representing a ratio for a clearance time of a first zone of a substrate to a clearance time of a second zone of the substrate. During polishing of a first substrate, an overlying layer is monitored, a sequence of measurements is generated, and the measurements are sorted a first group associated with the first zone of the substrate and a second group associated with the second zone on the substrate. A first time and a second time at which the overlying layer is cleared is determined based on the measurements from the first group and the second group, respectively. At least one adjusted polishing pressure is calculated for the first zone based on a first pressure applied in the first zone during polishing the first substrate, the first time, the second time, and the desired ratio.Type: GrantFiled: February 22, 2013Date of Patent: October 18, 2016Assignee: Applied Materials, Inc.Inventors: Kun Xu, Ingemar Carlsson, Tzu-Yu Liu, Shih-Haur Shen, Boguslaw A. Swedek, Wen-Chiang Tu, Lakshmanan Karuppiah
-
Publication number: 20160158908Abstract: A method of controlling polishing includes polishing a substrate at a first polishing station, monitoring the substrate with a first eddy current monitoring system to generate a first signal, determining an ending value of the first signal for an end of polishing of the substrate at the first polishing station, determining a first temperature at the first polishing station, polishing the substrate at a second polishing station, monitoring the substrate with a second eddy current monitoring system to generate a second signal, determining a starting value of the second signal for a start of polishing of the substrate at the second polishing station, determining a gain for the second polishing station based on the ending value, the starting value and the first temperature, and calculating a third signal based on the second signal and the gain.Type: ApplicationFiled: February 17, 2016Publication date: June 9, 2016Applicant: Applied Materials, Inc.Inventors: Kun Xu, Shih-Haur Shen, Boguslaw A. Swedek, Ingemar Carlsson, Doyle E. Bennett, Wen-Chiang Tu, Hassan G. Iravani, Tzu-Yu Liu
-
Patent number: 9296084Abstract: A method of controlling polishing includes storing a sequence of default values, polishing a substrate, monitoring the substrate during polishing with an in-situ monitoring system, generating a sequence of measured values from measurements from the in-situ monitoring system, combining the sequence of measured values with the sequence of default values to generate a sequence of modified values, fitting a function to the sequence of modified values, and determining at least one of a polishing endpoint or an adjustment for a polishing rate based on the function.Type: GrantFiled: July 19, 2012Date of Patent: March 29, 2016Assignee: Applied Materials, Inc.Inventors: Jimin Zhang, Zhihong Wang, Harry Q. Lee, Wen-Chiang Tu