Abstract: A method of controlling the polishing of a substrate includes polishing a substrate on a first platen using a first set of parameters, obtaining first and second sequences of measured spectra from first and second regions of the substrate with an in-situ optical monitoring system, generating first and second sequences of values from the first and second sequences of measured spectra, fitting first and second linear functions to the first and second sequences of values, determining a difference between the first linear function and the second linear function, adjusting at least one parameter of the first set of parameters based on the difference, and polishing the second substrate on the first platen using the adjusted parameter.

Abstract: A CMP method for polishing a phase change alloy on a substrate surface including positioning the substrate comprising a phase change alloy material on a platen containing a polishing pad and delivering a polishing slurry to the polishing pad. The polishing slurry includes colloidal particles with a particle size less than 60 nm, in an amount between 0.2% to about 10% by weight of slurry, a pH adjustor, a chelating agent, an oxidizing agent in an amount less than 1% by weight of slurry, and polyacrylic acid. The substrate on the platen is polished to remove a portion of the phase change alloy. A rinsing solution for rinsing the substrate on the platen includes deionized water and at least one component in the deionized water where the component selected from the group consisting of polyethylene imine, polyethylene glycol, polyacrylic amide, alcohol ethoxylates, polyacrylic acid, an azole containing compound, benzo-triazole, and combinations thereof.

Abstract: Methods of determining thickness and phase of a GST layer on a semiconductor substrate are described using intensity spectra within the infra-red range. In particular, techniques for using certain transmission at certain frequencies are disclosed for faster thickness and phase determination in an in-line or standalone metrology/monitoring system for CMP processes.

Abstract: A method and apparatus for polishing or planarzing a substrate by a chemical mechanical polishing process. In one embodiment a method of processing a semiconductor substrate is provided. The method comprises positioning a substrate on a polishing apparatus comprising a polishing pad assembly, delivering a polishing slurry to a surface of the polishing pad assembly, polishing the substrate with the surface of the polishing pad assembly, monitoring the removal rate of material from a plurality of regions on the surface of the substrate, determining whether the plurality of regions on the surface of the substrate are polishing uniformly, and selectively delivering a polishing slurry additive to at least one region of the plurality of regions to obtain a uniform removal rate of material from the plurality of regions on the surface of the substrate, wherein the removal rate of material from the at least one region is different than at least one other region of the plurality of regions.

Abstract: A method and apparatus for pre-conditioning a new soft polishing pad and processing a substrate on a soft polishing pad is described. The method includes coupling a soft polishing pad to a platen, contacting the processing surface of the soft polishing pad with a conditioning disk, applying a pressure conditioning disk, removing the conditioning disk from contact with the processing surface of the soft polishing pad, and contacting a first substrate with the processing surface of the soft polishing pad to perform a polishing process on the first substrate.

Abstract: Polishing compositions and methods for removing conductive materials from a substrate surface are provided. In one aspect, a method is provided for processing a substrate to remove conductive material disposed over narrow feature definitions formed in a substrate at a higher removal rate than conductive material disposed over wide feature definitions formed in a substrate by an electrochemical mechanical polishing technique, and then polishing the substrate by at least a chemical mechanical polishing technique.

Abstract: Polishing compositions and methods for removing conductive materials from a substrate surface are provided. In one aspect, a method is provided for processing a substrate to remove conductive material disposed over narrow feature definitions formed in a substrate at a higher removal rate than conductive material disposed over wide feature definitions formed in a substrate by an electrochemical mechanical polishing technique, and then polishing the substrate by at least a chemical mechanical polishing technique.

Abstract: A system and method of delivering a liquid to a CMP polishing pad includes supplying the liquid to a nozzle, the nozzle being oriented toward a polishing surface of the CMP polishing pad. The liquid flows at a rate of less than or equal to about 100 cc per minute. A pressurized carrier gas is also supplied to the nozzle. The liquid is substantially evenly sprayed from the nozzle onto the CMP polishing pad.

Abstract: A system and method of delivering a liquid to a CMP polishing pad includes supplying the liquid to a nozzle, the nozzle being oriented toward a polishing surface of the CMP polishing pad. The liquid flows at a rate of less than or equal to about 100 cc per minute. A pressurized carrier gas is also supplied to the nozzle. The liquid is substantially evenly sprayed from the nozzle onto the CMP polishing pad.

Abstract: A method for etching contact openings into a polycide layer including a metal silicide layer and a polysilicon layer comprises providing a substrate that includes a polycide layer, forming a patterned photoresist mask, and etching with a series of plasmas. The etches include a silicide etch, a polycide etch including chlorine gas and nitrogen gas where the nitrogen flow rate is between 20% and about 30% of the sum of the nitrogen flow rate plus the chlorine flow rate, and a poly overetch. A polycide etch with a composition in the specified range will have a polycide selectivity greater than one.

Abstract: The present invention provides a method and apparatus for forming reliable interconnects in which the overlap of the line over the plug or via is minimized or eliminated. In one aspect, a barrier plug comprised of a conductive material, such as tungsten, is deposited over the via to provide an etch stop during line etching and to prevent diffusion of the metal, such as copper, into the surrounding dielectric material if the line is misaligned over the via. Additionally, the barrier plug prevents an overall reduction in resistance of the interconnect and enables reactive ion etching to be employed to form the metal line. In another aspect, reactive ion etching techniques are employed to selectively etch the metal line and the barrier layer to provide a controlled etching process which exhibits selectivity for the metal line, then the barrier and then the via or plug.

Abstract: The present invention provides a method and apparatus for forming reliable interconnects in which the overlap of the line over the plug or via is minimized or eliminated. In one aspect, a barrier plug comprised of a conductive material, such as tungsten, is deposited over the via to provide an etch stop during line etching and to prevent diffusion of the metal, such as copper, into the surrounding dielectric material if the line is misaligned over the via. Additionally, the barrier plug prevents an overall reduction in resistance of the interconnect and enables reactive ion etching to be employed to form the metal line. In another aspect, reactive ion etching techniques are employed to selectively etch the metal line and the barrier layer to provide a controlled etching process which exhibits selectivity for the metal line, then the barrier and then the via or plug.

Abstract: The amount of particulate contamination produced due to rubbing between a semiconductor substrate and the robotic substrate handling blade has been greatly reduced by the use of specialized materials either as the principal material of construction for the semiconductor substrate handling blade, or as a coating upon the surface of the substrate handling blade. In particular, the specialized material must exhibit the desired stiffness at temperatures in excess of about 450° C.; the specialized material must also have an abrasion resistant surface which does not produce particulates when rubbed against the semiconductor substrate. The abrasion resistant surface needs to be very smooth, having a surface finish of less than 1.0 micro inch, and preferably less than 0.2 micro inch. In addition, the surface must be essentially void-free. In the most preferred embodiments, the upper, top surface of the substrate handling blade is constructed from a dielectric material being smooth, non-porous, and wear-resistant.

Abstract: Disclosed herein is a post-etch treatment for plasma etched metal-comprising features in semiconductor devices. The post-etch treatment significantly reduces or eliminates surface corrosion of the etched metal-comprising feature. It is particularly important to prevent the formation of moisture on the surface of the feature surface prior to an affirmative treatment to remove corrosion-causing contaminants from the feature surface. Avoidance of moisture formation is assisted by use of a high vacuum; use of an inert, moisture-free purge gas; and by maintaining the substrate at a sufficiently high temperature to volatilize moisture.

Abstract: The amount of particulate contamination produced due to rubbing between a semiconductor substrate and the robotic substrate handling blade has been greatly reduced by the use of specialized materials either as the principal material of construction for the semiconductor substrate handling blade, or as a coating upon the surface of the wafer handling blade. In particular, the specialized material must exhibit the desired stiffness at temperatures in excess of about 450.degree. C.; the specialized material must also have an abrasion resistant surface which does not produce particulates when rubbed against the semiconductor substrate. The abrasion resistant surface needs to be very smooth, having a surface finish of less than 1.0 micro inch, and preferably less than 0.2 micro inch. In addition, the surface must be essentially void-free. In the most preferred embodiments, the upper, top surface of the substrate handling blade is constructed from a dielectric material being smooth, non-porous, and wear-resistant.