Abstract: A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.

Abstract: A novel additive for recycling thermoset materials, its related recyclable thermoset composition and its application are disclosed. Specifically, the composition of the additive comprises at least one copolymer that has at least one carbamate group, at least one carbonate group and/or at least one urea group, and a number-average molecular weight of the copolymer is between 100 and 50,000 Da.

Abstract: A chip on film package is disclosed, including a flexible film and a chip. The flexible film includes a film base, a patterned metal layer includes a plurality of pads and disposed on an upper surface of the film base, and a dummy metal layer covering a lower surface of the film base and capable of dissipating heat of the chip. The dummy metal layer comprises at least one opening exposing the second surface, and at least one of the plurality of pads is located within the at least one opening in a bottom view of the chip on film package. The chip is mounted on the plurality of pads of the patterned metal layer.

Abstract: A chip on film package including a chip and a flexible film. The chip includes bumps disposed on the chip and is mounted on the flexible film. The flexible film includes first vias, second vias, upper leads and lower leads. The first vias and the second vias penetrate the flexible film and are arranged on two opposite sides of a reference line respectively. A distance between one of the first vias and one of the second vias, which are closer to a first side of the chip, is longer than that between another one of the first vias and another one of the second, which are further from the first side. The upper leads are disposed on the upper surface connected between the vias and the bumps. The lower leads are disposed on the lower surface and connected to the vias.

Abstract: A chip on film package is disclosed, including a flexible film and a chip. The flexible film includes a film base, a patterned metal layer includes a plurality of pads and disposed on an upper surface of the film base, and a dummy metal layer covering a lower surface of the film base and capable of dissipating heat of the chip. The dummy metal layer comprises at least one opening exposing the second surface, and at least one of the plurality of pads is located within the at least one opening in a bottom view of the chip on film package. The chip is mounted on the plurality of pads of the patterned metal layer.

Abstract: The present invention is directed to a use of Lactobacillus plantarum LP10 for reducing body fat, controlling obesity or overweight, and alleviating an obesity-related disease caused by excessively high body fat. The Lactobacillus plantarum LP10 is deposited in China General Microbiological Culture Collection Center (CGMCC), the accession number is CGMCC 13008.

Abstract: A chip on film package includes a base film, a chip and a heat-dissipation structure. The base film includes a first surface and a second surface opposite to the first surface. The chip is disposed on the first surface and has a chip length along a first axis of the chip and a chip width along a second axis of the chip perpendicular to the first axis. The heat-dissipation structure includes a covering portion. The covering portion at least partially covers the chip, exposes a side surface of the chip, and has a first length along the first axis and a second length along the second axis being longer than the chip width of the chip. The side surface connects a top surface and a bottom surface of the chip. A heat-dissipation structure is also provided.

Abstract: The invention provides a method which comprises administering an effective amount of a probiotic composition including Lactobacillus plantarum TWK10 for improving inflammation after exercise. The Lactobacillus plantarum TWK10 is deposited in Taiwan Food Industry Research and Development Institute (FIRDI) with the accession number BCRC910734, and in China General Microbiological Culture Collection Center (CGMCC) with the accession number CGMCC 13008.

Abstract: A source driver is provided. The source driver includes an integrated circuit chip, a sensitive circuit and at least one bump. The sensitive circuit is disposed in the integrated circuit chip. The sensitive circuit includes at least one capacitor. The at least one bump is disposed in the integrated circuit chip, and the at least one bump is adjacent to the sensitive circuit.

Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a heat dissipation sheet. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is disposed on the mounting region and electrically connected to the patterned circuit layer. The heat dissipation sheet includes a first adhesive layer disposed over the base film, a second adhesive layer disposed over the first adhesive layer, and a graphite layer disposed between the first adhesive layer and the second adhesive layer, wherein at least one of the first adhesive layer and the second adhesive layer is a double-sided adhesive with carrier, which comprises two adhesives and a carrier disposed between the two adhesives.

Abstract: A chip on film package including a chip and a flexible film. The chip includes bumps disposed on the chip and is mounted on the flexible film. The flexible film includes first vias, second vias, upper leads and lower leads. The first vias and the second vias penetrate the flexible film and are arranged on two opposite sides of a reference line respectively. A distance between one of the first vias and one of the second vias, which are closer to a first side of the chip, is longer than that between another one of the first vias and another one of the second, which are further from the first side. The upper leads are disposed on the upper surface connected between the vias and the bumps. The lower leads are disposed on the lower surface and connected to the vias.

Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a heat dissipation sheet. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is disposed on the mounting region and electrically connected to the patterned circuit layer. The heat dissipation sheet includes a first adhesive layer disposed over the base film, a second adhesive layer disposed over the first adhesive layer, and a graphite layer disposed between the first adhesive layer and the second adhesive layer, wherein at least one of the first adhesive layer and the second adhesive layer is a double-sided adhesive with carrier, which comprises two adhesives and a carrier disposed between the two adhesives.

Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a heat dissipation sheet. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is disposed on the mounting region and electrically connected to the patterned circuit layer. The heat dissipation sheet includes a first adhesive layer disposed over the base film, a second adhesive layer disposed over the first adhesive layer, and a graphite layer disposed between the first adhesive layer and the second adhesive layer, wherein at least one of the first adhesive layer and the second adhesive layer is a double-sided adhesive with carrier, which comprises two adhesives and a carrier disposed between the two adhesives.

Abstract: A chip on film package includes a base film, a patterned circuit layer, a chip and a heat dissipation sheet. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The chip is disposed on the mounting region and electrically connected to the patterned circuit layer. The heat dissipation sheet includes a first adhesive layer disposed over the base film, a second adhesive layer disposed over the first adhesive layer, and a graphite layer disposed between the first adhesive layer and the second adhesive layer, wherein at least one of the first adhesive layer and the second adhesive layer is a double-sided adhesive with carrier, which comprises two adhesives and a carrier disposed between the two adhesives.

Abstract: The present invention is directed to a use of Lactobacillus plantarum LP10 for reducing body fat, controlling obesity or overweight, and alleviating an obesity-related disease caused by excessively high body fat. The Lactobacillus plantarum LP10 is deposited in China General Microbiological Culture Collection Center (CGMCC), the accession number is CGMCC 13008.

Abstract: A chip on film package includes a base film, a patterned circuit layer, a solder resist layer, a chip and a graphite sheet. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The solder resist layer partially covers the patterned circuit layer. The chip is disposed on the mounting region and electrically connected to the patterned circuit layer. The graphite sheet covers at least a part of the solder resist layer, wherein an outer edge of the graphite sheet is substantially aligned with an outer edge of the solder resist layer.

Abstract: A chip on film package includes a base film, a chip and a heat-dissipation structure. The base film includes a first surface and a second surface opposite to the first surface. The chip is disposed on the first surface and has a chip length along a first axis of the chip and a chip width along a second axis of the chip perpendicular to the first axis. The heat-dissipation structure includes a covering portion. The covering portion at least partially covers the chip, exposes a side surface of the chip, and has a first length along the first axis and a second length along the second axis being longer than the chip width of the chip. The side surface connects a top surface and a bottom surface of the chip. A heat-dissipation structure is also provided.

Abstract: A chip on film package includes a base film, a patterned circuit layer, a solder resist layer, a chip and a first conductive film. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The solder resist layer partially covers the patterned circuit layer. The chip is disposed in the mounting region and electrically connected to the patterned circuit layer. The first conductive film covers at least a part of the first solder resist layer and an opening exposing at least a part of the patterned circuit layer, wherein the first conductive film is configured to shield electromagnetic interference (EMI) emanating by the chip and is electrically connected to the patterned circuit layer.

Abstract: A chip on film package includes a base film, a patterned circuit layer, a solder resist layer, a chip and a graphite sheet. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The solder resist layer partially covers the patterned circuit layer. The chip is disposed on the mounting region and electrically connected to the patterned circuit layer. The graphite sheet covers at least a part of the solder resist layer, wherein an outer edge of the graphite sheet is substantially aligned with an outer edge of the solder resist layer.

Abstract: A chip on film package includes a base film, a patterned circuit layer, a solder resist layer, a chip and a graphite sheet. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The solder resist layer partially covers the patterned circuit layer. The chip is disposed on the mounting region and electrically connected to the patterned circuit layer. The graphite sheet covers at least a part of the solder resist layer, wherein an outer edge of the graphite sheet is substantially aligned with an outer edge of the solder resist layer.