Abstract: A display panel structure having a circuit element disposed thereon and method of manufacture are provided. The display panel includes a substrate and the circuit element disposed on the substrate. The circuit element has a first interface layer and a first conductive layer. Both the first interface layer and the first conductive layer have copper materials. The material which makes the first interface layer includes a reactant or a compound of the material which makes the first conductive layer. The method for manufacturing includes the following steps: forming a first interface layer on the substrate; forming a first conductive layer on the first interface layer; and etching the first conductive and interface layers to form a pattern. The existence of the first interface reduces the penetration of the first conductive layer on the substrate and improves the adhesive force between the first conductive layer and the substrate.

Abstract: A thin film transistor (TFT) and the manufacturing method thereof are disclosed, and the thin film transistor comprises: a substrate, a gate electrode, a first CuSix layer, a gate-insulting layer, a semiconductor layer, a second CuSix layer, and a source electrode and a drain electrode. The gate electrode is disposed on the substrate, wherein the gate electrode includes the material of copper (Cu). The first CuSix layer is disposed between the gate electrode and the substrate. The gate insulating layer is disposed on the gate electrode. The semiconductor layer is disposed on the gate insulating layer. The second CuSix layer is disposed between the source electrode and the semiconductor layer and is disposed between the drain electrode and the semiconductor layer, wherein the source electrode and the drain electrode include the material of copper (Cu). The source electrode and the drain electrode are disposed on the second CuSix layer.

Abstract: A thin film transistor (TFT) and the manufacturing method thereof are disclosed, and the thin film transistor comprises: a substrate, a gate electrode, a first CuSix layer, a gate insulting layer, a semiconductor layer, a second CuSix layer, and a source electrode and a drain electrode. The gate electrode is disposed on the substrate, wherein the gate electrode includes the material of copper (Cu). The first CuSix layer is disposed between the gate electrode and the substrate. The gate insulating layer is disposed on the gate electrode. The semiconductor layer is disposed on the gate insulating layer. The second CuSix layer is disposed between the source electrode and the semiconductor layer and is disposed between the drain electrode and the semiconductor layer, wherein the source electrode and the drain electrode include the material of copper (Cu). The source electrode and the drain electrode are disposed on the second CuSix layer.

Abstract: The invention discloses a switching element for a pixel electrode of display device and methods for fabricating the same. A gate is formed on a substrate. A high-k dielectric layer is formed on the gate. The high-k dielectric layer comprises HfO2, HfNO, HfSiO, HfSiNO, or HfAlO. A semiconductor layer is formed on the high-k dielectric layer. A source and a drain are formed on a portion of the semiconductor layer.

Abstract: The invention discloses a switching device for a pixel electrode of display device and methods for fabricating the same. A gate is formed on a substrate. A gate insulating layer is formed on the gate. A buffer layer is formed between the gate and the substrate, and/or formed between the gate and the gate insulating layer. The buffer layer comprises TaSix, TaSixNy, TiSix, TiSixNy, WSix, WSixNy, or WCxNy. A semiconductor layer is formed on the gate insulating layer. A source and a drain are formed on a portion of the semiconductor layer. The gate is covered by the buffer layer.

Abstract: The invention discloses a switching element of a pixel electrode for a display device and methods for fabricating the same. A gate is formed on a substrate. A first copper silicide layer is formed on the gate. An insulating layer is formed on the first copper silicide layer. A semiconductor layer is formed on the insulating layer. A source and a drain are formed on the semiconductor layer. Moreover, a second copper silicide layer is sandwiched between the semiconductor layer and the source/drain.

Abstract: A thin film transistor (TFT) and the manufacturing method thereof are disclosed, and the thin film transistor comprises: a substrate, a gate electrode, a first CuSix layer, a gate insulting layer, a semiconductor layer, a second CuSix layer, and a source electrode and a drain electrode. The gate electrode is disposed on the substrate, wherein the gate electrode includes the material of copper (Cu). The first CuSix layer is disposed between the gate electrode and the substrate. The gate insulating layer is disposed on the gate electrode. The semiconductor layer is disposed on the gate insulating layer. The second CuSix layer is disposed between the source electrode and the semiconductor layer and is disposed between the drain electrode and the semiconductor layer, wherein the source electrode and the drain electrode include the material of copper (Cu). The source electrode and the drain electrode are disposed on the second CuSix layer.

Abstract: A thin film transistor (TFT) is disclosed, and the thin film transistor comprises: a substrate, a gate electrode, a first adhesion layer, a gate insulting layer, a semiconductor layer, and a source electrode and a drain electrode. The gate electrode is formed on the substrate, and the gate electrode is made of silver. The first adhesion layer is formed between the substrate and the gate electrode. A gate insulating layer is formed on the gate electrode. The semiconductor layer is formed on the gate insulating layer. The source electrode and the drain electrode are formed on parts of the semiconductor layer. Accordingly, the reliable TFT is provided through having the Ag metal with low resistivity and good adhesion characteristics.

Abstract: The invention discloses a switching device for a pixel electrode of display device and methods for fabricating the same. A gate is formed on a portion of a substrate. A semiconductor layer is formed on the gate. A source and a drain are formed on a portion of the semiconductor layer. A low-k (low dielectric constant) material layer, such as a layer of a-SiC:H or a-SiCN:H, is formed between the gate and the semiconductor layer and/or on the source/drain.

Abstract: A copper gate electrode, applied in a thin-film-transistor liquid crystal display (LCD) device, at least comprises a patterned copper layer formed on a glass substrate, and a barrier layer formed on the patterned copper layer. The barrier layer comprises at least one of nitrogen and phosphorus, or comprises an alloy formularized as M1M2R wherein M1 is cobalt (Co) or molybdenum (Mo), M2 is tungsten (W), molybdenum (Mo), rhenium (Re) or vanadium (V), and R is boron (B) or phosphorus (P).

Abstract: A copper gate electrode, applied in a thin-film-transistor liquid crystal display (TFT-LCD) device, at least comprises an adhesive layer formed on a glass substrate, and a patterned copper layer formed on the adhesive layer. The adhesive layer at least comprises one of nitrogen and phosphorus (for example, polysilazane) for enhancing the electric characteristics of the LCD device.

Abstract: A field effect transistor which is not susceptible to mask edge defects at its gate spacer oxides. The transistor is formed upon a (100) silicon semiconductor substrate through successive layering of a gate oxide, and a gate electrode. A pair of gate spacer oxides is then formed covering opposite edges of the gate oxide and the gate electrode. A screen oxide is then formed over the surface of the semiconductor substrate, the gate and the gate spacer oxides. The upper surface of the screen oxide has an angle of elevation not exceeding 54.44 degrees with respect to the semiconductor substrate. The screen oxide also smoothly flows from thicker regions at the junctures of the gate spacer oxides and the semiconductor substrate to thinner regions over the surface of the semiconductor substrate. The semiconductor substrate adjoining the gate spacer oxides is then ion implanted through the screen oxide to form amorphous source/drain electrodes.