Abstract: A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.

Abstract: A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.

Abstract: A hologram reticle and method of patterning a target. A layout pattern for an image to be transferred to a target is converted into a holographic representation of the image. A hologram reticle is manufactured that includes the holographic representation. The hologram reticle is then used to pattern the target. Three-dimensional patterns may be formed in a photoresist layer of the target in a single patterning step. These three-dimensional patterns may be filled to form three-dimensional structures or else used in a multi-surface imaging composition. The holographic representation of the image may also be transferred to a top photoresist layer of a top surface imaging (TSI) semiconductor device, either directly or using the hologram reticle. The top photoresist layer may then be used to pattern an underlying photoresist layer with the image. The lower photoresist layer is used to pattern a material layer of the device.

Abstract: A punching bag is provided. The punching bag is positioned on a fixed pillar, and comprises a supporting frame, a foam layer, a force-bearing plate, and a punch pad. The supporting frame is attached and fastened to the fixed pillar. The foam layer is disposed on the supporting frame, and at least a sensing element is positioned on a surface of the foam layer for measuring an external punch force. The force-bearing plate is disposed on the foam layer and utilized for covering the foam layer, wherein at least an elastic element correspondingly attached to the at least a sensing element is positioned on an inner side of the force-bearing plate. The punch pad is utilized for covering and attaching to the force-bearing plate to bear the external punch force.

Abstract: A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.

Abstract: A punching bag is provided. The punching bag is positioned on a fixed pillar, and comprises a supporting frame, a foam layer, a force-bearing plate, and a punch pad. The supporting frame is attached and fastened to the fixed pillar. The foam layer is disposed on the supporting frame, and at least a sensing element is positioned on a surface of the foam layer for measuring an external punch force. The force-bearing plate is disposed on the foam layer and utilized for covering the foam layer, wherein at least an elastic element correspondingly attached to the at least a sensing element is positioned on an inner side of the force-bearing plate. The punch pad is utilized for covering and attaching to the force-bearing plate to bear the external punch force.

Abstract: Detecting haze formation on a mask by obtaining an optical property of the mask and determining progress of the haze formation based on the obtained optical property.

Abstract: A method for patterning a substrate includes forming a material layer on the substrate; performing a first etching on the material layer to form a pattern; measuring the pattern of the material layer using an optical spectrum metrology tool; determining whether the measuring indicates that the etching step achieved a predefined result; and producing an etching recipe and performing a second etching of the material layer using the etching recipe if the predefined result was not achieved.

Abstract: A hologram reticle and method of patterning a target. A layout pattern for an image to be transferred to a target is converted into a holographic representation of the image. A hologram reticle is manufactured that includes the holographic representation. The hologram reticle is then used to pattern the target. Three-dimensional patterns may be formed in a photoresist layer of the target in a single patterning step. These three-dimensional patterns may be filled to form three-dimensional structures. The holographic representation of the image may also be transferred to a top photoresist layer of a top surface imaging (TSI) semiconductor device, either directly or using the hologram reticle. The top photoresist layer may then be used to pattern an underlying photoresist layer with the image. The lower photoresist layer is used to pattern a material layer of the device.

Abstract: Disclosed is a lithography system. The lithography system includes a source designed to provide energy; an imaging system configured to direct the energy onto a substrate to form a predefined image thereon, and defining an optical axis; and an aperture incorporated with the imaging system, the aperture having a plurality of transmitting regions defined along radial axis not parallel to the optical axis, and each transmitting region operable to transmit the energy with adjustable intensity.

Abstract: A light emitting diode (LED) package is provided. The LED package includes a carrier, a package housing, a strength enhancement structure, an ESD protector and an LED chip. The carrier has a first surface and a second surface. The carrier includes a first electrode and a second electrode, wherein a gap is between the first electrode and the second electrode. The package housing is disposed on the carrier and has a first aperture and a second aperture. The first surface is exposed by the first aperture while the second surface is exposed by the second aperture. The strength enhancement structure is disposed at the gap. The ESD protector is disposed on the carrier and located within the second aperture. The LED chip is disposed on the carrier and located within the first aperture, wherein the ESD protector and the LED chip is electrically connected to the carrier.

Abstract: A fabrication method of an active device array substrate is disclosed. A first metal material layer, a gate insulation material layer, a channel material layer, a second metal material layer, and a first photoresist layer are formed over a substrate sequentially. The first photoresist layer is patterned with a multi-tone mask to form a first patterned photoresist layer with two thicknesses. A first and second removing processes are performed sequentially using the first patterned photoresist layer as a mask to form a gate, a gate insulation layer, a channel layer, and a source/drain. The first patterned photoresist layer is removed. A passivation layer and a second patterned photoresist layer are formed over the substrate. A third removing process is performed to form a plurality of contact holes. A pixel electrode material layer is formed over the substrate. The second patterned photoresist layer is lifted off to form a pixel electrode.

Abstract: Detecting haze formation on a mask by obtaining an optical property of the mask and determining progress of the haze formation based on the obtained optical property.

Abstract: An image processing system. An input/output device receives information for pixels in an image corresponding to an object, wherein the information specifies optical properties. A storage device stores the information. A processor determines an image of preliminary contour of the object based on the information. For pixels located on the preliminary contour are assigned as primary pixels, wherein anchor points determined by the location of the primary pixels, and the reference pixels determine modification vectors according to the information corresponding to the primary and reference pixels, and adjusts the positions of the anchor points according to the modification vectors. These processes are applied on every pixels or selected pixels located on the preliminary contour repeatedly to determine the final modified contour with sub-pixel accuracy.

Abstract: A system and method are disclosed for monitoring a dimensional change of a pattern for an object having a transparent layer exposed through the pattern and a non-transparent pattern laminated therewith. According to the method, a first beam is projected to the pattern. A second beam resulted from the first beam passing through the transparent layer exposed by the pattern, or from the first beam reflected from the non-transparent layer of the pattern, is detected. A value of a predetermined property from the second beam detected is obtained. A variation of the value is monitored for identifying the dimensional change of the pattern.

Abstract: A method and system is disclosed for examining mask pattern fidelity. A mask picture is generated from a first mask with a first OPC model applied to a mask design. The mask picture is converted into a mask based simulation file. A first simulation is conducted under a first set of predetermined lithography processing conditions using the converted simulation file to generate one or more files of a first set representing wafer photo resist profile thereof. The first OPC model is applied to the mask design in the database mask file. A second simulation is conducted under the first set of predetermined lithography processing conditions using the OPCed mask design to generate one or more files of a second set representing wafer photo resist profile thereof. The first and second sets of files are evaluated for inspecting mask fidelity.

Abstract: A hologram reticle and method of patterning a target. A layout pattern for an image to be transferred to a target is converted into a holographic representation of the image. A hologram reticle is manufactured that includes the holographic representation. The hologram reticle is then used to pattern the target. Three-dimensional patterns may be formed in a photoresist layer of the target in a single patterning step. These three-dimensional patterns may be filled to form three-dimensional structures. The holographic representation of the image may also be transferred to a top photoresist layer of a top surface imaging (TSI) semiconductor device, either directly or using the hologram reticle. The top photoresist layer may then be used to pattern an underlying photoresist layer with the image. The lower photoresist layer is used to pattern a material layer of the device.

Abstract: A patterning device for implementing a pattern on a substrate includes a main pattern feature and a sacrificial pattern feature. Both the main pattern feature and the sacrificial pattern feature are transferable to an overlying layer on the substrate. The sacrificial pattern feature is positioned a distance from the main pattern feature and is configured to have a dimension less than an etching bias of an etching process. The etching process is capable of transferring the main pattern feature to an underlying layer, such that the sacrificial pattern feature adjusts an etching behavior of the main pattern feature and is eliminated from the underlying layer.

Abstract: A hologram reticle and method of patterning a target. A layout pattern for an image to be transferred to a target is converted into a holographic representation of the image. A hologram reticle is manufactured that includes the holographic representation. The hologram reticle is then used to pattern the target. Three-dimensional patterns may be formed in a photoresist layer of the target in a single patterning step. These three-dimensional patterns may be filled to form three-dimensional structures. The holographic representation of the image may also be transferred to a top photoresist layer of a top surface imaging (TSI) semiconductor device, either directly or using the hologram reticle. The top photoresist layer may then be used to pattern an underlying photoresist layer with the image. The lower photoresist layer is used to pattern a material layer of the device.

Abstract: Disclosed is a lithography system. The lithography system includes a source designed to provide energy; an imaging system configured to direct the energy onto a substrate to form a predefined image thereon, and defining an optical axis; and an aperture incorporated with the imaging system, the aperture having a plurality of transmitting regions defined along radial axis not parallel to the optical axis, and each transmitting region operable to transmit the energy with adjustable intensity.