Abstract: A method for forming a memory cell structure includes following steps. A substrate including at least a memory cell region defined thereon is provided, and a first gate stack is formed in the memory cell region. A first LDD implantation is performed to form a first LDD at one side of the first gate stack in the memory cell region, and the first LDD includes a first conductivity type. A second LDD implantation is performed to form a second LDD at one side of the first gate stack opposite to the first LDD in the memory cell region, and the second LDD includes the first conductivity type. The first LDD and the second LDD are different from each other.

Abstract: A method for manufacturing a non-volatile memory structure includes providing a substrate having a gate structure, performing a first oxidation process to form a first SiO layer at least covering a bottom corner of the conductive layer, performing a first etching process to remove the first SiO layer and a portion of the dielectric layer to form a cavity, performing a second oxidation process to form a second SiO layer covering sidewalls of the cavity and a third SiO layer covering a surface of the substrate, forming a first SiN layer filling in the cavity and covering the gate structure on the substrate, and removing a portion of the first SiN layer to form a SiN structure including a foot portion filling in the cavity and an erection portion upwardly extended from the foot portion, and the erection portion covering sidewalls of the gate structure.

Abstract: A method for programming a non-volatile memory cell is described. The memory cell includes a substrate, a gate over the substrate, a charge-trapping structure at least between the substrate and the gate, and first and second S/D regions in the substrate beside the gate. The method includes performing a channel-initiated secondary electron (CHISEL) injection process to inject electrons to the charge-trapping structure.

Abstract: A manipulating method of a nonvolatile memory is provided and comprises following steps. The nonvolatile memory having a plurality of memory cell is provided. Two adjacent memory cells correspond to one bit and comprise a substrate, a first and another first doping regions, a second doping region, a charge trapping layer, a control gate, a first bit line, a source line and a second bit line different from the first bit line. A first and a second channel are formed. The charge trapping layer is disposed on the first and the second channels. The two adjacent memory cells are programmed by following steps. A first positive and negative voltages are applied to the control gate between the first and the second doping regions and the control gate between the second and the another first doping regions, respectively. A first voltage is applied to the source line.

Abstract: A method for manufacturing a non-volatile memory structure includes providing a substrate having a memory region and a logic region defined thereon, masking the logic region while forming at least a first gate in the memory region, forming an oxide-nitride-oxide (ONO) structure under the first gate, forming an oxide structure covering the ONO structure on the substrate, masking the memory region while forming a second gate in the logic region, and forming a first spacer on sidewalls of the first gate and a second spacer on sidewalls of the second gate simultaneously.

Abstract: A manipulating method of a nonvolatile memory is provided and comprises following steps. The nonvolatile memory having a plurality of memory cell is provided. Two adjacent memory cells correspond to one bit and comprise a substrate, a first and another first doping regions, a second doping region, a charge trapping layer, a control gate, a first bit line, a source line and a second bit line different from the first bit line. A first and a second channel are formed. The charge trapping layer is disposed on the first and the second channels. The two adjacent memory cells are programmed by following steps. A first positive and negative voltages are applied to the control gate between the first and the second doping regions and the control gate between the second and the another first doping regions, respectively. A first voltage is applied to the source line.

Abstract: A method for manufacturing a non-volatile memory structure includes providing a substrate having a gate structure, performing a first oxidation process to form a first SiO layer at least covering a bottom corner of the conductive layer, performing a first etching process to remove the first SiO layer and a portion of the dielectric layer to form a cavity, performing a second oxidation process to form a second SiO layer covering sidewalls of the cavity and a third SiO layer covering a surface of the substrate, forming a first SiN layer filling in the cavity and covering the gate structure on the substrate, and removing a portion of the first SiN layer to form a SiN structure including a foot portion filling in the cavity and an erection portion upwardly extended from the foot portion, and the erection portion covering sidewalls of the gate structure.

Abstract: A method for programming a non-volatile memory cell is described. The memory cell includes a substrate, a gate over the substrate, a charge-trapping structure at least between the substrate and the gate, and first and second S/D regions in the substrate beside the gate. The method includes performing a channel-initiated secondary electron (CHISEL) injection process to inject electrons to the charge-trapping structure.

Abstract: The present invention provides a radiotherapy system that can monitor a target location in real time. The radiotherapy system includes a remote control system operable to actuate a real-time image capturing device to acquire images in real time for monitoring the target location. The system also includes an image registration system that can register the acquired image with an image previously captured for the treatment plan, whereby it can be determined whether the patient's tumor is in the beam's eye view of the treatment plan. By confirming that the tumor is in the range of the beam's eye view, the accuracy of the treatment can be improved, and the irradiated area can be reduced, which makes the radiation treatment safer.

Abstract: A memory apparatus and a method of evenly using the blocks of a flash memory are provided. The memory apparatus comprises a flash memory and a controller. The flash memory comprises a data region with a plurality of data blocks and a spare region with a plurality of spare blocks. The controller is configured to receive data corresponding to the first data block, select a spare block, program data into the spare block when the erase count corresponding to the spare block is less than the predetermined value or to select a second data block and program data stored in the second data block into the spare block when the erased count corresponding to the spare block reaches the predetermined value. As a result, the blocks of the flash memory are used evenly.

Abstract: A floor washing robot is disclosed. The robot includes: a control unit for controlling a power source to drive at least three omnidirectional wheels and at least one washing disc to rotate to wash a floor; a water spray device for spraying water; and a vacuum device for vacuuming waste water or dirt. The floor washing robot can be moved freely in any direction to improve the cleaning effect.

Abstract: A structure applied to a photolithographic process is provided. The structure includes at least a film layer, an optical isolation layer, an anti-reflection coating and a photoresist layer sequentially formed over a substrate. In the photolithographic process, the optical isolation layer stops light from penetrating down to the film layer. Since the optical isolation layer is set up underneath the photoresist layer, light emitted from a light source during photo-exposure is prevented from reflecting from the substrate surface after passing through the film layer. Thus, the critical dimensions of the photolithographic process are unaffected by any change in the thickness of the film layer.

Abstract: A floor washing robot is disclosed. The robot includes: a control unit for controlling a power source to drive at least three omnidirectional wheels and at least one washing disc to rotate to wash a floor; a water spray device for spraying water; and a vacuum device for vacuuming waste water or dirt. The floor washing robot can be moved freely in any direction to improve the cleaning effect.

Abstract: A memory apparatus and a method of evenly using the blocks of a flash memory are provided. The memory apparatus comprises a flash memory and a controller. The flash memory comprises a data region with a plurality of data blocks and a spare region with a plurality of spare blocks. The controller is configured to receive data corresponding to the first data block, select a spare block, program data into the spare block when the erase count corresponding to the spare block is less than the predetermined value or to select a second data block and program data stored in the second data block into the spare block when the erased count corresponding to the spare block reaches the predetermined value. As a result, the blocks of the flash memory are used evenly.

Abstract: This invention is about providing a kind of electrical connection design comprising insulator body and conductive terminal; the insulator body is designed with several receptor holes, where each receptor hole is designed with the first conductive terminal and the second conductive terminal; the outer side of the two conductive terminals are designed with conductive connecting section, the inner side is designed with elastic structure. As the first conductive terminal moves downward under pressure, the elastic structure generates elastic deformation. When not under pressure, the elastic structure will move the first conductive terminal upward due to the elasticity, returning to the original state. In addition, the said electrical structure is designed with a shifting structure.

Abstract: A kind of electrical connector comprising insulator body and conductive terminal; the insulator body is installed with several terminal receptor holes; each receptor hole is installed with the first conductive terminal and the second and third conductive terminal located at the two ends of the first conductive terminal; the second and third conductive terminal could move relative to the first conductive terminal and electrically connect to each other in order to form press on contact type electrical connector. Comparing to the present art, the electrical connector of this invention prevents the two ends of the one-body conductive terminal from compression by PCB and chip module at the same time that makes the conductive terminal easily yield and deformed, making the elasticity of the terminal to become poorer and present contact problem, in order to guarantee good electrical conductivity.

Abstract: A system for updating In-System Program (ISP) comprises an ISP loader that is called when an Interrupt Function Table is matched, an ISP RAM space has run out, or a page fault has happened. When an Interrupt Function Table is matched, a Function is partially updated; when an ISP RAM space has run out, a Function is executed; and when a page fault has happened, the page fault address is recorded and the page fault is corrected.

Abstract: An electrical connector for a chip module including an insulator body and a conductive terminal. The insulator body has a plurality of receptor holes. Each of the plurality of receptor holes has a first conductive terminal and a second receptor hole. A first end of the first conductive terminal forms a first conductive connecting section connected to a terminal of the chip module and a second end forming a press-on section. A first end of the second conductive terminal forms a second conductive connecting section that could be electrically connected to an external electronic terminal and a second end forms an elastic section that presses against the press-on section of the first conductive terminal. At least one part of the first conductive connecting section is located at an oblique angle relative to an outer edge of the insulator body.

Abstract: An electrical connector for a chip module including an insulator body and a conductive terminal. The insulator body has a plurality of receptor holes. Each of the plurality of receptor holes has a first conductive terminal and a second receptor hole. A first end of the first conductive terminal forms a first conductive connecting section connected to a terminal of the chip module and a second end forming a press-on section. A first end of the second conductive terminal forms a second conductive connecting section that could be electrically connected to an external electronic terminal and a second end forms an elastic section that presses against the press-on section of the first conductive terminal. At least one part of the first conductive connecting section is located at an oblique angle relative to an outer edge of the insulator body.

Abstract: A kind of electrical connector comprising insulator body and conductive terminal; the insulator body is installed with several terminal receptor holes; each receptor hole is installed with the first conductive terminal and the second and third conductive terminal located at the two ends of the first conductive terminal; the second and third conductive terminal could move relative to the first conductive terminal and electrically connect to each other in order to form press on contact type electrical connector. Comparing to the present art, the electrical connector of this invention prevents the two ends of the one-body conductive terminal from compression by PCB and chip module at the same time that makes the conductive terminal easily yield and deformed, making the elasticity of the terminal to become poorer and present contact problem, in order to guarantee good electrical conductivity.