Patents by Inventor Wen-Hsin Lin

Wen-Hsin Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11951901
    Abstract: A display system suitable for a vehicle is provided. The display system suitable for the vehicle includes a center console, a processing device, and a display device. The center console is configured to generate a power sequence according to a customization setting, and the power sequence corresponds to content of a data table. The processing device is configured to receive the power sequence and decodes the power sequence through a lookup table to generate a decoding result. The lookup table includes the content of the data table. The display device is coupled to the processing device and is configured to display a display image according to the decoding result.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: April 9, 2024
    Assignee: Coretronic Corporation
    Inventors: Jui-Ta Liu, Wen-Chang Chien, Tsung-Hsin Yeh, Shao-Chi Lin
  • Publication number: 20240113188
    Abstract: An integrated circuit (IC) structure includes a semiconductor substrate, a first gate line, a second gate line, and a first auxiliary gate portion. The semiconductor substrate comprises a semiconductor fin. The semiconductor fin extends substantially along a first direction. The first gate line and the second gate line extend substantially along a second direction different form the first direction from a top view. The first auxiliary gate portion connects the first gate line to the second gate line from the top view.
    Type: Application
    Filed: March 27, 2023
    Publication date: April 4, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Li CHIU, Yi-Juei LEE, Yu-Jie YE, Chi-Hsin CHANG, Chun-Jun LIN
  • Publication number: 20240107414
    Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for switching a secondary cell to a primary cell. A user equipment (UE) monitors a first radio condition of the UE for beams of a primary cell and a second radio condition for beams of one or more secondary cells configured for the UE in carrier aggregation. The UE transmits a request to configure a candidate beam of at least one candidate secondary cell as a new primary cell in response to the first radio condition not satisfying a first threshold and the second radio condition for the at least one candidate secondary cell satisfying a second threshold. A base station determines to reconfigure at least one secondary cell as the new primary cell. The base station and the UE perform a handover of the UE to the new primary cell.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 28, 2024
    Inventors: Yu-Chieh HUANG, Kuhn-Chang LIN, Jen-Chun CHANG, Wen-Hsin HSIA, Chia-Jou LU, Sheng-Chih WANG, Chenghsin LIN, Yeong Leong CHOO, Chun-Hsiang CHIU, Chihhung HSIEH, Kai-Chun CHENG, Chung Wei LIN
  • Publication number: 20240101784
    Abstract: A novel additive for recycling thermoset materials, its related recyclable thermoset composition and its application are disclosed. Specifically, the composition of the additive comprises at least one copolymer that has at least one carbamate group, at least one carbonate group and/or at least one urea group, and a number-average molecular weight of the copolymer is between 100 and 50,000 Da.
    Type: Application
    Filed: September 5, 2023
    Publication date: March 28, 2024
    Inventors: Chien-Hsin Wu, Ying-Chi Huang, Ying-Feng Lin, Wen-Chang Chen, Ho-Ching Huang, Ru-Jong Jeng
  • Patent number: 11931187
    Abstract: A method for predicting clinical severity of a neurological disorder includes steps of: a) identifying, according to a magnetic resonance imaging (MRI) image of a brain, brain image regions each of which contains a respective portion of diffusion index values of a diffusion index, which results from image processing performed on the MRI image; b) for one of the brain image regions, calculating a characteristic parameter based on the respective portion of the diffusion index values; and c) calculating a severity score that represents the clinical severity of the neurological disorder of the brain based on the characteristic parameter of the one of the brain image regions via a prediction model associated with the neurological disorder.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: March 19, 2024
    Assignees: Chang Gung Medical Foundation Chang Gung Memorial Hospital at Keelung, Chang Gung Memorial Hospital, Linkou, Chang Gung University
    Inventors: Jiun-Jie Wang, Yi-Hsin Weng, Shu-Hang Ng, Jur-Shan Cheng, Yi-Ming Wu, Yao-Liang Chen, Wey-Yil Lin, Chin-Song Lu, Wen-Chuin Hsu, Chia-Ling Chen, Yi-Chun Chen, Sung-Han Lin, Chih-Chien Tsai
  • Patent number: 11929767
    Abstract: A transmission interface between at least a first module and a second module is proposed. The transmission interface includes at least two physical transmission mediums. Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated. The at least two physical transmission mediums include a first physical transmission medium arranged to carry a first multiplexed signal including a first IF signal and a reference clock signal. The first IF signal and the reference clock signal are at different frequencies.
    Type: Grant
    Filed: August 16, 2022
    Date of Patent: March 12, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chieh-Hsun Hsiao, Ming-Chou Wu, Wen-Chang Lee, Narayanan Baskaran, Wei-Hsin Tseng, Jenwei Ko, Po-Sen Tseng, Hsin-Hung Chen, Chih-Yuan Lin, Caiyi Wang
  • Patent number: 11923310
    Abstract: A package structure and method for forming the same are provided. The package structure includes a first through via structure formed in a substrate and a semiconductor die formed below the first through via structure. The package structure further includes a conductive structure formed in a passivation layer over the substrate. The conductive structure includes a first via portion and a second via portion, the first via portion is directly over the first through via structure, and there is no conductive material directly below and in direct contact with the second via portion.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Kai Cheng, Tsung-Shu Lin, Tsung-Yu Chen, Hsien-Pin Hu, Wen-Hsin Wei
  • Publication number: 20240072158
    Abstract: A method of forming a FinFET is disclosed. The method includes depositing a conductive material across each of a number of adjacent fins, depositing a sacrificial mask over the conductive material, patterning the conductive material with the sacrificial mask to form a plurality of conductive material segments, depositing a sacrificial layer over the sacrificial mask, and patterning the sacrificial layer, where a portion of the patterned sacrificial layer remains over the sacrificial mask, where a portion of the sacrificial mask is exposed, and where the exposed portion of the sacrificial mask extends across each of the adjacent fins. The method also includes removing the portion of the sacrificial layer over the sacrificial mask, after removing the portion of the sacrificial layer over the sacrificial mask, removing the sacrificial mask, epitaxially growing a plurality of source/drain regions from the semiconductor substrate, and electrically connecting the source/drain regions to other devices.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Inventors: Sung-Hsin Yang, Jung-Chi Jeng, Ru-Shang Hsiao, Kuo-Min Lin, Z.X. Fan, Chun-Jung Huang, Wen-Yu Kuo
  • Patent number: 11912837
    Abstract: The present disclosure provides a thin film including a first thermoplastic polyolefin (TPO) elastomer which is anhydride-grafted. The present disclosure further provides a method for manufacturing the thin film, a laminated material and a method for adhesion.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: February 27, 2024
    Assignee: SAN FANG CHEMICAL INDUSTRY CO., LTD.
    Inventors: Chih-Yi Lin, Kuo-Kuang Cheng, Chi-Chin Chiang, Wen-Hsin Tai, Ming-Chen Chang
  • Publication number: 20240058494
    Abstract: The disclosure provides a casing including a substrate, a transparent fluorescent identifying part, and a transparent antibacterial film. The transparent fluorescent identifying part is disposed on the substrate. The transparent antibacterial film covers the substrate and the transparent fluorescent identifying part. A method of manufacturing the casing is also provided.
    Type: Application
    Filed: October 30, 2023
    Publication date: February 22, 2024
    Applicant: Acer Incorporated
    Inventors: Wen-Hsin Lin, Wen-Chieh Tai, Cheng-Nan Ling
  • Patent number: 11850321
    Abstract: The disclosure provides a casing including a substrate, a transparent fluorescent identifying part, and a transparent antibacterial film. The transparent fluorescent identifying part is disposed on the substrate. The transparent antibacterial film covers the substrate and the transparent fluorescent identifying part. A method of manufacturing the casing is also provided.
    Type: Grant
    Filed: February 23, 2021
    Date of Patent: December 26, 2023
    Assignee: Acer Incorporated
    Inventors: Wen-Hsin Lin, Wen-Chieh Tai, Cheng-Nan Ling
  • Patent number: 11778766
    Abstract: A manufacturing method of a casing including the following steps is provided. A magnesium alloy substrate is provided first. Next, a protective film is formed on the magnesium alloy substrate. A grinding treatment, a cutting treatment, or an engraving treatment is then performed to remove portions of the protective film and portions of the magnesium alloy substrate. An electrophoretic coating treatment is performed afterwards to form a light-transmissive coating layer covering the protective film and the magnesium alloy substrate. A casing is also provided.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: October 3, 2023
    Assignee: Acer Incorporated
    Inventors: Wen-Hsin Lin, Cheng-Nan Ling, Wen-Chieh Tai
  • Patent number: 11746170
    Abstract: The present invention relates to an ethylene-vinyl alcohol copolymer (EVOH) resin composition, an EVOH film formed therefrom, and a multilayer structure containing the same. The core void volume (Vvc) of the surface of the EVOH resin composition is more than 0.010 ?m3/?m2 and less than 50 ?m3/?m2; or its surface pole height (Sxp) is more than 0.010 ?m and less than 9.0 ?m. The invention can reduce the torque output during processing, reduce the adsorption of fine powder on the surface caused by static electricity generated on the surface of the EVOH, and provide good film thickness uniformity.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: September 5, 2023
    Assignee: CHANG CHUN PETROCHEMICAL CO., LTD.
    Inventors: Chih Chieh Liang, Wen Hsin Lin
  • Publication number: 20230207521
    Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a first substrate with a first surface and a second surface opposite to the first surface, a second substrate adjacent to the first surface of the first substrate, and an encapsulant encapsulating the first substrate and the second substrate. The first substrate defines a space. The second substrate covers the space. The second surface of the first substrate is exposed by the encapsulant. A surface of the encapsulant is coplanar with the second surface of the first substrate or protrudes beyond the second surface of the first substrate.
    Type: Application
    Filed: February 21, 2023
    Publication date: June 29, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yung-Hsing CHANG, Wen-Hsin LIN
  • Patent number: 11685824
    Abstract: The present invention relates to an ethylene-vinyl alcohol copolymer (EVOH) resin composition, an EVOH film formed therefrom, and a multilayer structure containing the same. The surface roughness of the EVOH resin composition is a kurtosis (Sku) ranging from 0.05 to 100. The EVOH of the invention can reduce the torque output during processing, and can obtain the EVOH film with excellent appearance.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: June 27, 2023
    Assignee: CHANG CHUN PETROCHEMICAL CO., LTD.
    Inventors: Chih Chieh Liang, Wen Hsin Lin
  • Patent number: 11655317
    Abstract: The present invention relates to an ethylene-vinyl alcohol copolymer (EVOH) resin composition, an EVOH film formed therefrom, and a multilayer structure containing the same. The surface roughness of the EVOH resin composition is the root mean square gradient (Sdq) between 0.0005 and 13. The EVOH of the invention can reduce the torque output during processing, and make the appearance of the EVOH film highly uniform.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: May 23, 2023
    Assignee: CHANG CHUN PETROCHEMICAL CO., LTD.
    Inventors: Chih Chieh Liang, Wen Hsin Lin
  • Patent number: 11643575
    Abstract: The present invention relates to an ethylene-vinyl alcohol copolymer (EVOH) resin composition, an EVOH film formed therefrom, and a multilayer structure containing the same. The surface roughness of the EVOH resin composition is the peak material volume (Vmp) between 0.0008 and 10 ?m3/?m2. The EVOH of the invention can reduce the torque output during processing, and can obtain the EVOH film with excellent appearance.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: May 9, 2023
    Assignee: CHANG CHUN PETROCHEMICAL CO., LTD.
    Inventors: Chih Chieh Liang, Wen Hsin Lin
  • Patent number: 11631663
    Abstract: A control circuit applied in a specific element and including a first transistor and an electrostatic discharge (ESD) protection circuit is provided. The specific element has a III-V semiconductor material and includes a control electrode, a first electrode and a second electrode. The first transistor is coupled between the first electrode and the second electrode and has the III-V semiconductor material. The ESD protection circuit is coupled to the control electrode, the first transistor and the second electrode. In response to an ESD event, the ESD protection circuit provides a discharge path to release the ESD current from the control electrode to the second electrode.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: April 18, 2023
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Jian-Hsing Lee, Yeh-Jen Huang, Wen-Hsin Lin, Chun-Jung Chiu, Hwa-Chyi Chiou
  • Patent number: 11587903
    Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a first substrate with a first surface and a second surface opposite to the first surface, a second substrate adjacent to the first surface of the first substrate, and an encapsulant encapsulating the first substrate and the second substrate. The first substrate defines a space. The second substrate covers the space. The second surface of the first substrate is exposed by the encapsulant. A surface of the encapsulant is coplanar with the second surface of the first substrate or protrudes beyond the second surface of the first substrate.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: February 21, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yung-Hsing Chang, Wen-Hsin Lin
  • Patent number: 11569224
    Abstract: A semiconductor device including a substrate, a seed layer, a buffer layer, a channel layer, a barrier layer, a gate structure, a first source/drain structure, a second source/drain structure, and a contact is provided. The seed layer is disposed on the substrate. The buffer layer is disposed on the seed layer. The channel layer is disposed on the buffer layer. The barrier layer is disposed on the channel layer. The gate structure is disposed on the barrier layer. The first and second source/drain structures are disposed on opposite sides of the gate structure. The contact contacts the first source/drain structure. The distance between the gate structure and the contact is between 0.5 micrometers and 30 micrometers.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: January 31, 2023
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Yeh-Jen Huang, Wen-Hsin Lin, Chun-Jung Chiu, Shin-Cheng Lin, Jian-Hsing Lee