Patents by Inventor Wen Huang

Wen Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200411525
    Abstract: Embodiments herein describe techniques for a semiconductor device including a substrate. A first capacitor includes a first top plate and a first bottom plate above the substrate. The first top plate is coupled to a first metal electrode within an inter-level dielectric (ILD) layer to access the first capacitor. A second capacitor includes a second top plate and a second bottom plate, where the second top plate is coupled to a second metal electrode within the ILD layer to access the second capacitor. The second metal electrode is disjoint from the first metal electrode. The first capacitor is accessed through the first metal electrode without accessing the second capacitor through the second metal electrode. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: June 28, 2019
    Publication date: December 31, 2020
    Inventors: Travis W. LAJOIE, Abhishek A. SHARMA, Van H. LE, Chieh-Jen KU, Pei-Hua WANG, Jack T. KAVALIEROS, Bernhard SELL, Tahir GHANI, Gregory GEORGE, Akash GARG, Allen B. GARDINER, Shem OGADHOH, Juan G. ALZATE VINASCO, Umut ARSLAN, Fatih HAMZAOGLU, Nikhil MEHTA, Jared STOEGER, Yu-Wen HUANG, Shu ZHOU
  • Publication number: 20200411635
    Abstract: Embodiments herein describe techniques for a semiconductor device including a substrate, a first inter-level dielectric (ILD) layer above the substrate, and a second ILD layer above the first ILD layer. The semiconductor device further includes a capacitor having a bottom plate above the substrate, a capacitor dielectric layer adjacent to and above the bottom plate, and a top plate adjacent to and above the capacitor dielectric layer. The bottom plate, the capacitor dielectric layer, and the top plate are within the first ILD layer or the second ILD layer. Furthermore, an air gap is formed next to the top plate and below a top surface of the second ILD layer. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: June 28, 2019
    Publication date: December 31, 2020
    Inventors: Travis W. LAJOIE, Abhishek A. SHARMA, Van H. LE, Chieh-Jen KU, Pei-Hua WANG, Jack T. KAVALIEROS, Bernhard SELL, Tahir GHANI, Gregory GEORGE, Akash GARG, Allen B. GARDINER, Shem OGADHOH, Juan G. ALZATE VINASCO, Umut ARSLAN, Fatih HAMZAOGLU, Nikhil MEHTA, Yu-Wen HUANG, Shu ZHOU
  • Patent number: 10879785
    Abstract: A fault inrush transient current restraining type virtual synchronous inverter and thereof is disclosed. The invention solves the problem that a virtual synchronous inverter will be burned due to inrush transient current in an extreme situation of a symmetrical fault occurring on the grid side by setting an information collection module for inverter output voltages and currents, a virtual synchronous inverting control module, a fault detection and synthesize module, a hysteresis comparison control module and a post fault clearing switch back grid-tie control module.
    Type: Grant
    Filed: January 7, 2018
    Date of Patent: December 29, 2020
    Assignee: Hunan University
    Inventors: Zhikang Shuai, Wen Huang, Zheng Shen, Jun Wang, Junbin Fang, Chao Shen, Yang Li
  • Patent number: 10879170
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a semiconductor die, a molding compound, a polymer layer, a conductive trace, a conductive via and an inductor. The semiconductor die is laterally surrounded by the molding compound. The polymer layer covers the semiconductor die and the molding compound. The conductive trace, the conductive via and the inductor are embedded in the polymer layer. The conductive via extends from a top surface of the conductive trace to a top surface of the polymer layer. The inductor has a body portion extending horizontally and a protruding portion protruded from the body portion. A total height of the body and protruding portions is substantially equal to a sum of a thickness of the conductive trace and a height of the conductive via. The height of the body portion is greater than the thickness of the conductive trace.
    Type: Grant
    Filed: April 21, 2019
    Date of Patent: December 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yung-Ping Chiang, Chung-Shi Liu, Han-Ping Pu, Ming-Kai Liu, Ting-Chu Ko, Chang-Wen Huang, Yu-Sheng Hsieh, Ching-Yu Huang
  • Publication number: 20200400827
    Abstract: A laser detecting device able to detect and map all the contours a target object can configure and apply at least two scanning point groups on the target object. Each scanning point group includes at least two scanning points. The laser detecting device includes four light sources at different angles of incidence in relation to a diffracting element. A beam receiving element receives all the light reflected by the target object, and a central controller records emitting and receiving times of the light emitted and received. The detection beams sequentially scan the at least two scanning point groups as the central controller switches on in turn one of the four light sources as the others are powered off. Processing of data from the beam receiving element enables a three-dimensional image of the target object to be obtained.
    Type: Application
    Filed: January 16, 2020
    Publication date: December 24, 2020
    Inventors: MING-YANG PAN, CHI-WEN HUANG, CHIA-CHU LIN
  • Publication number: 20200396444
    Abstract: A method and apparatus for video coding using Intra prediction are disclosed. In one method, a first prediction sample in an immediately right column of the current block and a second prediction sample in an immediately below row of the current block are derived using angular prediction. The first prediction sample and a left column reference sample in the same row as the first prediction sample are interpolated to generate a horizontal predictor. The second prediction sample and an above-row reference sample in the same column as the second prediction sample are interpolated to generate a vertical predictor. The vertical predictor and the horizontal predictor are linearly combined to generate an angular-planar prediction sample. In another method, a first predictor is generated using angular prediction and a second predictor is generated using planar prediction. The first predictor and the second predictor are linearly combined to generate a fused Intra predictor.
    Type: Application
    Filed: October 26, 2018
    Publication date: December 17, 2020
    Inventors: Chia-Ming TSAI, Han HUANG, Chih-Wei HSU, Yu-Wen HUANG
  • Publication number: 20200392559
    Abstract: The present invention discloses a Polymerase Chain Reaction (PCR) apparatus for real-time detecting of one or more fluorescent signals. According to the apparatus, the PCR is performed by controlling heating and cooling intervals of a reagent container receiving space. With the aid of an added specific probe and fluorescent material, as well as a light source and a spectrometer, a generated fluorescent signal is detected. Meanwhile, the apparatus is also pre-loaded with an algorithm configured to analyze and quantify the fluorescent signal in a real-time manner.
    Type: Application
    Filed: March 12, 2020
    Publication date: December 17, 2020
    Applicant: CREDO DIAGNOSTICS BIOMEDICAL PTE. LTD.
    Inventors: YING-TA LAI, YU-CHENG OU, CHUN-TE WU, YU-WEN HUANG, HAN-YI CHEN
  • Patent number: 10869031
    Abstract: A method of IntraBC coding using restricted reference area is disclosed. A reference block is selected from an available ladder-shaped reference area comprising previously processed blocks before the current working block in the current CTU row and previously processed blocks in one or more previous CTU rows. A location of a last previously processed block of a second previous CTU row that is one CTU row farther away from the current CTU row than a first previous CTU row is always in a same vertical location or after a same vertical position of a last previously processed block of the first previous CTU row. The current picture may be partitioned into multiple CTU rows for applying wavefront parallel processing (WPP) on the multiple CTU rows, where the current working block corresponds to a current working block. Similar restrictions may also be applied to slice/tile-based parallel processing.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: December 15, 2020
    Assignee: HFI Innovation Inc.
    Inventors: Shan Liu, Wang-Lin Lai, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang, Chih-Wei Hsu, Xiaozhong Xu
  • Patent number: 10857609
    Abstract: The present invention provides a non-contact wire array tension control device for controlling a plurality of tension respectively corresponding to a plurality of electrical discharge wires, including delivering spools and electromagnets. The delivering spool has a magnetic end and a wire outputting end, the wire outputting end is coupled with an electrical discharge wire for outputting the electrical discharge wire. A plurality of electromagnets are coupled to the corresponding magnetic end for controlling a spin rate of the corresponding delivering spool, wherein the spin rate of the corresponding delivering spool is controlled by adjusting a magnetic force generated by the electromagnet. Moreover, a magnetic direction of the electromagnet is parallel to an axial direction of the delivering spool. The invention uses the electromagnets to control the magnetic damping force of the delivering spools for simultaneously controlling the tension of the electrical discharge wires by non-contact method.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: December 8, 2020
    Assignee: NATIONAL TAIWAN NORMAL UNIVERSITY
    Inventors: Shun-Tong Chen, Li-Wen Huang, Jin-Ping Guo, Ting-Cheng Bai
  • Patent number: 10862013
    Abstract: A high-brightness vertical light emitting diode (LED) device includes an outwardly located metal electrode having a low illumination side and a high illumination side. The LED device is formed by: forming the metal electrode on an edge of a surface of a LED epitaxy structure using a deposition method, such as physical vapor deposition (PVD), chemical vapor deposition (CVD), evaporation, electro-plating, or any combination thereof; and then performing a packaging process. The composition of the LED may be a nitride, a phosphide or an arsenide. The LED has the following advantages: improving current spreading performance, reducing light-absorption of the metal electrode, increasing brightness, increasing efficiency, and thereby improving energy efficiency. The metal electrode is located on the edge of the device and on the light emitting side. The metal electrode has two side walls, among which one side wall can receive more emission light from the device in comparison with the other one.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: December 8, 2020
    Assignee: SemiLEDs Optoelectronics Co., Co., Ltd.
    Inventors: Wen-Huang Liu, Li-Wei Shan, Chen-Fu Chu
  • Publication number: 20200379705
    Abstract: A multi-screen splicing structure has a plurality of display devices. Each display device includes a display panel, a plurality of transceivers, a wireless communications module, and a control circuit. Each transceiver has a transmitting component and a receiving component. The control circuit is coupled to the display panel, the transceivers and the wireless communications module, and is used to turn on the wireless communications module when the control circuit determines that another display device is approaching based on a status of signals received by the receiving components of the transceivers to enable the wireless communications module performing wireless communications with a wireless communications module of another display device. The control circuit may also control an orientation of an image relative to the display panel according to the status of signals received by the receiving components of the transceivers of the display device.
    Type: Application
    Filed: April 14, 2020
    Publication date: December 3, 2020
    Inventors: Chin-Jui Chi, Ta-Wei Liu, Pei-Wen Huang
  • Publication number: 20200380905
    Abstract: A multi-screen splicing structure has a plurality of display devices. Each display device has a display panel, a sensing module, and a control circuit. When the sensing module of a display device senses the sensing module of another display device, the control circuit determines which side of the display panel is adjacent to the proximate display device according to the sensing states of a plurality of sensors of the sensing module. The control circuit controls a portion of pixels adjacent to the proximate display device to display a pattern.
    Type: Application
    Filed: April 20, 2020
    Publication date: December 3, 2020
    Inventors: Chin-Jui Chi, Pei-Wen Huang, Ta-Wei Liu
  • Patent number: 10849679
    Abstract: The invention relates to a heat sink parameter determination apparatus for determining a parameter of a heat sink like a blood vessel within an object such as a person (3) by minimizing a deviation between a measured temperature distribution, which has preferentially been measured by ultrasound thermometry, and a modeled temperature distribution, wherein the modeled temperature distribution is modeled based on a provided heat source parameter like the location of an ablation needle (2) and the heat sink parameter to be determined by using a given thermal model. This determination of heat sink parameters, which may be geometric and/or flow parameters, considers the real temperature distribution and is thus based on real heat sink influences on the temperature distribution. This can lead to an improved determination of heat sink parameters and hence to a more accurate temperature distribution which may be determined based on the determined heat sink parameters.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: December 1, 2020
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Ajay Anand, Shriram Sethuraman, Sheng-Wen Huang, Junbo Li
  • Publication number: 20200375004
    Abstract: The invention provides a control method for sets of series-parallel-connected LEDs via a single wire. Step 1: providing an LED circuit including a control module and a light-emitting module. The light-emitting module includes LED strings connected to one another in parallel. Each of the LED strings includes a plurality of LED units connected in series to one another, and at least one counter comprising a counter start time different from that of another. Step 2: sending a setting signal by the control module, and allocating one identification code obtained sequentially in time to one of the LED string according to the different counter start times of the LED strings. Step3: sending a designation signal to the light-emitting module by the control module, such that the LED string with the corresponding identification value is selected and independently controlled by the control module.
    Type: Application
    Filed: May 11, 2020
    Publication date: November 26, 2020
    Inventors: TSUNG-WEN HUANG, SHIH-CHUNG CHENG, CHIH-MING KAO
  • Publication number: 20200360287
    Abstract: A pharmaceutical composition containing a mixed polymeric micelle and a drug enclosed in the micelle, in which the mixed polymeric micelle, 1 to 1000 nm in size, includes an amphiphilic block copolymer and a lipopolymer. Also disclosed are preparation of the pharmaceutical composition and use thereof for treating cancer.
    Type: Application
    Filed: May 16, 2019
    Publication date: November 19, 2020
    Inventors: Ming-Cheng Wei, Yuan-Hung Hsu, Wen-Yuan Hsieh, Chia-Wen Huang, Chih-Lung Chen, Jhih-Yun Jian, Shian-Jy Wang
  • Patent number: 10840704
    Abstract: The present invention provides a method, a system and a storage medium for frequency adjustment of an islanded virtual synchronous micro-grid. The method includes: performing frequency adjustment on inverters in the micro-grid in a cyclic manner until the respective inverters reach rated frequencies; where each cycle includes: determining, in a differential delay manner, an inverter with a highest active output in the micro-grid as a reference unit, and sending a local output factor of the reference unit as a maximum output factor of a current cycle to other inverters; determining, for each inverter in the micro-grid, an active power adjustment amount of the inverter according to the maximum output factor, a preset rated frequency, a local output factor and an actual angular frequency of the inverter; and performing frequency adjustment on the inverter according to the active power adjustment amount.
    Type: Grant
    Filed: December 15, 2019
    Date of Patent: November 17, 2020
    Assignee: Hunan University
    Inventors: Zhikang Shuai, Wen Huang, Chunming Tu, An Luo, Zheng Shen, Xuan Liu
  • Publication number: 20200357612
    Abstract: A method of wafer processing includes supporting a wafer in a process chamber. The method further includes introducing a flow of a gaseous material through an inlet of the process chamber to process the wafer. The method further includes generating, between the inlet and the wafer, controllable forces acting in various directions on the gaseous material to spread the gaseous material inside the process chamber.
    Type: Application
    Filed: July 24, 2020
    Publication date: November 12, 2020
    Inventors: Chien Kuo HUANG, Shih-Wen HUANG, Joung-Wei LIOU, Chia-I SHEN, Fei-Fan CHEN
  • Patent number: 10825650
    Abstract: This disclosure is directed to solutions of detecting and classifying wafer defects using machine learning techniques. The solutions take only one coarse resolution digital microscope image of a target wafer, and use machine learning techniques to process the coarse SEM image to review and classify a defect on the target wafer. Because only one coarse SEM image of the wafer is needed, the defect review and classification throughput and efficiency are improved. Further, the techniques are not distractive and may be integrated with other defect detecting and classification techniques.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: November 3, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Pin Chou, Sheng-Wen Huang, Jun-Xiu Liu
  • Publication number: 20200344491
    Abstract: A method of video coding using generalized bi-prediction (GBi) receives input data associated with a current block in a current picture, wherein the input data comprises information associated with a block size of the current block, determines a set of weighting factor pairs, wherein a size of the set of weighting factor pairs depends on the block size of the current block, and derives a set of advanced motion vector prediction (AMVP) candidate lists comprising MVP (motion vector prediction) candidates. The method further derives a set of final motion information based on the MVP candidates, determines that the set of final information comprises a bi-prediction predictor, generates a final predictor by combining two reference blocks associated with the final motion information using a target weighting factor pair selected from the set of weighting factor pairs, and encodes or decoding the current block using the final predictor.
    Type: Application
    Filed: July 9, 2020
    Publication date: October 29, 2020
    Inventors: Ching-Yeh CHEN, Tzu-Der CHUANG, Chih-Wei HSU, Yu-Wen HUANG
  • Publication number: 20200334071
    Abstract: An application management method, a terminal, a computer readable storage medium, and a computer program product including an instruction are disclosed. The method includes: suspending a background application when the background application meets a preset condition and disconnecting a communication link between the background application and a communications module when suspending the background application. Applicable to management of background applications on terminals, this method is intended to resolve a problem existing in the prior art that a battery life of the terminal is reduced when a large quantity of applications run in the background.
    Type: Application
    Filed: October 13, 2017
    Publication date: October 22, 2020
    Inventors: Yuhua Guo, Jing Zhao, Wen Huang