Patents by Inventor Wen Hung

Wen Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978511
    Abstract: A phase-change memory (PCM) cell is provided to include a first electrode, a second electrode, and a phase-change feature disposed between the first electrode and the second electrode. The phase-change feature is configured to change its data state based on a write operation performed on the PCM cell. The write operation includes a reset stage and a set stage. In the reset stage, a plurality of reset current pulses are applied to the PCM cell, and the reset current pulses have increasing current amplitudes. In the set stage, a plurality of set current pulses are applied to the PCM cell, and the set current pulses exhibit an increasing trend in current amplitude. The current amplitudes of the set current pulses are smaller than those of the reset current pulses.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yung-Huei Lee, Chun-Wei Chang, Jian-Hong Lin, Wen-Hsien Kuo, Pei-Chun Liao, Chih-Hung Nien
  • Patent number: 11978496
    Abstract: A method includes generating a differential voltage from a first reference voltage generator; receiving the differential voltage at a second reference voltage generator; dividing the differential voltage at the second reference voltage generator into multiple available reference voltage levels; and selecting one of the available reference voltage levels to apply to a circuit.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: May 7, 2024
    Assignee: NVIDIA CORP.
    Inventors: Jiwang Lee, Jaewon Lee, Po-Chien Chiang, Hsuche Nee, Wen-Hung Lo, Michael Ivan Halfen, Abhishek Dhir
  • Publication number: 20240145461
    Abstract: A modulation device includes a substrate, an electrostatic discharge protection element, an electronic element, and a driving element. The substrate has an active region. The electrostatic discharge protection element is arranged around the active region. The electronic element is disposed in the active region. The driving element is electrically connected to the electronic element.
    Type: Application
    Filed: October 4, 2023
    Publication date: May 2, 2024
    Applicant: Innolux Corporation
    Inventors: Ker-Yih Kao, Tong-Jung Wang, Wen-Chieh Lin, Ming-Chun Tseng, Yi-Hung Lin
  • Patent number: 11973501
    Abstract: A multi-rank circuit system includes multiple transmitters each switchably coupled to a first end of a shared input/output (IO) channel and a unified receiver coupled to a second end of the shared IO channel. The unified receiver is coupled to apply a preconfigured analog reference voltage to set a differential output of the unified receiver, and further configured to apply a variable digital code to adjust the differential output according to a particular one of the transmitters that is switched to the shared IO channel.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: April 30, 2024
    Assignee: NVIDIA CORP.
    Inventors: Jiwang Lee, Jaewon Lee, Hsuche Nee, Po-Chien Chiang, Wen-Hung Lo, Michael Ivan Halfen, Abhishek Dhir
  • Publication number: 20240136472
    Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.
    Type: Application
    Filed: December 29, 2023
    Publication date: April 25, 2024
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Tsung-Hsun CHIANG, Bo-Jiun HU, Wen-Hung CHUANG, Yu-Ling LIN
  • Publication number: 20240133421
    Abstract: An electronic device includes a monitor stand, a hinge mechanism, and an operation element. The hinge mechanism includes a back plate, a speed reduction assembly, and a friction assembly. The back plate is fixed to the monitor stand. The speed reduction assembly includes an input plate and a speed reduction member. The speed reduction member is arranged on the input plate. The friction assembly is arranged between the back plate and the input plate. The operation element is connected to the speed reduction member. A rotation center of the operation element coincides with an axis of the back plate and the speed reduction member are coaxially arranged.
    Type: Application
    Filed: January 17, 2023
    Publication date: April 25, 2024
    Inventors: Chih-Wei KUO, Yu-Chun HUNG, Che-Yen CHOU, Chen-Wei TSAI, Hsiang-Wen HUANG
  • Publication number: 20240134150
    Abstract: A lens driving apparatus includes a holder, a cover, a carrier, a first magnet, a coil, a spring, two second magnets and a hall sensor. The holder includes an opening hole. The cover is made of metal material and coupled to the holder. The carrier is movably disposed in the cover, and for coupling to a lens. The first magnet is connected to an inner side of the cover. The coil is wound around an outer side of the carrier, and adjacent to the first magnet. The spring is coupled to the carrier. The second magnets are disposed on one end of the carrier which is toward the holder. The hall sensor is for detecting a magnetic field of any one of the second magnets, wherein the magnetic field is varied according to a relative displacement between the hall sensor and the second magnet which is detected.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Chun-Yi LU, Te-Sheng TSENG, Wen-Hung HSU
  • Publication number: 20240136423
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.
    Type: Application
    Filed: December 25, 2023
    Publication date: April 25, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou
  • Patent number: 11967396
    Abstract: A multi-rank system includes multiple circuit ranks communicating over a common data line to multiple data receivers, each corresponding to one or more of the ranks and each having a corresponding reference voltage generator and clock timing adjustment circuit, such that a rank to communicate on the shared data line is switched without reconfiguring outputs of either the reference voltage generators or the clock timing adjustment circuits.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: April 23, 2024
    Assignee: NVIDIA CORP.
    Inventors: Wen-Hung Lo, Michael Ivan Halfen, Abhishek Dhir, Jaewon Lee
  • Publication number: 20240126003
    Abstract: A light source module and a display device are provided. The light source module includes a light source, a light guide plate, and an optical film set including multiple first optical microstructures having a first surface, multiple second optical microstructures having a second surface, and multiple third optical microstructures having a third surface. Each of the multiple first optical microstructures has a first vertex angle, each of the multiple second optical microstructures has a second vertex angle, and each of the multiple third optical microstructures has a third vertex angle. The third vertex angle is less than the first vertex angle, and the first vertex angle is less than or equal to the second vertex angle. By configuring the aforementioned optical microstructures, the light source module of the disclosure may greatly improve the collimation of light and has favorable luminance.
    Type: Application
    Filed: October 16, 2023
    Publication date: April 18, 2024
    Applicant: Nano Precision Taiwan Limited
    Inventors: Hsin-Wei Chen, Wen-Yen Chiu, Chao-Hung Weng, Ming-Dah Liu
  • Publication number: 20240128291
    Abstract: A sensor package structure includes a substrate, a sensor chip disposed on and electrically coupled to the substrate, a light-permeable layer, an adhesive layer having a ring-shape and sandwiched between the sensor chip and the light-permeable layer, and an encapsulant formed on the substrate. The adhesive layer has two adhering surfaces having a same area and a middle cross section located at a middle position between the two adhering surfaces. An area of the middle cross section is 115% to 200% of an area of any one of the two adhering surfaces. The adhesive layer can provide for light to travel therethrough, and enables the light therein to change direction and to attenuate. The sensor chip, the adhesive layer, and the light-permeable layer are embedded in the encapsulant, and an outer surface of the light-permeable layer is at least partially exposed from the encapsulant.
    Type: Application
    Filed: June 6, 2023
    Publication date: April 18, 2024
    Inventors: CHIA-SHUAI CHANG, CHIEN-HUNG LIN, WEI-LI WANG, WEN-FU YU, BAE-YINN HWANG
  • Publication number: 20240128139
    Abstract: A sensor package structure includes a substrate, a sensor chip disposed on the substrate along a predetermined direction for being electrically coupled to each other, a light-permeable layer, an adhesive layer having a ring-shape and sandwiched between the sensor chip and the light-permeable layer, and an encapsulant formed on the substrate. The adhesive layer is formed with at least one type of a buffering cavity, wave-shaped slots, and rectangular slots, which penetrate therethrough along the predetermined direction. The buffering cavity can be located in the adhesive layer, and any one type of the wave-shaped slots and the rectangular slots can be respectively recessed in an inner side and an outer side of the adhesive layer. A minimum width of the adhesive layer is greater than or equal to 50% of a predetermined width between the inner side and the outer side.
    Type: Application
    Filed: June 6, 2023
    Publication date: April 18, 2024
    Inventors: WEI-LI WANG, JYUN-HUEI JIANG, WEN-FU YU, BAE-YINN HWANG, CHIEN-HUNG LIN
  • Publication number: 20240128233
    Abstract: A sensor package structure and a manufacturing method thereof are provided. The sensor package structure includes a substrate, a fixing adhesive layer disposed on the substrate, a sensor chip adhered to the fixing adhesive layer, an annular adhering layer disposed on the sensor chip, a light-permeable sheet adhered to the annular adhering layer, and a plurality of metal wires that are electrically coupled to the substrate and the sensor chip. The size of the light-permeable sheet is smaller than that of the sensor chip.
    Type: Application
    Filed: June 6, 2023
    Publication date: April 18, 2024
    Inventors: CHIA-SHUAI CHANG, WEN-FU YU, BAE-YINN HWANG, WEI-LI WANG, CHIEN-HUNG LIN
  • Publication number: 20240128353
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.
    Type: Application
    Filed: December 25, 2023
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou
  • Patent number: 11963300
    Abstract: A panel device including a substrate, a conductor pad, a turning wire, and a circuit board is provided. The substrate has a first surface and a second surface connected to the first surface while a normal direction of the second surface is different from a normal direction of the first surface. The conductor pad is disposed on the first surface of the substrate. The turning wire is disposed on the substrate and extends from the first surface to the second surface. The turning wire includes a wiring layer in contact with the conductor pad and a wire covering layer covering the wiring layer. The circuit board is bonded to and electrically connected to the wire covering layer. A manufacturing method of a panel device is also provided herein.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: April 16, 2024
    Assignee: Au Optronics Corporation
    Inventors: Chun-Yueh Hou, Hao-An Chuang, Fan-Yu Chen, Hsi-Hung Chen, Yun Cheng, Wen-Chang Hsieh, Chih-Wen Lu
  • Patent number: 11961769
    Abstract: A method of forming an integrated circuit, including forming a n-type doped well (N-well) and a p-type doped well (P-well) disposed side by side on a semiconductor substrate, forming a first fin active region extruded from the N-well and a second fin active region extruded from the P-well, forming a first isolation feature inserted between and vertically extending through the N-well and the P-well, and forming a second isolation feature over the N-well and the P-well and laterally contacting the first and the second fin active regions.
    Type: Grant
    Filed: November 7, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Kuo-Hsiu Hsu, Yu-Kuan Lin, Feng-Ming Chang, Hsin-Wen Su, Lien Jung Hung, Ping-Wei Wang
  • Patent number: 11957722
    Abstract: The present invention discloses an anti-aging composition, which includes: (a) isolated lactic acid bacterial strains or a fermented product thereof; and (b) an excipient, a diluent, or a carrier; wherein the isolated lactic acid bacterial strains include: Bifidobacterium bifidum VDD088 strains, Bifidobacterium breve Bv-889 strains, and Bifidobacterium longum BLI-02 strains. The present invention further provides a method for preventing aging by administering the foregoing anti-aging composition to a subject in need thereof.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: April 16, 2024
    Assignee: GLAC BIOTECH CO., LTD
    Inventors: Hsieh-Hsun Ho, Yi-Wei Kuo, Wen-Yang Lin, Jia-Hung Lin, Yen-Yu Huang, Chi-Huei Lin, Shin-Yu Tsai
  • Patent number: 11961799
    Abstract: A semiconductor substrate structure and a method of manufacturing a semiconductor substrate structure are provided. The semiconductor substrate structure includes a substrate, an electronic device, and a filling material. The substrate defines a cavity. The electronic device is disposed in the cavity and spaced apart from the substrate by a gap. The filling material is disposed in the gap and covers a first region of an upper surface of the electronic device.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: April 16, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Wen Hung Huang
  • Publication number: 20240115410
    Abstract: An assistive device structure for positioning and pressure relief is provided, including a first elastic layer and a second elastic layer, which are attached by using a high-frequency encapsulation process, sealing, bagging, thermoforming, or an integrally molding process. Each of the first and second elastic layers has a bottom surface and an arc surface disposed opposite to each other. The arc surface includes two protrusions and a recess formed there in between. The two protrusions have different heights. A hollow area is disposed in the recess of the first and second elastic layers. Based on such structure, the bottom surfaces of the first and second elastic layers are attached to form the proposed assistive device structure for a user to lean against and providing multiple positioning effects and pressure relief. More than four axial directions of supporting forces are generated to effectively enhance muscle relaxation and stress relief.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: SY-WEN HORNG, LONG-YING CHENG, CHI-WEI HUNG, HSIANG-JUNG HUNG, LI-CHE HUNG
  • Publication number: 20240118462
    Abstract: A bokeh filter membrane, which is disposed on a surface of a substrate, includes a gradient thickness absorbing membrane and an anti-reflection membrane. The anti-reflection membrane includes a high-and-low refraction membrane and a gradient refraction membrane. A transmittance of the substrate at a center thereof is greater than a transmittance of the substrate at a peripheral region thereof. The high-and-low refraction membrane includes a first high-and-low refraction membrane and a second high-and-low refraction membrane, the gradient thickness absorbing membrane is farther away from the substrate than the first high-and-low refraction membrane, the second high-and-low refraction membrane is farther away from the substrate than the gradient thickness absorbing membrane, and the gradient refraction membrane is farther away from the substrate than the second high-and-low refraction membrane. The gradient refraction membrane includes a plurality of pores.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Inventors: Wen-Yu TSAI, Cheng-Yu TSAI, Chun-Hung TENG