Patents by Inventor Wen Hung

Wen Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250029910
    Abstract: An electronic component includes a first electronic unit including a plurality of pads, a first conductive layer, a second conductive layer, a first insulating layer having a first thickness, a second insulating layer having a second thickness, a second electronic unit, and a solder ball. The first conductive layer is disposed between the first electronic unit and the second conductive layer, and electrically connected to at least one of the pads through a conductive via. The first insulating layer is disposed between the first conductive layer and the second conductive layer. The second conductive layer is disposed between the first insulating layer and the second insulating layer. The first thickness is different from the second thickness. The second conductive layer is disposed between the first conductive layer and the second electronic unit. The second conductive layer is electrically connected to the second electronic unit through the solder ball.
    Type: Application
    Filed: October 8, 2024
    Publication date: January 23, 2025
    Applicant: Innolux Corporation
    Inventors: Yeong-E Chen, Yi-Hung Lin, Cheng-En Cheng, Wen-Hsiang Liao, Cheng-Chi Wang
  • Patent number: 12204163
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: February 5, 2024
    Date of Patent: January 21, 2025
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Patent number: 12207564
    Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate having a magnetic tunnel junction (MTJ) region and an edge region, forming an first inter-metal dielectric (IMD) layer on the substrate, and then forming a first MTJ and a second MTJ on the first IMD layer, in which the first MTJ is disposed on the MTJ region while the second MTJ is disposed on the edge region. Next, a second IMD layer is formed on the first MTJ and the second MTJ.
    Type: Grant
    Filed: July 10, 2023
    Date of Patent: January 21, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ching-Wen Hung, Yu-Ping Wang
  • Publication number: 20250020833
    Abstract: There is provided a lens including a first curved surface and a second curved surface. The first curved surface and the second curved surface have different focal distances and are arranged interlacedly along a radial direction of the lens.
    Type: Application
    Filed: September 26, 2024
    Publication date: January 16, 2025
    Inventors: HUI-HSUAN CHEN, YEN-HUNG WANG, WEN-YEN SU
  • Publication number: 20250017516
    Abstract: A method of predicting an effect of a chemotherapy treatment on a cancer patient's cognitive status using the patient's predicted age difference (PAD) comprises acquiring at least one medical brain image of a patient's brain before a chemotherapy treatment; processing the medical brain image to obtain at least one feature of the image; generating a PAD value of the individual based on the at least one feature of the image; and predicting an effect of the chemotherapy treatment on a cancer patient's cognitive status using the PAD value.
    Type: Application
    Filed: October 1, 2024
    Publication date: January 16, 2025
    Inventors: Wen-Yih Tseng, Yung-Chin Hsu, Lung Chan, Chien-Tai Hong, Yueh-Hsun Lu, Jia-Hung Chen, Li-Kai Huang
  • Publication number: 20250021458
    Abstract: The electronic device monitoring method, provided by the present invention, comprises the following steps: obtaining a coordinate information and an additional information of each electronic device by the master electronic device; generating a display position table by the master electronic device according to the coordinate information and the additional information of each electronic device; generating a barcode pattern, indicating a monitoring website and a plurality of display parameters, by the master electronic device according to the display position table in real time; reading the barcode pattern by a mobile device to connect to a browsing interface related to the monitoring website associated with a monitoring website address; displaying a device pattern corresponding to each electronic device by the browsing interface according to a plurality of display parameters; wherein the barcode pattern indicates the monitoring website address and the plurality of display parameters.
    Type: Application
    Filed: July 10, 2023
    Publication date: January 16, 2025
    Inventors: Yung-Chien WANG, Kuo-Chu HU, Szu-Hsin YEH, Chi-Wen HUNG
  • Patent number: 12197035
    Abstract: An imaging lens module includes an imaging lens unit, an optical folding component and a sensing magnet group. The imaging lens unit has an optical axis. The optical folding component is configured to fold an incident optical path into the imaging lens unit to coincide with the optical axis. The sensing magnet group includes two sensing magnets that are sequentially disposed on the imaging lens unit along a direction in parallel with the optical axis. The sensing magnets are located at the same side with respect to a reference plane that passes through the optical axis and has a normal direction perpendicular to the optical axis. When the sensing magnets are observed from the direction in parallel with the optical axis, images of the sensing magnets are at least partially overlapped. Two adjacent magnetic poles of the sensing magnets are like poles between which there is a repulsive force.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: January 14, 2025
    Assignee: LARGAN DIGITAL CO.,LTD.
    Inventors: Heng Yi Su, Ming-Ta Chou, Wen-Hung Hsu, Te-Sheng Tseng
  • Patent number: 12198998
    Abstract: A method for manufacturing a packaged integrated circuit device includes providing a semiconductor wafer having a plurality of integrated circuit devices. Each integrated circuit device extends into the semiconductor wafer to a first depth. Prior to singulation of the integrated circuit devices on the semiconductor wafer, the method further includes forming a cut between the integrated circuit devices. The cut extends to at least the first depth, but does not extend completely through the semiconductor wafer. The cut exposes a plurality of edges of each of the integrated circuit devices. The method further includes depositing, on each integrated circuit device, a passivation layer on a top surface and on the edges.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: January 14, 2025
    Assignee: NXP B.V.
    Inventors: Kuan-Hsiang Mao, Che Ming Fang, Yufu Liu, Wen Hung Huang
  • Publication number: 20250008693
    Abstract: A heat-dissipating element having a casing having a closed fluid space. At least a part of the fluid space is filled with a coolant fluid, and the coolant fluid is transformed between a liquid phase and a gas phase by an environment temperature transferred by the casing.
    Type: Application
    Filed: June 27, 2024
    Publication date: January 2, 2025
    Inventors: Tzu-Chia TAN, YAO-CHUN WANG, WEN-HUNG LIN, WEN-YUAN CHOU, PO-CHING LIN, SHANTI KARTIKA SARI
  • Patent number: 12185644
    Abstract: One or more systems, devices, methods of use and/or methods of fabrication provided herein relate to a superconducting device that can be operated with minimal electric field energy coupling at surface layers of the superconducting device and/or that can have a small footprint. According to one embodiment, a device can comprise a Josephson junction located between a first capacitor portion and a second capacitor portion of a capacitor, wherein at least a trenched section of the first capacitor portion is located beneath a surface of a substrate, and wherein at least a trenched section of the second capacitor portion is located beneath the surface of the substrate. According to another embodiment, a device can comprise a capacitor disposed within a substrate layer and the capacitor comprising a pair of material-filled trenches in the substrate layer, and a Josephson junction coupled to the capacitor.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: December 31, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Li-Wen Hung, Elbert Emin Huang, Harry Jonathon Mamin, Daniel Rugar, Martin O. Sandberg, Joseph Finley
  • Patent number: 12176465
    Abstract: A light-emitting device includes a semiconductor stack including a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer; one or multiple vias penetrating the active layer and the second semiconductor layer to expose the first semiconductor layer; a first contact layer covering the one or multiple vias; a third insulating layer including a first group of one or multiple third insulating openings on the second semiconductor layer to expose the first contact layer; a first pad on the semiconductor stack and covering the first group of one or multiple third insulating openings; and a second pad on the semiconductor stack and separated from the first pad with a distance, wherein the second pad is formed at a position other than positions of the one or multiple vias in a top view of the light-emitting device.
    Type: Grant
    Filed: April 20, 2023
    Date of Patent: December 24, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Bo-Jiun Hu, Tsung-Hsun Chiang, Wen-Hung Chuang, Kuan-Yi Lee, Yu-Ling Lin, Chien-Fu Shen, Tsun-Kai Ko
  • Publication number: 20240421803
    Abstract: A semiconductor device and a method for operating the semiconductor device are provided. The semiconductor device includes a calibration device, an adjustment device and a driver. The calibration device is configured to continuously generate a first signal including a first number of bits. The adjustment device is configured to continuously receive the first signal and generate a second signal according to the last two bits of the first signal The second signal includes a second number of bits, and the second number is different from the first number. The driver is electrically coupled to the adjustment device, wherein an output resistance of the driver is controllable in response to the second signal.
    Type: Application
    Filed: June 16, 2023
    Publication date: December 19, 2024
    Inventors: CHIN-HUA WEN, WEN-HUNG HUANG
  • Patent number: 12166156
    Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.
    Type: Grant
    Filed: December 29, 2023
    Date of Patent: December 10, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Tzu-Yao Tseng, Tsung-Hsun Chiang, Bo-Jiun Hu, Wen-Hung Chuang, Yu-Ling Lin
  • Publication number: 20240402740
    Abstract: Power supply circuits in which a supplemental current driver is utilized to boost the current provided by a voltage regulator. The supplementing driver detects operating conditions for providing the supplementary current, and may be trained to provide particular amounts of current in response to particular operation conditions of a circuit load.
    Type: Application
    Filed: June 1, 2023
    Publication date: December 5, 2024
    Applicant: NVIDIA Corp.
    Inventors: Zhonghua Li, Wen-Hung Lo, Michael Ivan Halfen, Abhishek Dhir, Jaewon Lee, Jiwang Lee, CHUNJEN SU
  • Publication number: 20240398390
    Abstract: This invention relates to a method and system for detecting ovulation in female's menstrual cycles, which involves collecting menstrual cycle information of a subject to calculate ovulation interval dates. Daily heart rate waveform signals are used to obtain heart rate-related physiological parameters, including the first cumulative power (LF), second cumulative power (HF), standard deviation of interbeat intervals (SDNN), root mean square of successive differences (RMSSD), cumulative power ratio (LF/HF), and heart rate parameter ratio (SDNN/RMSSD). The invention selects the day with the highest cumulative power ratio (LF/HF) and heart rate parameter ratio (SDNN/RMSSD) within the ovulation interval as the day of ovulation.
    Type: Application
    Filed: April 10, 2024
    Publication date: December 5, 2024
    Inventor: Wei-Wen Hung
  • Publication number: 20240395674
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a redistribution layer (RDL) over an active side of a semiconductor die. A die pad of the semiconductor die is connected to an interconnect segment of the RDL by way of a bond wire. An encapsulating layer is formed over the active side of the semiconductor die such that exposed portions of the die pad and the bond wire are embedded in the encapsulating layer.
    Type: Application
    Filed: May 24, 2023
    Publication date: November 28, 2024
    Inventors: Kuan-Hsiang Mao, Shu-Han Yang, Pey Fang Hiew, Wen Hung Huang
  • Publication number: 20240395975
    Abstract: A light-emitting device includes a semiconductor structure including a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the second semiconductor layer includes a first edge; a reflective structure located on the second semiconductor layer and including an outer edge; a first electrode pad located on the reflective structure, wherein the first electrode pad including an outer side wall adjacent to the outer edge, wherein the outer edge extends beyond the outer side wall and does not exceed the first edge in a cross-sectional view of the light-emitting device.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 28, 2024
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Wen-Hung CHUANG, Tzu-Yao TSENG, Cheng-Lin LU
  • Publication number: 20240387277
    Abstract: A method includes forming a first gate dielectric, a second gate dielectric, and a third gate dielectric over a first semiconductor region, a second semiconductor region, and a third semiconductor region, respectively. The method further includes depositing a first lanthanum-containing layer overlapping the first gate dielectric, and depositing a second lanthanum-containing layer overlapping the second gate dielectric. The second lanthanum-containing layer is thinner than the first lanthanum-containing layer. An anneal process is then performed to drive lanthanum in the first lanthanum-containing layer and the second lanthanum-containing layer into the first gate dielectric and the second gate dielectric, respectively. During the anneal process, the third gate dielectric is free from lanthanum-containing layers thereon.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 21, 2024
    Inventors: Wen-Hung Huang, Kuo-Feng Yu, Jian-Hao Chen, Shan-Mei Liao, Jer-Fu Wang, Yung-Hsiang Chan
  • Publication number: 20240387271
    Abstract: Packaged semiconductor devices are disclosed, comprising: a semiconductor die having a top major surface with a plurality of contact pads thereon, and four sides, wherein the sides are stepped such that a lower portion of each side extends laterally beyond a respective upper portion; encapsulating material encapsulating the top major surface and the upper portion of each of the sides wherein the semiconductor die is exposed at the lower portion of each of the sides; a contact-redistribution structure on the encapsulating material over the top major surface of the semiconductor die; a plurality of metallic studs extending through the encapsulating material, and providing electrical contact between the contact pads and the contact-redistribution structure. Corresponding methods are also disclosed.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Inventors: Kuan-Hsiang Mao, Wen Hung Huang, Yufu Liu
  • Patent number: 12144910
    Abstract: The present invention pertains to methods of coating antimicrobial peptides on the biomaterial and the biomaterial coated thereby. The coating solution described herein comprises one or more antimicrobial peptides (AMPs) dissolved in a buffer containing an anionic surfactant, wherein the AMPs are amphipathic and cationic.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: November 19, 2024
    Assignee: ACADEMIA SINICA
    Inventors: You-Di Liao, Dan-Wei Wang, Eden Wu, Shih-Han Wang, Wen-Hung Tang