Patents by Inventor Wen-Kun Yang

Wen-Kun Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070152693
    Abstract: The present invention provides an efficient test method and system for testing the IC package, such as BGA types of packages. With the present invention, manufacturer can have an easier way in testing various types of packages, including newer types. Manufacturer also can get the testing outcome which is more accurate. Furthermore, help the manufacturer to achieve a quite improvement in IC packaging process.
    Type: Application
    Filed: March 14, 2007
    Publication date: July 5, 2007
    Inventors: Wen-Kun Yang, Cheng Tai
  • Patent number: 7238602
    Abstract: The method includes a step of picking and placing standard good dice on a base for obtaining an appropriate and wider distance between dice than the original distance of dice on a wafer. The method of the chip-size package comprises the steps of separating dice on a wafer and picking and placing the dice on a base and filling a first material layer on the base into a space among the dice on the base. A dielectric layer with first openings is patterned to expose a portion of a conductive line of the dice. A conductive material is filled into the first openings and on the dielectric layer. Subsequently, a second material layer is formed to have a second openings exposing the conductive material and then welding solder balls on the second openings.
    Type: Grant
    Filed: October 26, 2004
    Date of Patent: July 3, 2007
    Assignee: Advanced Chip Engineering Technology Inc.
    Inventor: Wen Kun Yang
  • Publication number: 20070128835
    Abstract: The present invention provides a separating process of a semiconductor device package of wafer level package. The method comprises a step of etching a substrate to form recesses. Then a buffer layer is formed on the first surface of the substrate, wherein the buffer layer is filled with the corresponding recesses to form infillings on adjacent the semiconductor device package. Dicing the wafer into individual package along substantial center of said infillings, the step may avoid the roughness on the edge of each die and also decrease the cost of the separating process.
    Type: Application
    Filed: December 5, 2005
    Publication date: June 7, 2007
    Inventors: Wen-Kun Yang, Jui-Hsien Chang
  • Patent number: 7224061
    Abstract: A package structure including a device, an interconnecting element, a pad and a protecting element is provided. The device connects with a first end of the interconnecting element through the pad. The protecting element covers the pad and the first end of the interconnecting element.
    Type: Grant
    Filed: August 16, 2004
    Date of Patent: May 29, 2007
    Assignee: Advanced Chip Engineering Technology Inc.
    Inventors: Wen-Kun Yang, Shih-Li Chen, Wen-Bin Sun, Ming-Hui Lin, Chao-Nan Chou, Chih-Wei Lin
  • Publication number: 20070082428
    Abstract: The present invention provides a semiconductor device protective structure. The structure comprises a die with contact metal balls formed thereon electrically coupling with a print circuit board. A back surface of the die is directly adhered on a substrate and a first buffer layer is formed on the substrate. The substrate is configured over a second buffer layer such that the second buffer layer substantially encompasses the whole substrate to decrease damage to the substrate when the side of the substrate is collided with an external object.
    Type: Application
    Filed: October 3, 2006
    Publication date: April 12, 2007
    Inventors: Wen-Kun Yang, Kuang-Chi Chao, Cheng-hsien Chiu, Chihwei Lin, Jui-Hsien Chang
  • Publication number: 20070072338
    Abstract: The present invention provides a semiconductor device package singulation method. The method comprises printing a photo epoxy layer on the back surface of a substrate of a wafer for marking the scribe lines to be diced. Then etching is performed through the substrate along the marks in the photo epoxy layer. Dicing the panel into individual package with a typical art designing knife, the step not only avoids the roughness on the edge of each die, but also decrease the cost of singulation process.
    Type: Application
    Filed: September 26, 2005
    Publication date: March 29, 2007
    Inventors: Wen-Kun Yang, Chun Yu, Jui-Hsien Chang, Hsien-Wen Hsu
  • Publication number: 20070069207
    Abstract: The present invention provides an efficient test method and system for testing the IC package, such as BGA types of packages. With the present invention, manufacturer can have an easier way in testing various types of packages, including newer types. Manufacturer also can get the testing outcome which is more accurate. Furthermore, help the manufacturer to achieve a quite improvement in IC packaging process.
    Type: Application
    Filed: September 26, 2005
    Publication date: March 29, 2007
    Inventors: Wen-Kun Yang, Cheng Tai
  • Patent number: 7196408
    Abstract: To pick and place standard dies on a new base for obtaining an appropriate and wider distance between dies than the original distance of dies on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type package. Moreover, the die may be packaged with passive components or other dies with a side by side structure or a stacking structure.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: March 27, 2007
    Inventors: Wen-Kun Yang, Wen-Pin Yang, Shih-Li Chen
  • Publication number: 20070059866
    Abstract: To pick and place standard dies on a new base for obtaining an appropriate and wider distance between dies than the original distance of dies on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type package. Moreover, the die may be packaged with passive components or other dies with a side by side structure or a stacking structure.
    Type: Application
    Filed: November 13, 2006
    Publication date: March 15, 2007
    Applicant: ADVANCED CHIP ENGINEERING TECHNOLOGY INC.
    Inventors: Wen-Kun Yang, Wen-Pin Yang, Shih-Li Chen
  • Patent number: 7176567
    Abstract: The present invention provides a semiconductor device protective structure. The structure comprises a die with contact metal balls formed thereon electrically coupling with a print circuit board. A back surface of the die is directly adhered on a substrate and a first buffer layer is formed on the substrate. The substrate is configured over a second buffer layer such that the second buffer layer substantially encompasses the whole substrate to decrease damage to the substrate when the side of the substrate is collided with an external object.
    Type: Grant
    Filed: July 6, 2005
    Date of Patent: February 13, 2007
    Assignee: Advanced Chip Engineering Technology Inc.
    Inventors: Wen-Kun Yang, Kuang-Chi Chao, Cheng-hsien Chiu, Chihwei Lin, Jui-Hsien Chang
  • Publication number: 20070007648
    Abstract: The present invention provides a semiconductor device protective structure. The structure comprises a die with contact metal balls formed thereon electrically coupling with a print circuit board. A back surface of the die is directly adhered on a substrate and a first buffer layer is formed on the substrate. The substrate is configured over a second buffer layer such that the second buffer layer substantially encompasses the whole substrate to decrease damage to the substrate when the side of the substrate is collided with an external object.
    Type: Application
    Filed: July 6, 2005
    Publication date: January 11, 2007
    Inventors: Wen-Kun Yang, Kuang-Chi Chao, Cheng-hsien Chiu, Chihwei Lin, Jui-Hsien Chang
  • Publication number: 20060231958
    Abstract: To pick and place standard dice on a new base for obtaining an appropriate and wider distance between dice than the original distance of dice on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type wafer level package. Moreover, the die may be packaged with passive components or other dice with a side by side structure or a stacking structure.
    Type: Application
    Filed: July 7, 2006
    Publication date: October 19, 2006
    Inventor: Wen-Kun Yang
  • Publication number: 20060145364
    Abstract: A filling paste structure and process of wafer level package is disclosed. The process comprises filling an adhesive material to fill among plurality of dice and cover the plurality of dice. The pluralities of dice are adhered to glue pattern with viscosity in common state formed on a removable substrate. A rigid substrate is coated by adhesive material to adhere the dice. Then, pluralities of dice are departed from the glue pattern by a special environment after attaching the rigid base substrate.
    Type: Application
    Filed: December 30, 2004
    Publication date: July 6, 2006
    Inventors: Wen-Kun Yang, Chin-Chen Yang, Cheng-hsien Chiu, Wen-Bin Sun, Kuang-Chi Chao, His-Ying Yuan, Chun-Hui Yu
  • Publication number: 20060145325
    Abstract: A structure of package comprises a die placed on printed circuit board. A glass substrate is adhered on an adhesive film pattern to form an air gap area between the glass substrate and the chip. Micro lens are disposed on the chip. A lens holder is fixed on printed circuit board. The glass substrate can prevent the micro lens from particle contamination.
    Type: Application
    Filed: January 5, 2005
    Publication date: July 6, 2006
    Inventors: Wen-Kun Yang, Chin-Chen Yang, Wen-Bin Sun, Jui-Hsien Chang, Chun Yu, His-Ying Yuan
  • Patent number: 7061106
    Abstract: The present invention discloses an image sensor module and forming method of wafer level package. The image sensor module comprises an isolating base, a wafer level package, a lens holder, and a F.P.C.. The wafer level package having a plurality of image sensor dies and a plurality of solder balls is attached to the isolating base. A plurality of lens are placed in the lens holder, and the lens holder is located on the image sensor dies. The lens holder is placed in the F.P.C., and the F.P.C. has a plurality of solder joints coupled to the solder balls for conveniently transmitting signal of the image sensor dies. Moreover, the image sensor dies may be packaged with passive components or other dies with a side by side structure or a stacking structure.
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: June 13, 2006
    Assignee: Advanced Chip Engineering Technology Inc.
    Inventors: Wen-Kun Yang, Wen-Pin Yang
  • Publication number: 20060105594
    Abstract: The present invention discloses a contact method of burn-in and test after packaging. The method comprises providing a print circuit board. A solder join socket is engaged with a first fixed plate, the solder join socket with contact spring located in the solder join socket. An adhesive material is formed onto pads area of the print circuit board. The solder join socket is attached to the adhesive material. A second fixed plate is engaged with the first fixed plate and the solder join socket. A third fixed plate is inserted into the solder join socket following up the second fixed plate. A contact ball of a ball grid array (BGA) package is coupled with the contact spring for performing testing. Between the contact ball and the contact spring may keep an approximately constant pressure by utilizing the surface of the third fixed plate contacting with the surface of the ball grid array (BGA) package.
    Type: Application
    Filed: December 28, 2005
    Publication date: May 18, 2006
    Inventor: Wen-Kun Yang
  • Publication number: 20060091514
    Abstract: To pick and place standard dies on a new base for obtaining an appropriate and wider distance between dies than the original distance of dies on a wafer. The package structure has a larger size of balls array than the size of the die by fan out type package. Moreover, the die may be packaged with passive components or other dies with a side by side structure or a stacking structure.
    Type: Application
    Filed: December 12, 2005
    Publication date: May 4, 2006
    Inventors: Wen-Kun Yang, Wen-Pin Yang, Shih-Li Chen
  • Publication number: 20060087036
    Abstract: The method includes a step of picking and placing standard good dice on a base for obtaining an appropriate and wider distance between dice than the original distance of dice on a wafer. The method of the chip-size package comprises the steps of separating dice on a wafer and picking and placing the dice on a base and filling a first material layer on the base into a space among the dice on the base. A dielectric layer with first openings is patterned to expose a portion of a conductive line of the dice. A conductive material is filled into the first openings and on the dielectric layer. Subsequently, a second material layer is formed to have a second openings exposing the conductive material and then welding solder balls on the second openings.
    Type: Application
    Filed: October 26, 2004
    Publication date: April 27, 2006
    Inventor: Wen-Kun Yang
  • Publication number: 20060033196
    Abstract: A package structure including a device, an interconnecting element, a pad and a protecting element is provided. The device connects with a first end of the interconnecting element through the pad. The protecting element covers the pad and the first end of the interconnecting element.
    Type: Application
    Filed: August 16, 2004
    Publication date: February 16, 2006
    Inventors: Wen-Kun Yang, Shih-Li Chen, Wen-Bin Sun, Ming-Hui Lin, Chao-Nan Chou, Chih-Wei Lin
  • Publication number: 20050249945
    Abstract: A tool of wafer level package comprises a first base, an elastic material and a second base. The elastic material is coated on the first base, and the elastic material has viscosity in common state to adhere a plurality of dies. The second base is coated by adhesive material to adhere the dies. The plurality of dies are departed from the elastic material by a special environment after adhering.
    Type: Application
    Filed: May 10, 2004
    Publication date: November 10, 2005
    Inventors: Wen Kun Yang, Wen Ping Yang, Shih Li Chen