Patents by Inventor Wen Kuo

Wen Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9852936
    Abstract: A load port for a processing tool includes a carrier, a carrier actuator, an input table, an input table actuator, and a controller. The carrier has a plurality of cassette buffering spaces. The carrier is movable relative to the processing tool. The carrier actuator is operably connected to the carrier. The input table is configured to receive at least one cassette. The input table is movable relative to the carrier. The input table actuator is operably connected to the input table. The controller is configured to control the carrier actuator to move the carrier, such that one of the cassette buffering spaces is aligned with the input table, configured to control the input table actuator to move the input table with the cassette into the aligned cassette buffering space, and configured to control the input table to load the cassette into the aligned cassette buffering space.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: December 26, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo
  • Publication number: 20170365508
    Abstract: A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a second mask layer over the first mask layer. A first-photo-first-etching is performed to form a first via pattern in the second mask layer, wherein the first-photo-first-etching stops on a top surface of the first mask layer. A second-photo-second-etching is performed to form a second via pattern in the second mask layer, wherein the second-photo-second-etching stops on the top surface of the first mask layer. The first mask layer is etched using the second mask layer as an etching mask. The photo resist and the dielectric layer are etched to simultaneously transfer the first via pattern and the second via pattern into the dielectric layer.
    Type: Application
    Filed: September 1, 2017
    Publication date: December 21, 2017
    Inventors: Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Wen-Kuo Hsieh, Yu-Yun Peng
  • Patent number: 9786530
    Abstract: A wafer transfer method includes the following steps. An initial position of a first wafer in a wafer cassette is detected. A picking entry position in the wafer cassette is determined based on the initial position of the first wafer, in which the picking entry position is spaced apart from the initial position of the first wafer. A wafer transfer blade is moved to the picking entry position.
    Type: Grant
    Filed: October 20, 2014
    Date of Patent: October 10, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo
  • Publication number: 20170274029
    Abstract: Use of Mesembryanthemum crystallinum L. callus extract in the manufacture of a medicament or a skin care product, wherein the medicament or skin care product is for at least one of delaying skin cell aging, nursing skin, repairing skin, treating skin cancer, and preventing skin cancer.
    Type: Application
    Filed: March 17, 2017
    Publication date: September 28, 2017
    Inventors: Yung-Hsiang LIN, Wei-Wen KUO, I-Hui CHEN, Yi-Chun CHEN, Hui-Hsin SHIH, Yun-Ching TSAI
  • Patent number: 9754818
    Abstract: A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a second mask layer over the first mask layer. A first-photo-first-etching is performed to form a first via pattern in the second mask layer, wherein the first-photo-first-etching stops on a top surface of the first mask layer. A second-photo-second-etching is performed to form a second via pattern in the second mask layer, wherein the second-photo-second-etching stops on the top surface of the first mask layer. The first mask layer is etched using the second mask layer as an etching mask. The photo resist and the dielectric layer are etched to simultaneously transfer the first via pattern and the second via pattern into the dielectric layer.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: September 5, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Wen-Kuo Hsieh, Yu-Yun Peng
  • Patent number: 9728445
    Abstract: In accordance with some embodiments, a method for forming via holes is provided. The method includes providing a substrate with an etch stop layer and a dielectric layer sequentially formed thereon. The method also includes etching the dielectric layer to form a first via hole of a first size and a second via hole of a second size within the dielectric layer by a plasma generated from an etch gas, until both the first via hole and the second via hole are reaching the etch stop layer. The etch gas includes CH2F2 and an auxiliary gas of N2 or O2.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: August 8, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Kuo Hsieh, Ming-Chung Liang
  • Patent number: 9714887
    Abstract: A detection method for a substance and a system thereof are provided. The detection method for a substance contained in a sample includes providing a reagent in reaction with the substance to form a chelate; and pressurizing the substance to accumulate the chelate.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: July 25, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Wen Kuo, Yu-Kun Hung, Tzu-Sou Chuang
  • Publication number: 20170200636
    Abstract: A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a second mask layer over the first mask layer. A first-photo-first-etching is performed to form a first via pattern in the second mask layer, wherein the first-photo-first-etching stops on a top surface of the first mask layer. A second-photo-second-etching is performed to form a second via pattern in the second mask layer, wherein the second-photo-second-etching stops on the top surface of the first mask layer. The first mask layer is etched using the second mask layer as an etching mask. The photo resist and the dielectric layer are etched to simultaneously transfer the first via pattern and the second via pattern into the dielectric layer.
    Type: Application
    Filed: August 2, 2016
    Publication date: July 13, 2017
    Inventors: Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Wen-Kuo Hsieh, Yu-Yun Peng
  • Publication number: 20170079134
    Abstract: A multi-layer printed circuit board comprises: a core comprising a core insulation layer and traces formed on two sides of the core insulation layer; a plurality of insulation layers sequentially formed at two sides of the core; and a plurality of trace layers respectively formed between two insulation layers and on the outmost insulation layers; wherein the core insulation layer contains a resin material different from that of the insulation layers, such that the core insulation layer has a dimensional stability superior to that of the insulation layers.
    Type: Application
    Filed: November 29, 2016
    Publication date: March 16, 2017
    Inventors: Ya-Wen KUO, Li-Chih YU, Ching-Hsin HO
  • Patent number: 9570653
    Abstract: A method for fabricating a light-emitting device is provided. The method includes: providing a substrate; forming a sacrificial dielectric layer on the substrate, wherein the sacrificial dielectric layer is a structure containing voids; forming a buffer layer on the sacrificial dielectric layer; forming an epitaxial light-emitting structure on the buffer layer; forming a metal bonding layer on the epitaxial light-emitting structure; bonding the metal bonding layer to a thermally conductive substrate; and wet etching the sacrificial dielectric layer for to remove the substrate.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: February 14, 2017
    Assignee: LEXTAR ELECTRONICS CORPORATION
    Inventors: Kuo-Lung Fang, Chi-Wen Kuo, Jun-Rong Chen, Chih-Hao Yang
  • Patent number: 9545018
    Abstract: A multi-layer printed circuit board comprises: a core comprising a core insulation layer and traces formed on two sides of the core insulation layer; a plurality of insulation layers sequentially formed at two sides of the core; and a plurality of trace layers respectively formed between two insulation layers and on the outmost insulation layers; wherein the core insulation layer contains a resin material different from that of the insulation layers, such that the core insulation layer has a dimensional stability superior to that of the insulation layers.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: January 10, 2017
    Assignee: ELITE MATERIAL CO., LTD.
    Inventors: Ya-Wen Kuo, Li-Chih Yu, Ching-Hsin Ho
  • Publication number: 20160360183
    Abstract: A monitor system includes at least one three-dimensional camera circuit and a controller. Each of the at least one three-dimensional camera circuit is used for capturing a plurality of images including an object, and generating a depth map corresponding to the object according to the plurality of images. The controller is used for determining a plurality of feature points corresponding to the object according to the plurality of images or depth map, determining relative coordinates of the plurality of feature points according to the depth map, generating external information corresponding to the object according to the relative coordinates of the plurality of feature points, and generating monitor information corresponding to the object according to the external information corresponding to the object and reference parameters corresponding to the object.
    Type: Application
    Filed: June 2, 2016
    Publication date: December 8, 2016
    Inventors: Chao-Chun Lu, Wen-Kuo Lin
  • Publication number: 20160346275
    Abstract: The present invention relates to injectable, extended-release, pharmaceutical formulations comprising a nalbuphine ester prodrug homogenously dissolved in a solution comprising a pharmaceutically acceptable oil and an oil-miscible retaining solvent, as well as manufacturing processes and medical uses of the formulations. The invention further provides methods for adjusting the duration of action of the formulations by varying the ratio of the pharmaceutically acceptable oil and the oil-miscible retaining solvent.
    Type: Application
    Filed: May 27, 2016
    Publication date: December 1, 2016
    Inventors: Chan-Jung LI, David Chih-Kuang CHOU, Jin-Ding HUANG, Shin-Jr. TSAI, Shu-Wen KUO, Yu-En TIEN
  • Publication number: 20160320359
    Abstract: A system for monitoring contaminations includes a moisture-containing chilating gas supply adapted to provide a moisture-containing chilating gas mixing with a purge gas evacuated from a chamber, a cooling device adapted to condense a mixed gas comprising the moisture-containing chilating gas and the purge gas into a droplet, an impinger adapted to collecting the droplet on a sampling tube wall and in the mixed gas, and a conductivity meter. The droplet is dissolved in a DI water in the impinger, and the conductivity meter measures a conductivity of a fluid including the droplet and the DI water in the impinger. The fluid with contaminations has higher conductivity than that without contaminations, such that the polluted chamber can be selected.
    Type: Application
    Filed: April 29, 2015
    Publication date: November 3, 2016
    Inventors: Tzu-Sou CHUANG, Chi-Wen KUO
  • Patent number: 9460957
    Abstract: An isolation feature with a nitrogen-doped fill dielectric and a method of forming the isolation feature are disclosed. In an exemplary embodiment, the method of forming the isolation feature comprises receiving a substrate having a top surface. A recess is etched in the substrate, the recess extending from the top surface into the substrate. A dielectric is deposited within the recess such that the depositing of the dielectric includes introducing nitrogen during a chemical vapor deposition process. Accordingly, the deposited dielectric includes a nitrogen-doped dielectric. The deposited dielectric may include a nitrogen-doped silicon oxide. In some embodiments, the depositing of the dielectric disposes the nitrogen-doped dielectric in contact with a surface of the recess. In further embodiments, a liner material is deposited within the recess prior to the depositing of the dielectric within the recess.
    Type: Grant
    Filed: September 9, 2013
    Date of Patent: October 4, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shing Long Lee, Yi-Chieh Wang, Chung-Han Lin, Kuang-Jung Peng, Yun Chang, Shou-Wen Kuo
  • Patent number: 9456202
    Abstract: An attachable three-dimensional scan module includes an attachable unit, at least two image sensing units, a depth map generation unit, and an output interface. The attachable unit fixes the attachable three-dimensional scan module on a mobile device. When the mobile device is moved around an object, a first image sensing unit and a second image sensing unit of the at least two image sensing units capture a plurality of first images including the object and a plurality of second images including the object, respectively. A plurality of depth maps generated by the depth map generation unit, the plurality of first images, and the plurality of second images are used for generating a color three-dimensional scan result corresponding to the object. The output interface outputs the color three-dimensional scan result, or the plurality of first images, the plurality of second images, and the plurality of depth maps.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: September 27, 2016
    Assignee: eYs3D Microelectronics, Co.
    Inventors: Chao-Chun Lu, Le-Shan Hsueh, Wen-Kuo Lin
  • Publication number: 20160269709
    Abstract: An image process apparatus includes an image capture device, a filter, a depth estimation unit, and a mixture unit. The image capture device captures an original image including at least one target object and generates a first depth map corresponding to the original image. The filter selects the at least one target object from the original image according to the first depth map and generates a temporary image including the at least one target object. The temporary image has a depth information of the at least one target object. The depth estimation unit generates a second depth map corresponding to an input image according to the input image. The mixture unit blends the temporary image into a predetermined field depth of the input image to generate a blending image including the input image and the at least one target object according to the depth information and the second depth map.
    Type: Application
    Filed: March 11, 2016
    Publication date: September 15, 2016
    Inventor: Wen-Kuo Lin
  • Patent number: 9412648
    Abstract: A method includes forming a dielectric layer, forming a photo resist over the dielectric layer, forming a first mask layer over the photo resist, and forming a second mask layer over the first mask layer. A first-photo-first-etching is performed to form a first via pattern in the second mask layer, wherein the first-photo-first-etching stops on a top surface of the first mask layer. A second-photo-second-etching is performed to form a second via pattern in the second mask layer, wherein the second-photo-second-etching stops on the top surface of the first mask layer. The first mask layer is etched using the second mask layer as an etching mask. The photo resist and the dielectric layer are etched to simultaneously transfer the first via pattern and the second via pattern into the dielectric layer.
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: August 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Hau Shiu, Chung-Chi Ko, Tze-Liang Lee, Wen-Kuo Hsieh, Yu-Yun Peng
  • Publication number: 20160222336
    Abstract: The present invention provides a microfluidic bio-reactor device, which comprises: a first cell culture layer; a microfluidic base, which is located on the top of the first cell culture layer; a microfluidic layer, which is located on the top of the microfluidic base and have an air-bubble removal device; a microfluidic roof, which is located on the top of the microfluidic layer; the present invention also provides a method for culturing cells by the microfluidic bio-reactor device of the present invention and the kit with a cell-loading device and present microfluidic bio-reactor device.
    Type: Application
    Filed: April 8, 2015
    Publication date: August 4, 2016
    Inventors: Oscar Kuang-Sheng Lee, Meng-Hua Yen, Shu-Wen Kuo
  • Publication number: 20160225649
    Abstract: A load port for a processing tool includes a carrier, a carrier actuator, an input table, an input table actuator, and a controller. The carrier has a plurality of cassette buffering spaces. The carrier is movable relative to the processing tool. The carrier actuator is operably connected to the carrier. The input table is configured to receive at least one cassette. The input table is movable relative to the carrier. The input table actuator is operably connected to the input table. The controller is configured to control the carrier actuator to move the carrier, such that one of the cassette buffering spaces is aligned with the input table, configured to control the input table actuator to move the input table with the cassette into the aligned cassette buffering space, and configured to control the input table to load the cassette into the aligned cassette buffering space.
    Type: Application
    Filed: January 29, 2015
    Publication date: August 4, 2016
    Inventors: Chien-Fa LEE, Hsu-Shui LIU, Jiun-Rong PAI, Shou-Wen KUO