Patents by Inventor Wen Kuo
Wen Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230350850Abstract: Techniques are provided for implementing a defragmentation process during a merge operation performed by a re-compaction process upon a log structured merge tree. The log structured merge tree is used to store keys of key-value pairs within a key-value store. As the log structured merge tree fills with keys over time, the re-compaction process is performed to merge keys down to lower levels of the log structured merge tree to re-compact the keys. Re-compaction can result in fragmentation because there is a lack of spatial locality of where the re-compaction operations re-writes the keys within storage. Fragmentation increases read and write amplification when accessing the keys stored in different locations within the storage. Accordingly, the defragmentation process is performed during a last merge operation of the re-compaction process in order to store keys together within the storage, thus reducing read and write amplification when accessing the keys.Type: ApplicationFiled: April 28, 2022Publication date: November 2, 2023Inventors: Anil Paul Thoppil, Wei Sun, Meera Odugoudar, Szu-Wen Kuo, Santhosh Selvaraj
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Publication number: 20230350810Abstract: Techniques are provided for implementing a hash building process and an append hash building process. The hash building process builds in-memory hash entries for bins of keys stored within sorted logs of a log structured merge tree used to store keys of a key-value store. The in-memory hash entries can be used to identify the starting locations of bins of keys within the log structured merge tree so that a key within a bin can be searched for from the starting location of the bin as opposed to having to search the entire log structured merge tree. The append hash building process builds two hashes that can be used to more efficiently locate keys and/or ranges of keys within an unsorted append log that would otherwise require a time consuming binary search of the entire append log.Type: ApplicationFiled: April 28, 2022Publication date: November 2, 2023Inventors: Anil Paul Thoppil, Wei Sun, Meera Odugoudar, Szu-Wen Kuo, Santhosh Selvaraj
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Patent number: 11798943Abstract: In an embodiment, a method includes: depositing a protective layer on a source/drain region and a gate mask, the gate mask disposed on a gate structure, the gate structure disposed on a channel region of a substrate, the channel region adjoining the source/drain region; etching an opening through the protective layer, the opening exposing the source/drain region; depositing a metal in the opening and on the protective layer; annealing the metal to form a metal-semiconductor alloy region on the source/drain region; and removing residue of the metal from the opening with a cleaning process, the protective layer covering the gate mask during the cleaning process.Type: GrantFiled: June 4, 2021Date of Patent: October 24, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yang-Cheng Wu, Yun-Hua Chen, Wen-Kuo Hsieh, Huan-Just Lin
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Publication number: 20230327036Abstract: A solar cell structure includes a semiconductor substrate having a front side and a back side. A pyramid structure is disposed on the front side of the semiconductor substrate. The pyramid structure has an aspect ratio between 0.5-1.2. A front passivation layer is disposed on the pyramid structure. A first anti-reflection layer is disposed on the pyramid structure. The first anti-reflection layer is a multi-layered, graded anti-reflection layer having at least three coating layers. The at least three coating layers comprise a silicon oxynitride layer having a thickness of 15-30 nm and a refractive index between 1.65 and 1.75. The silicon oxynitride layer is an outermost layer of the multi-layered, graded anti-reflection layer.Type: ApplicationFiled: June 7, 2023Publication date: October 12, 2023Applicant: TSEC CorporationInventors: Cheng-Wen Kuo, Yung-Chih Li, Ying-Quan Wang, Sheng-Kai Wu, Wen-Ching Chu, Ta-Ming Kuan, Hung Cheng, Jen-Ho Kang, Cheng-Yeh Yu
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Patent number: 11764097Abstract: A system and method for cleaning and inspecting ring frames is disclosed here. In one embodiment, a ring frame processing system includes: a cleaning station configured to remove a first tape on a first surface of a ring frame using a first blade, clean first adhesive residues from the first tape on the first surface of the ring frame using a first wheel brush, and remove second adhesive residues from a second tape on a second surface of the ring frame using a second blade; and an inspection station, wherein the inspection station comprises an automated optical inspection system configured to determine the cleanness of the first and second surfaces of the ring frame after cleaning.Type: GrantFiled: May 5, 2021Date of Patent: September 19, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo, Jian-Hung Cheng, M. C. Lin, C. C. Chien, Hsuan Lee, Boris Huang
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Patent number: 11762744Abstract: Failover methods and systems for a networked storage environment are provided. In one aspect, a read request associated with a first storage object is received, during a replay of entries of a log stored in a non-volatile memory of a second storage node for a failover operation initiated in response to a failure at a first storage node. The second storage node operates as a partner node of the first storage node. The read request is processed using a filtering data structure that is generated from the log prior to the replay and identifies each log entry. The read request is processed when the log does not have an entry associated with the read request, and when the filtering data structure includes an entry associated with the read request, the requested data is located at the non-volatile memory.Type: GrantFiled: May 24, 2022Date of Patent: September 19, 2023Assignee: NETAPP, INC.Inventors: Asif Imtiyaz Pathan, Parag Sarfare, Ananthan Subramanian, Szu-Wen Kuo, Santhosh Selvaraj, Nikhil Mattankot
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Patent number: 11754989Abstract: A semiconductor equipment management method applicable to an electronic device for managing multiple pieces of semiconductor equipment is provided. The pieces of semiconductor equipment are respectively controlled through multiple control hosts, and the control hosts and the electronic device are connected to a switch device. The method includes: receiving real-time image information of each control host through the switch device; determining whether the real-time image information of each control host includes a triggering event by performing an image recognition on the real-time image information; executing a macro corresponding to the triggering event, where the macro includes at least one self-defined operation; generating at least one input command according to the self-defined operation of the executed macro; and controlling the control hosts to execute the self-defined operation of the executed macro by transmitting the input command to the control hosts through the switch device.Type: GrantFiled: November 16, 2020Date of Patent: September 12, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sing-Tsung Li, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Shou-Wen Kuo, Chien-Ko Liao
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Publication number: 20230221645Abstract: A multi-spray RRC process with dynamic control to improve final yield and further reduce resist cost is disclosed. In one embodiment, a method, includes: dispensing a first layer of solvent on a semiconductor substrate while spinning at a first speed for a first time period; dispensing the solvent on the semiconductor substrate while spinning at a second speed for a second time period so as to transform the first layer to a second layer of the solvent; dispensing the solvent on the semiconductor substrate While spinning at a third speed for a third time period so as to transform the second layer to a third layer of the solvent; dispensing the solvent on the semiconductor substrate while spinning at a fourth speed for a fourth time period so as to transform the third layer to a fourth layer of the solvent; and dispensing a first layer of photoresist on the fourth layer of the solvent while spinning at a fifth speed for a fifth period of time.Type: ApplicationFiled: February 27, 2023Publication date: July 13, 2023Inventors: Ming-Hsuan CHUANG, Po-Sheng LU, Shou-Wen KUO, Cheng-Yi HUANG, Chia-Hung CHU
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Patent number: 11699619Abstract: Some embodiments relate to a processing tool for processing a singulated semiconductor die. The tool includes an evaluation unit, a drying unit, and a die wipe station. The evaluation unit is configured to subject the singulated semiconductor die to a liquid to detect flaws in the singulated semiconductor die. The drying unit is configured to dry the liquid from a frontside of the singulated semiconductor die. The die wipe station includes an absorptive drying structure configured to absorb the liquid from a backside of the singulated semiconductor die after the drying unit has dried the liquid from the frontside of the singulated semiconductor die.Type: GrantFiled: April 21, 2021Date of Patent: July 11, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Sheng Kuo, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo, Yang-Ann Chu
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Publication number: 20230214363Abstract: Asynchronous snapshot invalidation techniques are described. According to various such techniques, an enhanced file handle structure may be defined that includes a snapshot generation ID that is to comprise a value that singularly identifies a snapshot performed at a particular point in time. In some embodiments, when a snapshot ID assigned to that snapshot is reused at a subsequent point in time, a different snapshot generation ID may be assigned to that subsequent snapshot. With respect to an in-core cache, the differing snapshot generation IDs may eliminate unacceptable ambiguity regarding respective file information sets corresponding to the initial and subsequent snapshots sharing the same snapshot ID. As a result, obsolete file information sets may be cleared from the in-core cache asynchronously, enabling improved performance. The embodiments are not limited in this context.Type: ApplicationFiled: February 28, 2023Publication date: July 6, 2023Inventors: Mardiros Z. Chakalian, Amber Palekar, Szu-Wen Kuo, Stephen Wu
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Publication number: 20230176791Abstract: Techniques are provided for compacting indirect blocks. For example, an object is represented as a structure comprising data blocks within which data of the object is stored and indirect blocks comprising block numbers of where the data blocks are located in storage. Block numbers within a set of indirect blocks are compacted into a compacted indirect block comprising a base block number, a count of additional block numbers after the base block number in the compacted indirect block, and a pattern of the block numbers in the compacted indirect block. The compacted indirect block is stored into memory for processing access operations to the object. Storing compacted indirect blocks into memory allows for more block numbers to be stored within memory. This improves the processing of access operations because reading the block numbers from memory is faster than loading the block numbers from disk.Type: ApplicationFiled: October 10, 2022Publication date: June 8, 2023Inventors: Ananthan Subramanian, Kumaran Nagappan, Sriram Venketaraman, Szu-Wen Kuo, Yong Eun Cho
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Patent number: 11651981Abstract: A system and method for defect detection in a hole array on a substrate is disclosed herein. In one embodiment, a method for defect detection in a hole array on a substrate, includes: scanning a substrate surface using at least one optical detector, generating at least one image of the substrate surface; and analyzing the at least one image to detect defects in the hole array on the substrate surface based on a set of predetermined criteria.Type: GrantFiled: August 18, 2020Date of Patent: May 16, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Jiao-Rou Liao, Sheng-Hsiang Chuang, Cheng-Kang Hu, Hsu-Shui Liu, Jiun-Rong Pai, Shou-Wen Kuo
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Publication number: 20230060960Abstract: A slurry monitoring device, a CMP system and a method of in-line monitoring a slurry are provided. The slurry monitoring device incudes a slurry metrology cell, a plurality of light sources and at least one optical detector. The slurry metrology cell is configured to accommodating a slurry. The light sources are configured to emit light beams on the slurry in the slurry metrology cell. The light sources include a first light source configured to emit a first light beam having a first wavelength, and a second light source configured to emit a second light beam having a second wavelength longer than the first wavelength. The at least one optical detector is configured to detect an intensity of the light beams scattered by abrasive particles in the slurry.Type: ApplicationFiled: August 27, 2021Publication date: March 2, 2023Inventors: CHWEN YU, TING-WEN CHEN, CHI WEN KUO
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Publication number: 20230063350Abstract: The present disclosure provides a measuring system. The measuring system includes an insulative tube, a capacitor and a static charge meter. The insulative tube is configured to allow a fluid to flow therethrough. The capacitor is disposed on a surface of a section of the insulative tube. The capacitor includes a first metallic layer, a second metallic layer opposite to the first metallic layer, and a dielectric layer sandwiched between the first metallic layer and the second metallic layer. The static charge meter is electrically coupled to the capacitor and configured to measure static charge accumulated inside the section of the insulative tube.Type: ApplicationFiled: August 30, 2021Publication date: March 2, 2023Inventors: TZU-SOU CHUANG, CHWEN YU, EN TIAN LIN, CHI WEN KUO
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Publication number: 20230066472Abstract: A system and a method for testing a filter used in ultrapure water are provided. The method for testing a filter, which is used for removing particles from ultrapure water, comprises: providing a testing solution with particles; detecting the particles in the testing solution by a particle counter; passing the testing solution through a filter; and detecting the particles in the testing solution, which is passed through the filter, by another particle counter.Type: ApplicationFiled: August 30, 2021Publication date: March 2, 2023Inventors: CHWEN YU, EN TIAN LIN, CHI WEN KUO
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Patent number: 11592748Abstract: A multi-spray RRC process with dynamic control to improve final yield and further reduce resist cost is disclosed. In one embodiment, a method, includes: dispensing a first layer of solvent on a semiconductor substrate while spinning at a first speed for a first time period; dispensing the solvent on the semiconductor substrate while spinning at a second speed for a second time period so as to transform the first layer to a second layer of the solvent; dispensing the solvent on the semiconductor substrate while spinning at a third speed for a third time period so as to transform the second layer to a third layer of the solvent; dispensing the solvent on the semiconductor substrate while spinning at a fourth speed for a fourth time period so as to transform the third layer to a fourth layer of the solvent; and dispensing a first layer of photoresist on the fourth layer of the solvent while spinning at a fifth speed for a fifth period of time.Type: GrantFiled: November 14, 2019Date of Patent: February 28, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ming-Hsuan Chuang, Po-Sheng Lu, Shou-Wen Kuo, Cheng-Yi Huang, Chia-Hung Chu
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Patent number: 11593318Abstract: Asynchronous snapshot invalidation techniques are described. According to various such techniques, an enhanced file handle structure may be defined that includes a snapshot generation ID that is to comprise a value that singularly identifies a snapshot performed at a particular point in time. In some embodiments, when a snapshot ID assigned to that snapshot is reused at a subsequent point in time, a different snapshot generation ID may be assigned to that subsequent snapshot. With respect to an in-core cache, the differing snapshot generation IDs may eliminate unacceptable ambiguity regarding respective file information sets corresponding to the initial and subsequent snapshots sharing the same snapshot ID. As a result, obsolete file information sets may be cleared from the in-core cache asynchronously, enabling improved performance. The embodiments are not limited in this context.Type: GrantFiled: November 22, 2020Date of Patent: February 28, 2023Assignee: NetApp, Inc.Inventors: Mardiros Z. Chakalian, Amber Palekar, Szu-Wen Kuo, Stephen Wu
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Patent number: 11545382Abstract: The present disclosure, in some embodiments, relates to an integrated chip processing tool. The integrated chip processing tool includes a first transfer module and a second transfer module. The first transfer module has a first robotic arm disposed within a housing. The first transfer module is configured to receive a single and unitary first die tray configured to hold a plurality of integrated chip (IC) die and to concurrently transfer all of the plurality of IC die held by the single and unitary first die tray to a single and unitary die boat. The second transfer module has an additional robotic arm disposed within the housing and configured to concurrently transfer all of the plurality of IC die from the single and unitary die boat to a single and unitary second die tray.Type: GrantFiled: April 21, 2020Date of Patent: January 3, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Pin-Yi Hsin, Shou-Wen Kuo, Patrick Lin
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Publication number: 20220415699Abstract: Disclosed is a vacuum chuck and a method for securing a warped semiconductor substrate during a semiconductor manufacturing process so as to improve its flatness during a semiconductor manufacturing process. For example, a semiconductor manufacturing system includes: a vacuum chuck configured to hold a substrate, wherein the vacuum chuck comprises, a plurality of vacuum grooves located on a top surface of the vacuum chuck, wherein the top surface is configured to face the substrate; and a plurality of flexible seal rings disposed on the vacuum chuck and extending outwardly from the top surface, wherein the plurality of flexible seal rings are configured to directly contact a bottom surface of the substrate and in adjacent to the plurality of vacuum grooves so as to form a vacuum seal between the substrate and the vacuum chuck, and wherein each of the plurality of flexible seal rings has a zigzag cross section.Type: ApplicationFiled: August 8, 2022Publication date: December 29, 2022Inventors: Chien-Fa LEE, Chin-Lin CHOU, Shang-Ying TSAI, Shou-Wen KUO, Kuei-Sung CHANG, Jiun-Rong PAI, Hsu-Shui LIU, Chun-Wen CHENG
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Publication number: 20220400879Abstract: A sippy cup has a body defining an interior beverage space and having a top opening. A lid removably covers the top opening of the body and includes a drinking member having a drink opening. A straw assembly includes flexible tubing having a proximal end attached to the drink opening and a distal end having a weight positioned thereon. The drinking member is accessible by a user for drinking with the drink opening of the drinking member in fluid communication with the interior beverage space of the body through the flexible tubing.Type: ApplicationFiled: June 14, 2022Publication date: December 22, 2022Inventor: Linda Ai-Wen Kuo