Patents by Inventor Wen-Shiang Liao
Wen-Shiang Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11978697Abstract: A package structure including a first radio frequency die, a second radio frequency die, an insulating encapsulant, a redistribution circuit structure, a first oscillation cavity and a second oscillation cavity is provided. A first frequency range of the first radio frequency die is different from a second frequency range of the second radio frequency die. The insulating encapsulant laterally encapsulates the first radio frequency die and the second radio frequency die. The redistribution circuit structure is disposed on the first radio frequency die, the second die and the insulating encapsulant. The first oscillation cavity is electrically connected to the first radio frequency die, and the second oscillation cavity is electrically connected to the second radio frequency die.Type: GrantFiled: January 14, 2022Date of Patent: May 7, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Wen-Shiang Liao
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Publication number: 20240128196Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a first conductive layer formed on the substrate, a chip disposed on the substrate, a first dielectric layer surrounding the chip, a second conductive layer disposed on the first dielectric layer and electrically insulated from the first conductive layer, a plurality of first vias formed in the first dielectric layer and electrically connected to the first conductive layer, and a plurality of second vias formed in the first dielectric layer and electrically connected to the second conductive layer. The first vias are arranged in a first direction. The second vias are arranged in the first direction, and the first vias and the second vias are arranged in a staggered fashion in a second direction, which is different from the first direction.Type: ApplicationFiled: January 5, 2023Publication date: April 18, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Wen-Shiang LIAO
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Patent number: 11961809Abstract: A package structure includes a first die, a second die over and electrically connected to the first die, an insulating material around the second die, a first antenna extending through the insulating material and electrically connected to the second die, the first antenna being adjacent to a first sidewall of the second die, wherein the first antenna includes a first conductive plate extending through the insulating material, and a plurality of first conductive pillars extending through the insulating material, wherein the first conductive plate is between the plurality of first conductive pillars and the first sidewall of the second die.Type: GrantFiled: May 7, 2021Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Feng-Wei Kuo, Wen-Shiang Liao
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Patent number: 11953723Abstract: A thermally tunable waveguide including an optical waveguide and a heater is provided. The optical waveguide includes a phase shifter. The heater is disposed over the optical waveguide. The heater includes a heating portion, pad portions and tapered portions. The heating portion overlaps with the phase shifter of the optical waveguide. The pad portions are disposed aside of the heating portion. Each of the pad portions is connected to the heating portion through one of the tapered portions respectively.Type: GrantFiled: January 11, 2022Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Feng-Wei Kuo, Wen-Shiang Liao
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Patent number: 11953730Abstract: A semiconductor structure including a semiconductor substrate, a first patterned dielectric layer, a grating coupler and a waveguide is provided. The semiconductor substrate includes an optical reflective layer. The first patterned dielectric layer is disposed on the semiconductor substrate and covers a portion of the optical reflective layer. The grating coupler and the waveguide are disposed on the first patterned dielectric layer, wherein the grating coupler and the waveguide are located over the optical reflective layer.Type: GrantFiled: July 11, 2022Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Feng-Wei Kuo, Wen-Shiang Liao
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Patent number: 11928413Abstract: A method and system for generating a physical layout for a grating coupler integrated in a photonically-enabled circuit are disclosed herein. In some embodiments, the method receives a parametrized wavelength, a parametrized first refractive index, a parametrized second refractive index, a parametrized taper length, a parametrized width, a parametrized grating length, and a parametrized incident angle of the optical beam incident onto the grating coupler and generates a physical layout for the grating coupler based on the received parametrized inputs, the generating of the physical layout is according to a predefined model, and outputs the physical layout of the grating coupler for manufacturing under a semiconductor fabrication process.Type: GrantFiled: January 29, 2021Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Feng-Wei Kuo, Wen-Shiang Liao
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Publication number: 20240072443Abstract: Embodiments provide an integrated package device and method of forming the same, the device having dual band functionality by way of a first antenna and a second antenna. The first antenna can transmit/receive high frequency radio frequency (RF) signals and the second antenna can transmit/receive lower frequency RF signals. A high-k dielectric zone is provided aligned to the first antenna. An oscillation region may be aligned to the embedded antenna(s).Type: ApplicationFiled: January 9, 2023Publication date: February 29, 2024Inventor: Wen-Shiang Liao
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Publication number: 20240072442Abstract: Embodiments provide an integrated package device and method of forming the same, the device including a receive transmit integrated circuit die and embedded antenna. An oscillation region is aligned to the embedded antenna and a cavity is provided in the substrate to allow the passage of radio frequency (RF) signals into and out of the oscillation region.Type: ApplicationFiled: August 25, 2022Publication date: February 29, 2024Inventor: Wen-Shiang Liao
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Patent number: 11908788Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a polymer base layer, a backside redistribution layer (RDL) over the polymer base layer; a molding layer over the backside RDL; a polymer layer over the molding layer; a front side RDL over the polymer layer; and a metal-insulator-metal (MIM) capacitor vertically passing through the molding layer, the MIM capacitor including a first electrode, an insulation layer and a second electrode, wherein the insulation layer surrounds the first electrode, and the second electrode surrounds the insulation layer, and the molding layer surrounds the second electrode. An associated method for manufacturing a semiconductor structure is also disclosed.Type: GrantFiled: June 17, 2021Date of Patent: February 20, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Wen-Shiang Liao, Chewn-Pu Jou
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Publication number: 20240021972Abstract: A package structure includes a first die, an insulating material around the first die, a first antenna extending through the insulating material, wherein the first antenna includes a first conductive plate extending through the insulating material and a plurality of first conductive pillars extending through the insulating material, wherein the first conductive plate is disposed between the plurality of first conductive pillars and the first die, and a first high-k block embedded in the insulating material, wherein the first high-k block is disposed between the first conductive plate and the plurality of first conductive pillars, and wherein the first high-k block comprises a material having a dielectric constant that is different than a dielectric constant of the insulating material.Type: ApplicationFiled: July 14, 2022Publication date: January 18, 2024Inventor: Wen-Shiang Liao
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Publication number: 20240021537Abstract: A package structure includes a first redistribution structure, an insulating material over the first redistribution structure, a die embedded in the insulating material, a second redistribution structure over the die and the insulating material, and a first via extending through the insulating material, wherein the first via includes a first inner conductive core, and a first outer conductive shielding layer, wherein the insulating material is disposed between the first inner conductive core and the first outer conductive shielding layer, and wherein the first outer conductive shielding layer has an annular shape in a top-down view.Type: ApplicationFiled: July 14, 2022Publication date: January 18, 2024Inventor: Wen-Shiang Liao
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Publication number: 20230408769Abstract: A semiconductor device includes a silicon substrate having a first region and a second region. The semiconductor device includes a silicon lens formed in the first region and along a surface of the silicon substrate on a first side of the silicon substrate. The semiconductor device includes a photonic die disposed in the first region and on a second side of the silicon substrate, the second side being opposite to the first side. The semiconductor device includes a waveguide disposed on the second side of the silicon substrate and having a grating coupler.Type: ApplicationFiled: May 24, 2022Publication date: December 21, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Feng-Wei Kuo, Wen-Shiang Liao
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Publication number: 20230411442Abstract: A package includes a first redistribution structure, a die disposed over the first redistribution structure, a molding material surrounding the die, a second redistribution structure over the die and the molding material, and an inductor includes a permalloy core. The permalloy core is embedded in the molding material, and the permalloy core includes vertically stacked alternating layers. The vertically stacked alternating layers includes epoxy layers, and permalloy layers, where each of the permalloy layers is disposed between two epoxy layers of the epoxy layers.Type: ApplicationFiled: June 20, 2022Publication date: December 21, 2023Inventor: Wen-Shiang Liao
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Publication number: 20230395535Abstract: A method of forming a semiconductor structure includes forming a photoresist over a first conductive pattern. The method further includes patterning the photoresist to define a plurality of first openings. The method further includes depositing a conductive material in each of the plurality of first openings. The method further includes disposing a molding material over the first conductive pattern, wherein the molding material surrounds a die. The method further includes removing a portion of the molding material to form a second opening. The method further includes disposing a dielectric material into the opening to form a dielectric member. The method further includes forming a redistribution structure over the molding material and the dielectric member, wherein the redistribution structure includes an antenna structure over the dielectric member and electrically connected to the die.Type: ApplicationFiled: July 24, 2023Publication date: December 7, 2023Inventors: Feng-Wei KUO, Wen-Shiang LIAO
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Publication number: 20230387049Abstract: A package structure includes a first die, a second die over and electrically connected to the first die, an insulating material around the second die, a first antenna extending through the insulating material and electrically connected to the second die, the first antenna being adjacent to a first sidewall of the second die, wherein the first antenna includes a first conductive plate extending through the insulating material, and a plurality of first conductive pillars extending through the insulating material, wherein the first conductive plate is between the plurality of first conductive pillars and the first sidewall of the second die.Type: ApplicationFiled: August 7, 2023Publication date: November 30, 2023Inventors: Feng-Wei Kuo, Wen-Shiang Liao
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Publication number: 20230384525Abstract: A semiconductor structure including a semiconductor substrate, a first patterned dielectric layer, a grating coupler and a waveguide is provided. The semiconductor substrate includes an optical reflective layer. The first patterned dielectric layer is disposed on the semiconductor substrate and covers a portion of the optical reflective layer. The grating coupler and the waveguide are disposed on the first patterned dielectric layer, wherein the grating coupler and the waveguide are located over the optical reflective layer.Type: ApplicationFiled: August 1, 2023Publication date: November 30, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Feng-Wei KUO, Wen-Shiang Liao
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Publication number: 20230378636Abstract: This application relates to a device for signal transmission (e.g., radio frequency transmission) and a method for forming the device. For example, the method includes: depositing an insulating layer that includes polybenzobisoxazole (PBO) on a carrier; forming a backside layer including polyimide (PI) over the adhesive layer; forming a die-attach film (DAF) over the backside layer; forming one or more through-insulator via (TIV)-wall structures and one or more TIV-grating structures on the second backside layer; placing a die, such as a radio frequency (RF) integrated circuit (IC) die, on the DAF; encapsulating the die, the one or more TIV-wall structures, and the one or more TIV-grating structures, with a molding compound to form an antenna package including one or more antenna regions; and forming a redistribution layer (RDL) structure on the encapsulated package. The RDL structure can include one or more antenna structures coupled to the die.Type: ApplicationFiled: July 31, 2023Publication date: November 23, 2023Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Feng-Wei KUO, Wen-Shiang Liao
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Patent number: 11824021Abstract: A method of manufacturing the semiconductor structure includes: providing a substrate; forming a first conductive via and a second conductive via extending in the substrate; depositing a first dielectric layer over the substrate and the first and second conductive vias; receiving a waveguide; moving the waveguide to a location over the first dielectric layer and aligning the waveguide with a position of the first dielectric layer; attaching the waveguide to the position of the first dielectric layer; forming a first conductive member and a second conductive member over the waveguide, the first conductive member and the second conductive member being in contact with the waveguide; and etching a backside of the substrate to electrically expose the first and second conductive vias. The first conductive member or the second conductive member is electrically connected to the first or second conductive via.Type: GrantFiled: November 17, 2022Date of Patent: November 21, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Huan-Neng Chen, Wen-Shiang Liao
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Publication number: 20230341624Abstract: An integrated optical device includes a substrate, a waveguide structure and a grating structure. The substrate has a waveguide region and a grating region adjacent to each other. The waveguide structure is disposed on the substrate in the waveguide region. The grating structure is disposed on the substrate in the grating region. In some embodiments, the grating structure includes grating bars and grating intervals arranged alternately, and widths of the grating bars of the grating structure are varied.Type: ApplicationFiled: April 21, 2022Publication date: October 26, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Feng-Wei Kuo, Wen-Shiang Liao
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Publication number: 20230335884Abstract: A semiconductor package includes a semiconductor die, an encapsulation layer and at least one antenna structure. The encapsulation layer laterally encapsulates the semiconductor die. The at least one antenna structure is embedded in the encapsulation layer aside the semiconductor die. The at least one antenna structure includes a dielectric bulk, and a dielectric constant of the dielectric bulk is higher than a dielectric constant of the encapsulation layer.Type: ApplicationFiled: June 18, 2023Publication date: October 19, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Wen-Shiang Liao