Abstract: A package structure and a formation method of a package structure are provided. The method includes surrounding a semiconductor chip with a protective layer. The protective layer has a first dielectric constant. The method also includes partially removing the protective layer to form an opening. The method further includes forming a dielectric structure partially or completely filling the opening. The dielectric structure has a second dielectric constant, and the second dielectric constant is higher than the first dielectric constant. The method further includes forming a redistribution structure over the semiconductor chip, the protective layer, and the dielectric structure.

Abstract: An optical attenuating structure is provided. The optical attenuating structure includes a substrate, a waveguide, doping regions, an optical attenuating member, and a dielectric layer. The waveguide is extended over the substrate. The doping regions are disposed over the substrate, and include a first doping region, a second doping region opposite to the first doping region and separated from the first doping region by the waveguide, a first electrode extended over the substrate and in the first doping region, and a second electrode extended over the substrate and in the second doping region. The first optical attenuating member is coupled with the waveguide and disposed between the waveguide and the first electrode. The dielectric layer is disposed over the substrate and covers the waveguide, the doping regions and the first optical attenuating member.

Abstract: A semiconductor package includes a first semiconductor device, a second semiconductor device vertically positioned above the first semiconductor device, and a ground shielded transmission path. The ground shielded transmission path couples the first semiconductor device to the second semiconductor device. The ground shielded transmission path includes a first signal path extending longitudinally between a first end and a second end. The first signal path includes a conductive material. A first insulating layer is disposed over the signal path longitudinally between the first end and the second end. The first insulating layer includes an electrically insulating material. A ground shielding layer is disposed over the insulating material longitudinally between the first end and the second end of the signal path. The ground shielding layer includes a conductive material coupled to ground.

Abstract: Disclosed are apparatuses for optical coupling and a system for communication. In one embodiment, an apparatus for optical coupling including a substrate and a grating coupler is disclosed. The grating coupler is disposed on the substrate and includes a plurality of coupling gratings arranged along a first direction, wherein effective refractive indices of the plurality of coupling gratings gradually decrease along the first direction.

Abstract: An integrated optical device includes a substrate, a waveguide structure and a grating structure. The substrate has a waveguide region and a grating region adjacent to each other. The waveguide structure is disposed on the substrate in the waveguide region. The grating structure is disposed on the substrate in the grating region. In some embodiments, the grating structure includes grating bars and grating intervals arranged alternately, and widths of the grating bars of the grating structure are varied.

Abstract: Systems and methods are provided for an integrated chip. An integrated chip includes a package substrate including a plurality of first layers and a plurality of second layers, each second layer being disposed between a respective adjacent pair of the first layers. A transceiver unit is disposed above the package substrate. A waveguide unit including a plurality of waveguides having top and bottom walls formed in the first layers of the package substrate and sidewalls formed in the second layers of the package substrate.

Abstract: A semiconductor device includes a method of manufacturing a semiconductor device. The method includes forming an interconnect structure. In some embodiments, the forming of the interconnect structure includes forming a first patterned layer over a substrate, attaching a die attach film (DAF) to a permalloy device and transporting the permalloy device to the first patterned layer through a pick and place operation, forming a second patterned layer in the same tier as the permalloy device, and bonding a semiconductor die to the interconnect structure. In some embodiments, the second patterned layer is aligned with the first patterned layer, forming a third patterned layer over the second patterned layer and the permalloy device. In some embodiments, the first patterned layer, the second patterned layer and the third patterned layer collectively form a coil winding around the permalloy device.

Abstract: A package structure including a first radio frequency die, a second radio frequency die, an insulating encapsulant, a redistribution circuit structure, a first oscillation cavity and a second oscillation cavity is provided. A first frequency range of the first radio frequency die is different from a second frequency range of the second radio frequency die. The insulating encapsulant laterally encapsulates the first radio frequency die and the second radio frequency die. The redistribution circuit structure is disposed on the first radio frequency die, the second die and the insulating encapsulant. The first oscillation cavity is electrically connected to the first radio frequency die, and the second oscillation cavity is electrically connected to the second radio frequency die.

Abstract: A method and system for generating a physical layout for a grating coupler integrated in a photonically-enabled circuit are disclosed herein. In some embodiments, the method receives a parametrized wavelength, a parametrized first refractive index, a parametrized second refractive index, a parametrized taper length, a parametrized width, a parametrized grating length, and a parametrized incident angle of the optical beam incident onto the grating coupler and generates a physical layout for the grating coupler based on the received parametrized inputs, the generating of the physical layout is according to a predefined model, and outputs the physical layout of the grating coupler for manufacturing under a semiconductor fabrication process.

Abstract: A method of forming a semiconductor structure includes forming a first redistribution structure including a first conductive pattern. The method further includes placing a die over the first redistribution structure. The method further includes disposing a molding material over the first redistribution structure to surround the die. The method further includes removing a portion of the molding material to form an opening. The method further includes disposing a dielectric material into the opening to form a dielectric member. The method further includes forming a second redistribution structure over the molding material and the dielectric member, wherein the second redistribution structure includes an antenna structure over the dielectric member and electrically connected to the die.

Abstract: A thermally tunable waveguide including an optical waveguide and a heater is provided. The optical waveguide includes a phase shifter. The heater is disposed over the optical waveguide. The heater includes a heating portion, pad portions and tapered portions. The heating portion overlaps with the phase shifter of the optical waveguide. The pad portions are disposed aside of the heating portion. Each of the pad portions is connected to the heating portion through one of the tapered portions respectively.

Abstract: A package structure and a formation method are provided. The method includes bonding a first memory-containing chip structure to a second memory-containing chip structure through dielectric-to-dielectric bonding and metal-to-metal bonding. The method also includes bonding a logic control chip structure to the second memory-containing chip structure through dielectric-to-dielectric bonding and metal-to-metal bonding. The logic control chip structure is formed using a more advanced technology node than the second memory-containing chip structure.

Abstract: A semiconductor package and a manufacturing method thereof are provided. A die stack in the semiconductor package includes a photonic die and an electronic die stacked on the photonic die by a face-to-face manner. A convex lens is disposed at a back surface of the electronic die, and is formed in an oval shape, such that optical beams can be collimated to have circular beam shape, as passing through the convex lens. In some embodiments, the semiconductor package includes more of the die stacks, and includes an interposer lying below the die stacks. In these embodiments, tilted reflectors are formed in the photonic dies and the interposer, to set up vertical optical paths between the interposer and the photonic dies, and lateral optical paths in the interposer. In this way, optical communication between the photonic dies can be established.

Abstract: A package includes first and second redistribution structures, a die, a permalloy structure, a molding material and a plurality of through vias. The first redistribution structure includes a first metal pattern. The die is disposed over the first redistribution structure. The molding material is disposed over the first redistribution structure and surrounds the die and the permalloy structure. The second redistribution structure is disposed over the die, the permalloy structure and the molding material, and includes a second metal pattern. The through vias penetrate the molding material and connects the first metal pattern to the second metal pattern. The permalloy structure includes a first member and a second member isolated from the first member, the first member and the second member are surrounded by the plurality of through vias and sandwiched between the first metal pattern and the second metal pattern. A method for forming a package is also provided.

Abstract: Semiconductor dies in a semiconductor die package may communicate through a dielectric waveguide. The dielectric waveguide may include a high dielectric constant (high-k) core layer that is sandwiched by low dielectric constant (low-k) cladding layers. The difference in dielectric constants of the high-k core layer and the low-k cladding layers enables loose coupling of electromagnetic signal modes in the dielectric waveguide while providing a relatively low critical angle for achieving total internal reflections in the high-k core layer. Thus, the combination of semiconductor die package techniques described herein and the dielectric waveguide described herein may enable increased inter-die communication bandwidth while achieving a reduced footprint and increased density for semiconductor die packages.

Abstract: A package structure including a first radio frequency die, a second radio frequency die, an insulating encapsulant, a redistribution circuit structure, a first oscillation cavity and a second oscillation cavity is provided. A first frequency range of the first radio frequency die is different from a second frequency range of the second radio frequency die. The insulating encapsulant laterally encapsulates the first radio frequency die and the second radio frequency die. The redistribution circuit structure is disposed on the first radio frequency die, the second die and the insulating encapsulant. The first oscillation cavity is electrically connected to the first radio frequency die, and the second oscillation cavity is electrically connected to the second radio frequency die.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a first conductive layer formed on the substrate, a chip disposed on the substrate, a first dielectric layer surrounding the chip, a second conductive layer disposed on the first dielectric layer and electrically insulated from the first conductive layer, a plurality of first vias formed in the first dielectric layer and electrically connected to the first conductive layer, and a plurality of second vias formed in the first dielectric layer and electrically connected to the second conductive layer. The first vias are arranged in a first direction. The second vias are arranged in the first direction, and the first vias and the second vias are arranged in a staggered fashion in a second direction, which is different from the first direction.

Abstract: A package structure includes a first die, a second die over and electrically connected to the first die, an insulating material around the second die, a first antenna extending through the insulating material and electrically connected to the second die, the first antenna being adjacent to a first sidewall of the second die, wherein the first antenna includes a first conductive plate extending through the insulating material, and a plurality of first conductive pillars extending through the insulating material, wherein the first conductive plate is between the plurality of first conductive pillars and the first sidewall of the second die.

Abstract: A semiconductor structure including a semiconductor substrate, a first patterned dielectric layer, a grating coupler and a waveguide is provided. The semiconductor substrate includes an optical reflective layer. The first patterned dielectric layer is disposed on the semiconductor substrate and covers a portion of the optical reflective layer. The grating coupler and the waveguide are disposed on the first patterned dielectric layer, wherein the grating coupler and the waveguide are located over the optical reflective layer.

Abstract: A thermally tunable waveguide including an optical waveguide and a heater is provided. The optical waveguide includes a phase shifter. The heater is disposed over the optical waveguide. The heater includes a heating portion, pad portions and tapered portions. The heating portion overlaps with the phase shifter of the optical waveguide. The pad portions are disposed aside of the heating portion. Each of the pad portions is connected to the heating portion through one of the tapered portions respectively.