Patents by Inventor Wen-Shiang Liao

Wen-Shiang Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220328952
    Abstract: A semiconductor structure includes an antenna pad, a ground plane and a plurality of conductive vias. The ground plane is disposed over the antenna pad and includes a plurality of first conductive patterns separated from one another. The conductive vias are disposed between the antenna pad and the ground plane. The plurality of conductive vias are arranged to surround an area of the antenna pad and electrically connected to the antenna pad, and the plurality of first conductive patterns are overlapped with the area of the antenna pad.
    Type: Application
    Filed: June 28, 2021
    Publication date: October 13, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Wen-Shiang Liao
  • Publication number: 20220320022
    Abstract: A method of forming a semiconductor structure includes forming a first redistribution structure including a first conductive pattern. The method further includes placing a die over the first redistribution structure. The method further includes disposing a molding material over the first redistribution structure to surround the die. The method further includes removing a portion of the molding material to form an opening. The method further includes disposing a dielectric material into the opening to form a dielectric member. The method further includes forming a second redistribution structure over the molding material and the dielectric member, wherein the second redistribution structure includes an antenna structure over the dielectric member and electrically connected to the die.
    Type: Application
    Filed: June 22, 2022
    Publication date: October 6, 2022
    Inventors: Feng-Wei KUO, Wen-Shiang LIAO
  • Publication number: 20220301994
    Abstract: The present disclosure is directed to a method for forming metal insulator metal decoupling capacitors with scalable capacitance. The method can include forming a first redistribution layer with metal lines on a portion of a polymer layer, depositing a photoresist layer on the first redistribution layer, and etching the photoresist layer to form spaced apart first and second TIV openings in the photoresist layer, where the first TIV opening is wider than the second TIV opening. The method can further include depositing a metal in the first and second TIV openings to form respective first and second TIV structures in contact with the metal line, removing the photoresist layer, forming a high-k dielectric on a top surface of the first and second TIV structures, and depositing a metal layer on the high-k dielectric layer to form respective first and second capacitors.
    Type: Application
    Filed: June 10, 2022
    Publication date: September 22, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Feng-Wei Kuo, Wen-Shiang Liao
  • Patent number: 11450595
    Abstract: A semiconductor device includes a semiconductor substrate, an interconnect structure, and a permalloy device. The interconnect structure is disposed over the semiconductor substrate. The interconnect structure includes a conductive coil. The conductive coil includes horizontally-extending metal lines, and vertically-extending vias electrically connecting the metal lines. The permalloy device is disposed in the interconnector structure and wound around by the conductive coil and insulated by the conductive coil, wherein the permalloy device and the conductive coil in combination define an inductor, and the permalloy device serves as a magnetic core of the inductor.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: September 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ying-Chih Hsu, Wen-Shiang Liao
  • Patent number: 11442296
    Abstract: An optical attenuating structure is provided. The optical attenuating structure includes a substrate, a waveguide, doping regions, an optical attenuating member, and a dielectric layer. The waveguide is extended over the substrate. The doping regions are disposed over the substrate, and include a first doping region, a second doping region opposite to the first doping region and separated from the first doping region by the waveguide, a first electrode extended over the substrate and in the first doping region, and a second electrode extended over the substrate and in the second doping region. The first optical attenuating member is coupled with the waveguide and disposed between the waveguide and the first electrode. The dielectric layer is disposed over the substrate and covers the waveguide, the doping regions and the first optical attenuating member.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: September 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Huan-Neng Chen, Feng-Wei Kuo, Min-Hsiang Hsu, Lan-Chou Cho, Chewn-Pu Jou, Wen-Shiang Liao
  • Publication number: 20220278058
    Abstract: A package structure includes a first die, a second die over and electrically connected to the first die, an insulating material around the second die, a first antenna extending through the insulating material and electrically connected to the second die, the first antenna being adjacent to a first sidewall of the second die, wherein the first antenna includes a first conductive plate extending through the insulating material, and a plurality of first conductive pillars extending through the insulating material, wherein the first conductive plate is between the plurality of first conductive pillars and the first sidewall of the second die.
    Type: Application
    Filed: May 7, 2021
    Publication date: September 1, 2022
    Inventors: Feng-Wei Kuo, Wen-Shiang Liao
  • Patent number: 11428870
    Abstract: A semiconductor structure including a semiconductor substrate, a first patterned dielectric layer, a grating coupler and a waveguide is provided. The semiconductor substrate includes an optical reflective layer. The first patterned dielectric layer is disposed on the semiconductor substrate and covers a portion of the optical reflective layer. The grating coupler and the waveguide are disposed on the first patterned dielectric layer, wherein the grating coupler and the waveguide are located over the optical reflective layer.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: August 30, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Feng-Wei Kuo, Wen-Shiang Liao
  • Publication number: 20220271414
    Abstract: A semiconductor package includes a semiconductor die, an encapsulation layer and at least one antenna structure. The encapsulation layer laterally encapsulates the semiconductor die. The at least one antenna structure is embedded in the encapsulation layer aside the semiconductor die. The at least one antenna structure includes a dielectric bulk, and a dielectric constant of the dielectric bulk is higher than a dielectric constant of the encapsulation layer.
    Type: Application
    Filed: February 25, 2021
    Publication date: August 25, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Wen-Shiang Liao
  • Patent number: 11417594
    Abstract: A three-Dimensional Integrated Circuit (3DIC) Chip on Wafer on Substrate (CoWoS) packaging structure or system includes a silicon oxide interposer with no metal ingredients, and with electrically conductive TVs and RDLs. The silicon oxide interposer has a first surface and a second surface opposite to the first surface. The electrically conductive TVs penetrate through the silicon oxide interposer. The electrically interconnected RDLs are disposed over the first surface of the silicon oxide interposer, and are electrically coupled or connected to a number of the conductive TVs.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: August 16, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Wen-Shiang Liao
  • Publication number: 20220245321
    Abstract: A method and system for generating a physical layout for a grating coupler integrated in a photonically-enabled circuit are disclosed herein. In some embodiments, the method receives a parametrized wavelength, a parametrized first refractive index, a parametrized second refractive index, a parametrized taper length, a parametrized width, a parametrized grating length, and a parametrized incident angle of the optical beam incident onto the grating coupler and generates a physical layout for the grating coupler based on the received parametrized inputs, the generating of the physical layout is according to a predefined model, and outputs the physical layout of the grating coupler for manufacturing under a semiconductor fabrication process.
    Type: Application
    Filed: January 29, 2021
    Publication date: August 4, 2022
    Inventors: Feng-Wei KUO, Wen-Shiang LIAO
  • Patent number: 11380632
    Abstract: A semiconductor device includes a semiconductor substrate and an interconnect structure over the semiconductor substrate. The interconnect structure includes a magnetic core and a conductive coil winding around the magnetic core and electrically insulated from the magnetic core. The conductive coil includes horizontally-extending conductive lines and vertically-extending conductive vias electrically connecting the conductive lines.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: July 5, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wen-Shiang Liao, Huan-Neng Chen
  • Patent number: 11362026
    Abstract: The present disclosure is directed to a method for forming metal insulator metal decoupling capacitors with scalable capacitance. The method can include forming a first redistribution layer with metal lines on a portion of a polymer layer, depositing a photoresist layer on the first redistribution layer, and etching the photoresist layer to form spaced apart first and second TIV openings in the photoresist layer, where the first TIV opening is wider than the second TIV opening. The method can further include depositing a metal in the first and second TIV openings to form respective first and second TIV structures in contact with the metal line, removing the photoresist layer, forming a high-k dielectric on a top surface of the first and second TIV structures, and depositing a metal layer on the high-k dielectric layer to form respective first and second capacitors.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: June 14, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Feng-Wei Kuo, Wen-Shiang Liao
  • Publication number: 20220113473
    Abstract: Disclosed are apparatuses for optical coupling and a system for communication. In one embodiment, an apparatus for optical coupling including a substrate and a grating coupler is disclosed. The grating coupler is disposed on the substrate and includes a plurality of coupling gratings arranged along a first direction, wherein effective refractive indices of the plurality of coupling gratings gradually decrease along the first direction.
    Type: Application
    Filed: October 14, 2020
    Publication date: April 14, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Feng-Wei Kuo, Wen-Shiang Liao, Robert Bogdan Staszewski, Jianglin Du
  • Patent number: 11295979
    Abstract: A method of manufacturing a semiconductor device includes: coupling a semiconductor die to a protection layer; forming a first redistribution layer over the semiconductor die, wherein the first redistribution layer includes a first conductive plate of an antenna structure and a first dielectric layer laterally surrounding the first conductive plate; etching the first dielectric layer to form a recess exposing the first conductive plate; filling the recess with a second dielectric material to form an insulating film; and forming a second redistribution layer including a second conductive plate of the antenna structure over the insulating film. The insulating film electrically isolates the first conductive plate from the second conductive plate, wherein one of the first conductive plate and the second conductive plate is configured to radiate or receive electromagnetic wave. The insulating film has a thickness associated with a main resonance frequency of the antenna structure.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: April 5, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wen-Shiang Liao, Feng Wei Kuo, Chih-Hang Tung, Chen-Hua Yu
  • Publication number: 20220019097
    Abstract: An optical attenuating structure is provided. The optical attenuating structure includes a substrate, a waveguide, doping regions, an optical attenuating member, and a dielectric layer. The waveguide is extended over the substrate. The doping regions are disposed over the substrate, and include a first doping region, a second doping region opposite to the first doping region and separated from the first doping region by the waveguide, a first electrode extended over the substrate and in the first doping region, and a second electrode extended over the substrate and in the second doping region. The first optical attenuating member is coupled with the waveguide and disposed between the waveguide and the first electrode. The dielectric layer is disposed over the substrate and covers the waveguide, the doping regions and the first optical attenuating member.
    Type: Application
    Filed: July 20, 2020
    Publication date: January 20, 2022
    Inventors: HUAN-NENG CHEN, FENG-WEI KUO, MIN-HSIANG HSU, LAN-CHOU CHO, CHEWN-PU JOU, WEN-SHIANG LIAO
  • Publication number: 20210389526
    Abstract: A semiconductor structure including a semiconductor substrate, a first patterned dielectric layer, a grating coupler and a waveguide is provided. The semiconductor substrate includes an optical reflective layer. The first patterned dielectric layer is disposed on the semiconductor substrate and covers a portion of the optical reflective layer. The grating coupler and the waveguide are disposed on the first patterned dielectric layer, wherein the grating coupler and the waveguide are located over the optical reflective layer.
    Type: Application
    Filed: June 15, 2020
    Publication date: December 16, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Feng-Wei Kuo, Wen-Shiang Liao
  • Publication number: 20210367324
    Abstract: This application relates to a device for signal transmission (e.g., radio frequency transmission) and a method for forming the device. For example, the method includes: depositing an insulating layer that includes polybenzobisoxazole (PBO) on a carrier; forming a backside layer including polyimide (PI) over the adhesive layer; forming a die-attach film (DAF) over the backside layer; forming one or more through-insulator via (TIV)-wall structures and one or more TIV-grating structures on the second backside layer; placing a die, such as a radio frequency (RF) integrated circuit (IC) die, on the DAF; encapsulating the die, the one or more TIV-wall structures, and the one or more TIV-grating structures, with a molding compound to form an antenna package including one or more antenna regions; and forming a redistribution layer (RDL) structure on the encapsulated package. The RDL structure can include one or more antenna structures coupled to the die.
    Type: Application
    Filed: August 3, 2021
    Publication date: November 25, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Feng-Wei Kuo, Wen-Shiang Liao
  • Publication number: 20210327833
    Abstract: A semiconductor structure includes a first redistribution structure, wherein the first redistribution structure includes first conductive pattern. The semiconductor structure further includes a die over the first redistribution structure. The semiconductor structure further includes a molding over the first redistribution structure, wherein the molding surrounds the die, and the molding has a first dielectric constant. The semiconductor structure further includes a dielectric member extending through the molding, wherein the dielectric member has a second dielectric constant different from the first dielectric constant. The semiconductor structure further includes a second redistribution structure over the die, the dielectric member and the molding, wherein the second redistribution layer includes an antenna over the dielectric member, and the antenna is electrically connected to the die.
    Type: Application
    Filed: December 10, 2020
    Publication date: October 21, 2021
    Inventors: Feng-Wei KUO, Wen-Shiang LIAO
  • Publication number: 20210313261
    Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a polymer base layer, a backside redistribution layer (RDL) over the polymer base layer; a molding layer over the backside RDL; a polymer layer over the molding layer, a front side RDL over the polymer layer; and a metal-insulator-metal (MIM) capacitor vertically passing through the molding layer, the MIM capacitor including a first electrode, an insulation layer and a second electrode, wherein the insulation layer surrounds the first electrode, and the second electrode surrounds the insulation layer, and the molding layer surrounds the second electrode. An associated method for manufacturing a semiconductor structure is also disclosed.
    Type: Application
    Filed: June 17, 2021
    Publication date: October 7, 2021
    Inventors: WEN-SHIANG LIAO, CHEWN-PU JOU
  • Patent number: 11119280
    Abstract: Disclosed are grating couplers having a high coupling efficiency for optical communications. In one embodiment, an apparatus for optical coupling is disclosed. The apparatus includes: a substrate; a grating coupler comprising a plurality of coupling gratings over the substrate, wherein each of the plurality of coupling gratings extends in a first lateral direction and has a cross-section having a middle-raised shape in a second lateral direction, wherein the first and second lateral directions are parallel to a surface of the substrate and perpendicular to each other in a grating plane; and a cladding layer comprising an optical medium, wherein the cladding layer is filled in over the grating coupler.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: September 14, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Feng-Wei Kuo, Lan-Chou Cho, Huan-Neng Chen, Chewn-Pu Jou, Wen-Shiang Liao