Abstract: A sputtering target structure includes a back plate characterized by a first size and a plurality of sub-targets bonded to the back plate. Each of the sub-targets is characterized by a size that is a fraction of the first size and is no greater than a threshold target size. A given sub-target characterized by a size no greater than the threshold target size exhibits no crack formation in a sputtering operation. Each of the plurality of sub-targets is in direct contact with one or more adjacent sub targets.

Abstract: The present disclosure relates to an integrated chip including a substrate and a pixel. The pixel includes a photodetector. The photodetector is in the substrate. The integrated chip further includes a first inner trench isolation structure and an outer trench isolation structure that extend into the substrate. The first inner trench isolation structure laterally surrounds the photodetector in a first closed loop. The outer trench isolation structure laterally surrounds the first inner trench isolation structure along a boundary of the pixel in a second closed loop and is laterally separated from the first inner trench isolation structure. Further, the integrated chip includes a scattering structure that is defined, at least in part, by the first inner trench isolation structure and that is configured to increase an angle at which radiation impinges on the outer trench isolation structure.

Abstract: A method for prognostic survival stage prediction based on machine learning includes acquiring patients' original information data within a previous preset time period and integrating the patients' original information data so as to obtain a first data set without recurrence time and a second data set with recurrence time; performing analysis based on preoperative information, postoperative information and survival status of each corresponding patient, so as to obtain a correlation degree among the preoperative information, the postoperative information and the survival status; and training in the first data set, so as to obtain a postoperative survival probability prediction model. The method includes training in the second data set, so as to obtain a survival time period prediction model if judging that a survival probability of a target patient is less than or equal to a preset value according to the postoperative survival probability prediction model.

Abstract: Some embodiments relate to a CMOS image sensor disposed on a substrate. A plurality of pixel regions comprising a plurality of photodiodes, respectively, are configured to receive radiation that enters a back-side of the substrate. A boundary deep trench isolation (BDTI) structure is disposed at boundary regions of the pixel regions, and includes a first set of BDTI segments extending in a first direction and a second set of BDTI segments extending in a second direction perpendicular to the first direction to laterally surround the photodiode. The BDTI structure comprises a first material. A pixel deep trench isolation (PDTI) structure is disposed within the BDTI structure and overlies the photodiode. The PDTI structure comprises a second material that differs from the first material, and includes a first PDTI segment extending in the first direction such that the first PDTI segment is surrounded by the BDTI structure.

Abstract: Some embodiments relate to a method of forming an integrated chip, including forming a first wire level over a substrate; depositing an etch stop layer over the first wire level; etching the etch stop layer to form an opening over the first wire level; depositing a barrier layer over the etch stop layer, the barrier layer extending into the opening; depositing a first conductive layer over the barrier layer and in the opening; performing a planarization into the first conductive layer to flatten a top of the first conductive layer, wherein the planarization stops before reaching the barrier layer; depositing a data storage layer and a second conductive layer over the first conductive layer; and patterning the barrier layer, the first conductive layer, the data storage layer, and the second conductive layer to form a memory cell at the opening.

Abstract: There is disclosed a process for the optical resolution of (RS)-?-ethyl-2-oxo-1-pyrrolidineacetic acid with a chiral amine and an optically inactive amine to form an ionic liquid in a solvent to produce (S)-?-ethyl-2-oxo-1-pyrrolidineacetic acid. The (S)-?-ethyl-2-oxo-1-pyrrolidineacetic acid is converted to (S)-?-ethyl-2-oxo-1-pyrrolidineacetamide.

Abstract: A printing system includes a machine readable storage medium storing instructions and a processor to execute the instructions. The processor is to execute the instructions to receive a source image comprising a plurality of regions and analyze each region of the plurality of regions to determine an ink density of each region. The processor is to execute the instructions to further in response to the ink density for a region exceeding a threshold, deplete the ink density for the region; and in response to the ink density for a region not exceeding the threshold, maintain the ink density for the region. The processor is to execute the instructions to further combine the depleted regions and the maintained regions to generate an optimized image.

Abstract: A camera device with image compensation and autofocus function, comprising a first carrying member, a second carrying member, a camera module, a first optical compensation component, a third carrying member, and an autofocus component. The second carrying member is movably assembled to the first carrying member. The first optical compensation component comprises a first force interaction member disposed at the first carrying member and a second force interaction member disposed at the second carrying member, which generate force interaction, allowing the second carrying member to move in the direction of a first axis or/and a second axis intersecting with an optical axis of the optical lens for optical compensation for the optical lens. The third carrying member bears the optical lens and is movably disposed on the second carrying member. The third carrying member could move along an optical axis of the optical lens.

Abstract: There is disclosed a process for the optical resolution of (RS)-?-ethyl-2-oxo-1-pyrrolidineacetic acid with a chiral amine in a mixed solvent of aromatics and alkyl alcohol of C4-C8 to produce (S)-?-ethyl-2-oxo-1-pyrrolidineacetic acid. The (S)-?-ethyl-2-oxo-1-pyrrolidineacetic acid is converted to (S)-?-ethyl-2-oxo-1-pyrrolidineacetamide.

Abstract: There is disclosed a process for the optical resolution of (RS)-?-ethyl-2-oxo-1-pyrrolidineacetic acid with a chiral amine in a solvent comprising an alkyl alcohol of C4-C6 to produce (S)-?-ethyl-2-oxo-1-pyrrolidineacetic acid. The (S)-?-ethyl-2-oxo-1-pyrrolidineacetic acid is converted to (S)-?-ethyl-2-oxo-1-pyrrolidineacetamide.

Abstract: A method includes forming a conductive pad over an interconnect structure of a wafer, forming a capping layer over the conductive pad, forming a dielectric layer covering the capping layer, and etching the dielectric layer to form an opening in the dielectric layer. The capping layer is exposed to the opening. A wet-cleaning process is then performed on the wafer. During the wet-cleaning process, a top surface of the capping layer is exposed to a chemical solution used for performing the wet-cleaning process. The method further includes depositing a conductive diffusion barrier extending into the opening, and depositing a conductive material over the conductive diffusion barrier.

Abstract: A semiconductor device includes a circuit substrate, a semiconductor package, and a metallic cover. The semiconductor package is disposed on the circuit substrate. The metallic cover is disposed over the semiconductor package and over the circuit substrate. The metallic cover comprises a cap and outer flanges. The cap overlies the semiconductor package. The outer flanges are disposed at edges of the cap, are connected with the cap, and extend towards the circuit substrate. A region of the bottom surface of the cap has a curved profile matching a warpage profile of the semiconductor package and the circuit substrate, and the region having the curved profile extends over the semiconductor package.

Abstract: A method for forming an image sensor package is provided. An image sensor chip is formed over a package substrate. A protection layer is formed overlying the image sensor chip. The protection layer has a planar top surface and a bottom surface lining and contacting structures under the protection layer. An opening is formed into the protection layer and spaced around a periphery of the image sensor chip. A light shielding material is filled in the opening to form an on-wafer shield structure having a sidewall directly contact the protection layer.

Abstract: A method and structure for doping source and drain (S/D) regions of a PMOS and/or NMOS FinFET device are provided. In some embodiments, a method includes providing a substrate including a fin extending therefrom. In some examples, the fin includes a channel region, source/drain regions disposed adjacent to and on either side of the channel region, a gate structure disposed over the channel region, and a main spacer disposed on sidewalls of the gate structure. In some embodiments, contact openings are formed to provide access to the source/drain regions, where the forming the contact openings may etch a portion of the main spacer. After forming the contact openings, a spacer deposition and etch process may be performed. In some cases, after performing the spacer deposition and etch process, a silicide layer is formed over, and in contact with, the source/drain regions.

Abstract: This disclosure relates to a thin pump including a case, a rotor, and a stator. The case has a bottom surface, a lower chamber, an upper chamber, and an accommodation space. The upper chamber is located further away from the bottom surface than the lower chamber. The upper chamber has two opposite ends respectively in fluid communication with the lower chamber and the accommodation space. The rotor includes an impeller and a magnet. The impeller is rotatably disposed in the lower chamber of the case. The magnet is disposed on the impeller. The stator is disposed in the case. The stator corresponds to the magnet of the rotor so as to drive the rotor to rotate with respect to the case.

Abstract: A method includes bonding a supporting substrate to a semiconductor substrate of a wafer. A bonding layer is between, and is bonded to both of, the supporting substrate and the semiconductor substrate. A first etching process is performed to etch the supporting substrate and to form an opening, which penetrates through the supporting substrate and stops on the bonding layer. The opening has substantially straight edges. The bonding layer is then etched. A second etching process is performed to extend the opening down into the semiconductor substrate. A bottom portion of the opening is curved.

Abstract: A high voltage device includes: a semiconductor layer, a well, a body region, a body contact, a gate, a source, and a drain. The body contact is configured as an electrical contact of the body region. The body contact and the source overlap with each other to define an overlap region. The body contact has a depth from an upper surface of the semiconductor layer, wherein the depth is deeper than a depth of the source, whereby a part of the body contact is located vertically below the overlap region. A length of the overlap region in a channel direction is not shorter than a predetermined length, so as to suppress a parasitic bipolar junction transistor from being turning on when the high voltage device operates, wherein the parasitic bipolar junction transistor is formed by a part of the well, a part of the body region and a part of the source.

Abstract: A lifting module for a chassis and an electronic device including the lifting module are provided. The lifting module includes a sidewall bracket, a lifting bracket, a sliding button assembly, and a driven assembly. The sidewall bracket is disposed on a side frame of the chassis. The lifting bracket is movably connected to the sidewall bracket. The sliding button assembly is slidably disposed on the side frame of the chassis. Part of the sliding button assembly is exposed from the chassis. The driven assembly is movably disposed on the sidewall bracket. The driven assembly is connected to interact the sliding button assembly and the lifting bracket. The lifting bracket is driven to move relative to the sidewall bracket selectively by the sliding button assembly through the driven assembly.

Abstract: A semiconductor device includes a bottom electrode, a top electrode, a sidewall spacer, and a data storage element. The sidewall spacer is disposed aside the top electrode. The data storage element is located between the bottom electrode and the top electrode, and includes a ferroelectric material. The data storage element has a peripheral region which is disposed beneath the sidewall spacer and which has at least 60% of ferroelectric phase. A method for manufacturing the semiconductor device and a method for transforming a non-ferroelectric phase of a ferroelectric material to a ferroelectric phase are also disclosed.