Patents by Inventor Wen Yu

Wen Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240365048
    Abstract: A sound producing package includes a substrate, a covering structure and a sound producing component. The covering structure is disposed on the substrate, wherein the covering structure has a plurality of first openings. The sound producing component is disposed between the substrate and the covering structure, wherein the sound producing component includes a membrane and an actuator, and the sound producing component is configured to generate an acoustic wave.
    Type: Application
    Filed: July 8, 2024
    Publication date: October 31, 2024
    Applicant: xMEMS Labs, Inc.
    Inventors: Chao-Yu Chen, Wen-Chien Chen, Chiung C. Lo, Hai-Hung Wen
  • Publication number: 20240365493
    Abstract: A lifting module for a chassis and an electronic device including the lifting module are provided. The lifting module includes a sidewall bracket, a lifting bracket, a sliding button assembly, and a driven assembly. The sidewall bracket is disposed on a side frame of the chassis. The lifting bracket is movably connected to the sidewall bracket. The sliding button assembly is slidably disposed on the side frame of the chassis. Part of the sliding button assembly is exposed from the chassis. The driven assembly is movably disposed on the sidewall bracket. The driven assembly is connected to interact the sliding button assembly and the lifting bracket. The lifting bracket is driven to move relative to the sidewall bracket selectively by the sliding button assembly through the driven assembly.
    Type: Application
    Filed: June 14, 2023
    Publication date: October 31, 2024
    Applicant: Wistron Corporation
    Inventors: Yin Tseng Lu, Chih Wei Kuo, YUCHUN HUNG, Tsung Han Yu, Hsiang Wen Huang, Chen Wei Tsai
  • Publication number: 20240359734
    Abstract: Techniques are provided for vehicle oscillation control. In one embodiment, the techniques involve identifying an oscillation at a steering wheel or steering column of a vehicle, upon determining that the oscillation exceeds an oscillation of interest threshold, identifying the oscillation as an oscillation of interest, classifying a cause of the oscillation of interest, and mitigating the oscillation of interest based on the classification of the cause.
    Type: Application
    Filed: April 28, 2023
    Publication date: October 31, 2024
    Inventors: Wen-Chiao Lin, Bo Yu, Raed Nasim Abuaita
  • Publication number: 20240363155
    Abstract: A method for efficiently waking up ferroelectric memory is provided. A wafer is formed with a plurality of first signal lines, a plurality of second signal lines, a plurality of third signal lines, and a plurality of ferroelectric memory cells that constitute a ferroelectric memory array. Each of the ferroelectric memory cells is electrically connected to one of the first signal lines, one of the second signal lines and one of the third signal lines. Voltage signals are simultaneously applied to the first signal lines, the second signal lines and the third signal lines to induce occurrence of a wake-up effect in the ferroelectric memory cells.
    Type: Application
    Filed: July 9, 2024
    Publication date: October 31, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tzu-Yu CHEN, Sheng-Hung SHIH, Fu-Chen CHANG, Kuo-Chi TU, Wen-Ting CHU
  • Publication number: 20240365561
    Abstract: A semiconductor device includes a bottom electrode, a top electrode, a sidewall spacer, and a data storage element. The sidewall spacer is disposed aside the top electrode. The data storage element is located between the bottom electrode and the top electrode, and includes a ferroelectric material. The data storage element has a peripheral region which is disposed beneath the sidewall spacer and which has at least 60% of ferroelectric phase. A method for manufacturing the semiconductor device and a method for transforming a non-ferroelectric phase of a ferroelectric material to a ferroelectric phase are also disclosed.
    Type: Application
    Filed: July 11, 2024
    Publication date: October 31, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tzu-Yu CHEN, Sheng-Hung SHIH, Fu-Chen CHANG, Kuo-Chi TU, Wen-Ting CHU
  • Publication number: 20240364696
    Abstract: An example operation may include one or more of storing access requirements of a containerized environment, identifying a plurality of types of users of the containerized environment based on the access requirements, identifying a plurality of different restriction priorities for the plurality of types of users within the containerized environment, respectively, based on the access requirements, dynamically generating an access policy that satisfies the plurality of different restriction priorities for the plurality of types of users within the containerized environment, and transforming the access policy into a plugin.
    Type: Application
    Filed: April 29, 2023
    Publication date: October 31, 2024
    Inventors: YAN HUANG, Zheng Lei An, Lei Wang, Shuang Shuang Jia, Heng Wang, Xiao Ling Chen, Wen Ya Zhou, Qing Yu Pei
  • Publication number: 20240363668
    Abstract: In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes at least one device on a front side of a semiconductor substrate. A plurality of grating layers are under the at least one device. The plurality of grating layers include at least a first material having a first refractive index alternating with a second material having a second refractive index. Contacts extend through an interlevel dielectric material, and further extend through the semiconductor substrate, to directly contact at least one of the first material and the second material below the at least one device and below the semiconductor substrate underlying the interlevel dielectric material.
    Type: Application
    Filed: July 11, 2024
    Publication date: October 31, 2024
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Hau Wu
  • Publication number: 20240363577
    Abstract: An electronic package and a substrate structure thereof are provided, in which an electronic element and a flow stopper surrounding the electronic element are disposed on a substrate body of the substrate structure, and a heat dissipation structure is bonded on the electronic element via a heat dissipation material, so that the flow stopper limits an overflow range of the heat dissipation material to prevent the heat dissipation material from contaminating a circuit layer on the substrate body.
    Type: Application
    Filed: July 24, 2023
    Publication date: October 31, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Pin-Jing SU, Wen-Yu TENG, Liang-Yi HUNG, Chia-Cheng CHEN, Yu-Po WANG
  • Patent number: 12132016
    Abstract: A method includes forming a conductive pad over an interconnect structure of a wafer, forming a capping layer over the conductive pad, forming a dielectric layer covering the capping layer, and etching the dielectric layer to form an opening in the dielectric layer. The capping layer is exposed to the opening. A wet-cleaning process is then performed on the wafer. During the wet-cleaning process, a top surface of the capping layer is exposed to a chemical solution used for performing the wet-cleaning process. The method further includes depositing a conductive diffusion barrier extending into the opening, and depositing a conductive material over the conductive diffusion barrier.
    Type: Grant
    Filed: August 8, 2023
    Date of Patent: October 29, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Yu Tsai, Ku-Feng Yang, Wen-Chih Chiou
  • Publication number: 20240353656
    Abstract: An imaging lens assembly module includes an imaging lens assembly, a light path folding element and a plastic assembling element. The imaging lens assembly includes an optical lens element. The light path folding element has a light incident surface, a light exiting surface and an optical reflecting surface. The plastic assembling element includes an assembling surface, a first surface and a second surface. The assembling surface is physically contacted with the light path folding element. Both the first surface and the second surface are disposed towards the light path folding element, and the second surface and the first surface are disposed adjacent to each other. The second surface and the optical reflecting surface are correspondingly disposed. The second surface includes a protruding structure array, and the protruding structure array includes at least seven protruding structures arranged at equal intervals.
    Type: Application
    Filed: April 16, 2024
    Publication date: October 24, 2024
    Inventors: Wei-Che TUNG, Lin-An CHANG, Wen-Yu TSAI, Chien-Pang CHANG, Kuo-Chiang CHU
  • Publication number: 20240352097
    Abstract: The present disclosure provides a neutralizing antibody for flaviviruses, a production method, a method of treating or preventing a flaviviruses infection in a subject, and the use thereof.
    Type: Application
    Filed: April 17, 2024
    Publication date: October 24, 2024
    Applicant: National Sun Yat-sen University
    Inventors: Day-Yu CHAO, Yen-Hsu Chen, Wen-Hung Wang
  • Publication number: 20240356252
    Abstract: A bus connecting cable includes a circuit board, a connector, circuits and a cable. The circuit board includes a top surface and a bottom surface. The connector on the top surface includes first terminals and second terminals. The circuits are arranged on the circuit board and include first circuits and second circuits. Each first circuit penetrates the circuit board and includes a first top end and a first bottom end. The first top ends are respectively connected to the first terminals. Each second circuit penetrates the circuit board and includes a second top end and a second bottom end. The second top ends are respectively connected to the second terminals. The first bottom ends and the second bottom ends are arranged along the bottom surface. The cable includes conductors. Each conductor is soldered to the first bottom ends and the second bottom ends.
    Type: Application
    Filed: June 16, 2023
    Publication date: October 24, 2024
    Inventors: Wen-Yu WANG, Chieh-Ming CHENG
  • Publication number: 20240355826
    Abstract: A method includes forming a gate stack on a first portion of a semiconductor fin, removing a second portion of the semiconductor fin to form a recess, and forming a source/drain region starting from the recess. The formation of the source/drain region includes performing a first epitaxy process to grow a first semiconductor layer, wherein the first semiconductor layer has straight-and-vertical edges, and performing a second epitaxy process to grow a second semiconductor layer on the first semiconductor layer. The first semiconductor layer and the second semiconductor layer are of a same conductivity type.
    Type: Application
    Filed: July 1, 2024
    Publication date: October 24, 2024
    Inventors: Jung-Chi Tai, Yi-Fang Pai, Tsz-Mei Kwok, Tsung-Hsi Yang, Jeng-Wei Yu, Cheng-Hsiung Yen, Jui-Hsuan Chen, Chii-Horng Li, Yee-Chia Yeo, Heng-Wen Ting, Ming-Hua Yu
  • Publication number: 20240356821
    Abstract: Embodiments of this application provide a method and an apparatus for resolving an intent conflict that includes: receiving conflict resolution policy information indicating a threshold and a first operation, the first operation includes: when a first preset condition is met, using an alternative solution for achieving a first intent, where the first preset condition includes that a first impact value of a value that is of a first KPI and that corresponds to the solution for a value that is of the first KPI and that corresponds to a second intent target is less than or equal to the threshold; and performing conflict resolution on the solution based on the conflict resolution policy information.
    Type: Application
    Filed: June 27, 2024
    Publication date: October 24, 2024
    Inventors: Wen Yan, Xianming Li, Yijun Yu, Yinping Liu
  • Patent number: 12126620
    Abstract: Account delegation is provided. A request for access to a secure system using an owner's account is received from an applier via a browser supplement module on the applier's computing device. The request is communicated to the account owner via a browser supplement module on the account owner's computing device. Approval of the request is received from the account owner. The secure system is logged into using the account owner's credential. A connection to the applier's computing device is established to act as a proxy for communication between the secure system and the applier's computing device. Further provided herein are a computer system and a computer program product for performing the method.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: October 22, 2024
    Assignee: International Business Machines Corporation
    Inventors: Wen-Ping Chi, Andy Min-Tsung Wu, Hsiao-Yung Chen, Hsin-Yu Hsieh, Wendy Ping Wen Wang
  • Patent number: 12123776
    Abstract: A spectrometer includes a plurality of photodetectors, an anti-reflection layer, a grating layer, a distant layer, and a collimator. The anti-reflection layer is disposed on the plurality of photodetectors. The grating layer is disposed above the anti-reflection layer and includes a plurality of grating structures to spread a light into a spectrum to the plurality of photodetectors through the distant layer. The distant layer continuously extends from the grating layer to the anti-reflection layer, the distant layer has a thickness in a range from 400 ?m to 2000 ?m, and a refractive index of the grating layer is greater than a refractive index of the distant layer. The collimator is disposed above the grating layer, in which the collimator is configured to confine an incident angle of the light from a first micro-lens.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: October 22, 2024
    Assignee: VisEra Technologies Company Ltd.
    Inventors: Wen-Yu Shih, Hsin-Yi Hsieh, Lai-Hung Lai, Po-Han Fu, Chin-Chuan Hsieh
  • Publication number: 20240344557
    Abstract: A slide rail assembly includes a first rail, a second rail, a releasing member, a blocking member and an operating member. A first positioning structure, an assisting structure and a second positioning structure are arranged on the first rail. The assisting structure is located between the first positioning structure and the second positioning structure. The second rail is displaceable relative to the first rail and can be positioned at different positions by a blocking of at least one of the releasing member and the blocking member and one of the first positioning structure, the assisting structure and the second positioning structure. The operating member is configured to operate the releasing member and the blocking member for terminating the blocking of the at least one of the releasing member and the blocking member and the one of the first positioning structure, the assisting structure and the second positioning structure.
    Type: Application
    Filed: October 17, 2023
    Publication date: October 17, 2024
    Applicants: KING SLIDE WORKS CO., LTD., KING SLIDE TECHNOLOGY CO.,LTD.
    Inventors: Ken-Ching Chen, Shun-Ho Yang, Kai-Wen Yu, Chun-Chiang Wang
  • Publication number: 20240345941
    Abstract: A core test method, for testing a processing circuit with multi cores, comprising: (a) testing defects of the cores to determine at least one failed core; (b) recording the failed core; (c) performing a performance test to all of the cores to generate performance data; and (d) filtering the performance data based on the failed core recorded in the step (b).
    Type: Application
    Filed: May 2, 2023
    Publication date: October 17, 2024
    Applicant: MediaTek Singapore Pte. Ltd.
    Inventors: Jianguo Ren, Hung-Yu Chiou, Cheng-Tien Wan, Chao-Yang Yeh, Wei-Lien Chen, Man-Yun Su, Zemin Xu, Wen-Hao Hsueh, Wei-Chuan Liu
  • Publication number: 20240342298
    Abstract: Disclosed herein is a method of treating a tumor in a subject. The method comprises administering to the subject a molecular construct, which comprises an anti-CD38 antibody, and a plurality of lenalidomide molecules or hydrolyzed lenalidomide molecules linked to the anti-CD38 antibody. According to some embodiments of the present disclosure, the administration of the molecular construct gives rise to an effective amount of the lenalidomide molecules or the hydrolyzed lenalidomide molecules that is at least 1,000 times less than an effective amount of the lenalidomide molecule used alone or in combination with the anti-CD38 antibody for the treatment of the tumor.
    Type: Application
    Filed: April 11, 2024
    Publication date: October 17, 2024
    Inventors: Hsing-Mao CHU, Yueh-Hsiang YU, Wei-Ting TIAN, Tse-Wen CHANG, Wei-Chen LIN, Shih-Syuan CHENG
  • Publication number: 20240346210
    Abstract: Disclosed in the present disclosure is a multi-scale analysis method for time series based on quantum walk, including (1). generating multi-scale and multi-feature sequences based on quantum walk; (2). screening feature sequences; (3). modeling and predicting time series based on regression analysis; (4). performing frequency domain and time domain-based result evaluation; and (5). performing experimental verification. The method of the present disclosure has the advantage that the multi-scale features of the quantum walk are applied to the analysis of time series, and by combining feature extraction methods under two rules, a model of an original time series is established based on extracted features by using linear, nonlinear and time-based regression methods. The analysis method for time series does not require pre-assumption such as stationarity assumption, and is a universal analysis method for time series.
    Type: Application
    Filed: December 31, 2021
    Publication date: October 17, 2024
    Applicant: NANJING NORMAL UNIVERSITY
    Inventors: Zhaoyuan YU, Lingling SUN, Binghuang PAN, Wen LUO, Linwang YUAN