Patents by Inventor Wen Yu

Wen Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12227867
    Abstract: A plating apparatus includes a workpiece holder, a plating bath, and a clamp ring. The plating bath is underneath the workpiece holder. The clamp ring is connected to the workpiece holder. The clamp ring includes channels communicating an inner surface of the clamp ring and an outer surface of the clamp ring.
    Type: Grant
    Filed: January 9, 2023
    Date of Patent: February 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Yu Tsai, Ku-Feng Yang, Wen-Chih Chiou
  • Patent number: 12229590
    Abstract: A content channel generation device comprises a resource unit assignment circuit, for assigning scheduled station(s) as node(s) of a full binary tree according to a search algorithm; a node computing circuit, for determining first node connection information of the full binary tree, and to determine second node connection information of a smallest full binary tree according to a smallest binary tree algorithm and the first node connection information; a load balance circuit, for determining user field numbers corresponding to content channels according to a load balance function and the second node connection information; a user field generation circuit, for generating a traversal result of the smallest full binary tree according to a traversal algorithm and the second node connection information, and for generating user fields corresponding to the content channels according to the traversal result, to generate the content channels.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: February 18, 2025
    Assignee: Realtek Semiconductor Corp.
    Inventors: Jhe-Yi Lin, Chun-Kai Tseng, Wen-Yung Lee, Shau-Yu Cheng
  • Publication number: 20250053039
    Abstract: An E-paper display panel including an E-paper display layer, a first substrate, a pixel array layer, a common electrode layer, and a driving circuit is provided. The first substrate is disposed at a first side of the E-paper display layer. The pixel array substrate is disposed between the first substrate and the E-paper display layer and includes touch electrodes and driving pixels arranged in an array. Each driving pixel includes a first pixel electrode and a second pixel electrode. The touch electrodes, the first pixel electrode, and the second pixel electrode are overlapped with each other. The common electrode layer is disposed at a second side of the E-paper display layer. The first side is opposite to the second side. The driving circuit is in signal communication with the common electrode layer and the pixel array layer. The touch electrodes are individually in signal communication with the driving circuit.
    Type: Application
    Filed: July 11, 2024
    Publication date: February 13, 2025
    Applicant: E Ink Holdings Inc.
    Inventors: Chia-Ming Hsieh, Chi-Mao Hung, Sung-Hui Huang, Chuen-Jen Liu, Liang-Yu Yan, Pei Ju Wu, Po-Chun Chuang, Che-Sheng Chang, Wen-Chung Yang
  • Patent number: 12224183
    Abstract: A package including a first carrier, a seed layer, wires, a die and a molding material is provided. The first carrier is removed to expose the seed layer after disposing a second carrier on the molding material, then the seed layer is removed to expose the wires, and a gold layer is deposited on each of the wires by immersion gold plating, finally a semiconductor device is obtained. The gold layer is provided to protect the wires from oxidation and improve solder joint reliability.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: February 11, 2025
    Assignee: CHIPBOND TECHNOLOGY CORPORATION
    Inventors: Shrane-Ning Jenq, Wen-Cheng Hsu, Chen-Yu Wang, Chih-Ming Kuo, Chwan-Tyaw Chen, Lung-Hua Ho
  • Patent number: 12222405
    Abstract: An insulation resistance detection system for an electric vehicle is used to detect a positive insulation resistance between a positive electrode of a battery of the electric vehicle and an equipment grounding point, and detect a negative insulation resistance between a negative electrode of the battery and the equipment grounding point. The insulation resistance detection system includes a negative detection circuit, a positive detection circuit, and a control unit. The control unit controls the negative detection circuit to be charged to generate a first capacitor voltage, and controls the positive detection circuit to be charged to generate a second capacitor voltage. The control unit determines whether the negative insulation resistance is abnormal according to the first capacitor voltage and a battery voltage of the battery, and determines whether the positive insulation resistance is abnormal according to the second capacitor voltage and the battery voltage.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: February 11, 2025
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chien-Yu Tseng, Yu-Xiang Zheng, Wen-Cheng Hsieh
  • Patent number: 12225126
    Abstract: The invention introduces an apparatus for detecting errors during data encryption. The apparatus includes a key generation circuitry and a key-error detection circuitry. The key generation circuitry is arranged operably to realize a key expansion operation for generating multiple round keys based on a root key in an encryption algorithm, where the encryption algorithm encodes plaintext or an intermediate encryption result with one round key in a corresponding round. The error detection circuitry is arranged operably to: calculate redundant data corresponding to each round key; and output an error signal to a processing unit when finding that any round key does not match corresponding redundant data at a check point during the key expansion operation.
    Type: Grant
    Filed: December 7, 2022
    Date of Patent: February 11, 2025
    Assignee: SILICON MOTION, INC.
    Inventors: Wun-Jhe Wu, Po-Hung Chen, Chiao-Wen Cheng, Jiun-Hung Yu, Chih-Wei Liu
  • Patent number: 12225273
    Abstract: The present disclosure provides an image sensor and control method thereof. The image sensor includes a first transparent conductive layer, a second conductive layer, an optical sensor and a semiconductor substrate. The optical sensor is arranged between the first transparent conductive layer and the second conductive layer, and includes a photoelectric conversion layer, wherein the photoelectric conversion layer has a thickness ranging from 500 to 10000 nm, and the optical sensor has a plurality of absorption spectrum ranges. The semiconductor substrate is below the second conductive layer.
    Type: Grant
    Filed: May 25, 2023
    Date of Patent: February 11, 2025
    Assignee: VisEra Technologies Company Ltd.
    Inventors: Lai-Hung Lai, Wen-Yu Shih, Chin-Chuan Hsieh
  • Patent number: 12223251
    Abstract: A semiconductor device includes a first cell. The first cell includes a first functional feature, a first sensitivity region, at least one anchor node, wherein each of the at least one anchor node is different from the first functional feature, and a number of anchor nodes of the at least one anchor node linked to the first functional feature is based on a position of the first functional feature relative to the first sensitivity region. The semiconductor device further includes a second cell abutting the first cell. The second cell includes a second functional feature, wherein the second functional feature satisfies a minimum spacing requirement with respect to the first functional feature.
    Type: Grant
    Filed: July 19, 2023
    Date of Patent: February 11, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Nien-Yu Tsai, Chin-Chang Hsu, Wen-Ju Yang, Hsien-Hsin Sean Lee
  • Publication number: 20250048611
    Abstract: A method of forming a semiconductor structure includes forming a fin over a semiconductor substrate, forming an isolation region on sidewalls of the fin, forming a metal gate over the fin and the isolation region, etching the metal gate to form a trench through the isolation region, passivating the top portion of the semiconductor substrate exposed in the trench to form a dielectric layer at a bottom of the trench, and depositing a dielectric material in the trench to form a dielectric structure. The dielectric structure divides the metal gate into two sections.
    Type: Application
    Filed: August 4, 2023
    Publication date: February 6, 2025
    Inventors: Yen Yu Chen, Ming-Yen Tsai, Wen-Hsing Hsieh, Ying-Han Chiou
  • Publication number: 20250043819
    Abstract: A slide rail assembly includes a first rail, a second rail, an auxiliary member, a blocking member and an operating member. The auxiliary member is arranged on the second rail. The blocking member is pivotally connected to the second rail. When the second rail is located at an extended position relative to the first rail, a blocking feature on the first rail blocks the blocking member in a first state for preventing the second rail from displacing away from the extended position along a retracting direction. When the operating member moves from a first operating position to a second operating position to drive the blocking member to move to a second state, the blocking feature does not block the blocking member in the second state, and the operating member engages with a predetermined portion of the auxiliary member to retain the operating member at the second operating position.
    Type: Application
    Filed: January 11, 2024
    Publication date: February 6, 2025
    Applicants: KING SLIDE WORKS CO., LTD., KING SLIDE TECHNOLOGY CO., LTD.
    Inventors: Ken-Ching Chen, Shun-Ho Yang, Kai-Wen Yu, Chun-Chiang Wang
  • Publication number: 20250048647
    Abstract: In some embodiments, the present disclosure relates to a method of forming an integrated chip including forming a ferroelectric layer over a bottom electrode layer, forming a top electrode layer over the ferroelectric layer, performing a first removal process to remove peripheral portions of the bottom electrode layer, the ferroelectric layer, and the top electrode layer, and performing a second removal process using a second etch that is selective to the bottom electrode layer and the top electrode layer to remove portions of the bottom electrode layer and the top electrode layer, so that after the second removal process the ferroelectric layer has a surface that protrudes past a surface of the bottom electrode layer and the top electrode layer.
    Type: Application
    Filed: October 21, 2024
    Publication date: February 6, 2025
    Inventors: Chih-Hsiang Chang, Kuo-Chi Tu, Sheng-Hung Shih, Wen-Ting Chu, Tzu-Yu Chen, Fu-Chen Chang
  • Publication number: 20250047096
    Abstract: An electrostatic discharge circuit includes a discharge switch, a first trigger circuit and a second trigger circuit. A first terminal of the discharge switch is coupled to a first power domain, and a second terminal of the discharge switch is coupled to a second power domain. The first trigger circuit is coupled between the first terminal and a control terminal of the discharge switch. The second trigger circuit is coupled between the second terminal and the control terminal. When an electrostatic discharge voltage occurs in the first power domain, the second trigger circuit is configured to form a conduction voltage between the second terminal and the control terminal to turn on the discharge switch. When the electrostatic discharge voltage occurs in the second power domain, the second trigger circuit is configured to short the second terminal and the control terminal to turn on the discharge switch.
    Type: Application
    Filed: August 1, 2023
    Publication date: February 6, 2025
    Inventors: Shih-Yu WANG, Wen-Tsung HUANG, Chih-Wei HSU
  • Patent number: 12215872
    Abstract: There is provided an auto detection system including a thermal detection device and a host. The host controls an indication device to indicate a prompt message or detection results according to a slope variation of voltage values or 2D distribution of temperature values detected by the thermal detection device, wherein the voltage values include the detected voltage of a single pixel or the sum of detected voltages of multiple pixels of a thermal sensor.
    Type: Grant
    Filed: July 20, 2023
    Date of Patent: February 4, 2025
    Assignee: PIXART IMAGING INC.
    Inventors: Chih-Ming Sun, Ming-Han Tsai, Chiung-Wen Lin, Po-Wei Yu, Wei-Ming Wang, Sen-Huang Huang
  • Patent number: 12216332
    Abstract: An imaging lens assembly has an optical axis and includes a plastic lens element set. The plastic lens element set includes two plastic lens elements and at least one anti-reflective layer. The two plastic lens elements, in order from an object side to an image side along the optical axis are a first plastic lens element and a second plastic lens element. The anti-reflective layer has a nanostructure and is disposed on at least one of an image-side surface of the first plastic lens element and an object-side surface of the second plastic lens element.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: February 4, 2025
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Chien-Pang Chang, Wen-Yu Tsai, Lin-An Chang, Ming-Ta Chou, Kuo-Chiang Chu
  • Patent number: 12218017
    Abstract: The invention discloses a glass carrier having a protection structure, comprising a glass body and a protection layer. The glass body has a top surface, a bottom surface, and a lateral surface. The protection layer covers the lateral surface of the glass body. The protection layer is a hard material with a stiffness coefficient higher than a stiffness coefficient of the glass body. The invention further discloses a manufacturing method of a glass carrier having a protection structure, comprising the following steps: covering the protection layer around the lateral surface of the glass body, wherein the protection layer is the hard material with the stiffness coefficient higher than the stiffness coefficient of the glass body.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: February 4, 2025
    Assignee: UNIMICRON TECHNOLOGY CORP.
    Inventors: Wen Yu Lin, Kai-Ming Yang, Pu-Ju Lin
  • Patent number: 12213513
    Abstract: A low-temperature smoking body and a preparation method thereof are disclosed. The low-temperature smoking body includes tobacco particles. The tobacco particle includes a particle body and a shell wrapped on the particle body. A carrier is distributed in the particle body and/or the shell. The carrier includes at least one of a raw tobacco material, a non-tobacco material, and a porous material. The carrier carries a smoking agent, and the smoking agent includes a tobacco extract and/or an atomizer. In addition, a preparation method of the low-temperature smoking body is further disclosed. The low-temperature smoking body has better smoking stability and uniformity, and the tobacco particles having core-shell structures can effectively solve the problem of liquid leakage.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: February 4, 2025
    Assignee: CHINA TOBACCO HUNAN INDUSTRIAL CO., LTD.
    Inventors: Qian Chen, Ke Li, Yong Jin, Saibo Yu, Hongmei Fan, Shitai Wang, Chao Tan, Haifeng Tan, Qi Liu, Jianhua Yi, Wen Du, Xinqiang Yin, Xinliang Tan
  • Publication number: 20250036955
    Abstract: A system of assisting in building machine learning model without programming and a method thereof is disclosed. A machine learning model building host provides an interactive question-and-answer area corresponding to a step process being executed, through an operation interface; the machine learning model building host provides a query message to an artificial intelligence platform through the Interactive question-and-answer area of an application programming interface, and the artificial intelligence platform provides the query message to a large language model to generate an answer message, the artificial intelligence platform transmits the answer message to the machine learning model building host, through the application programming interface, so as to achieve the technical effect of assisting in building a machine learning model without programming.
    Type: Application
    Filed: July 27, 2023
    Publication date: January 30, 2025
    Inventors: Hsi-Yu CHEN, Wen-Shou CHIU
  • Publication number: 20250035832
    Abstract: An electronic device includes a back board, plurality of light emitting units arranged on the base, an optical film arranged on the plurality of light emitting units, and a reflective component arranged on the base and including a first surface. The back board includes a base, a side portion, and a top portion, wherein in a cross section view, an extension direction of the side portion is different from an extension direction of the base and an extension direction of the top portion; wherein an end of the side portion is connected to the base and another end of the side portion is connected to the top portion.
    Type: Application
    Filed: October 15, 2024
    Publication date: January 30, 2025
    Inventors: Ling-Chieh SHEN, Ting-Ying WU, Yang-Ruei LI, Wen-Yu LIN
  • Publication number: 20250037432
    Abstract: A method, computer system, and program product facilitate identification of error image labels in training data. The method comprises: evenly dividing a training dataset into N subsets, where the training dataset includes M data items each comprising a pair of image and its original image label; training a prediction model to label images by respectively using each of the N subsets as training data to generate N respective trained prediction models; respectively using each of the N trained prediction models trained by using one of the N subsets as training data to label the images in other N?1 subsets of the N subsets to generate N?1 prediction labels for each of the M images in the training dataset. For each image in the M data items, whether the original image label of the image is a potential error image label is based on the N?1 prediction labels of the image.
    Type: Application
    Filed: July 25, 2023
    Publication date: January 30, 2025
    Inventors: Deng Xin Luo, Xiang Yu Yang, Yong Wang, Ye Wang, Zhong Fang Yuan, Wen Wang
  • Patent number: 12209013
    Abstract: A method includes bonding a supporting substrate to a semiconductor substrate of a wafer. A bonding layer is between, and is bonded to both of, the supporting substrate and the semiconductor substrate. A first etching process is performed to etch the supporting substrate and to form an opening, which penetrates through the supporting substrate and stops on the bonding layer. The opening has substantially straight edges. The bonding layer is then etched. A second etching process is performed to extend the opening down into the semiconductor substrate. A bottom portion of the opening is curved.
    Type: Grant
    Filed: August 6, 2023
    Date of Patent: January 28, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jhao-Yi Wang, Chin-Yu Ku, Wen-Hsiung Lu, Lung-Kai Mao, Ming-Da Cheng