Patents by Inventor Wen Yuan

Wen Yuan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120119298
    Abstract: A method of forming an integrated circuit includes forming a plurality of gate structures longitudinally arranged along a first direction over a substrate. A plurality of angle ion implantations are performed to the substrate. Each of the angle ion implantations has a respective implantation angle with respect to a second direction. The second direction is substantially parallel with a surface of the substrate and substantially orthogonal to the first direction. Each of the implantation angles is substantially larger than 0°.
    Type: Application
    Filed: November 11, 2010
    Publication date: May 17, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Zhiqiang WU, Yi-Ming SHEU, Tsung-Hsing YU, Kuan-Lun CHENG, Chih-Pin TSAO, Wen-Yuan CHEN, Chun-Fu CHENG, Chih-Ching WANG
  • Publication number: 20120098125
    Abstract: An integrated circuit (IC) package includes an IC chip and a package carrier. The IC chip includes a substrate and an IC layered structure configured on an active surface of the substrate. The IC layered structure includes a first physical layer interface and a second physical layer interface. The first physical layer interface includes a plurality of first bump pads and a plurality of first inner pads electrically connected to the first bump pads, respectively. The second physical layer interface includes a plurality of second bump pads and a plurality of second inner pads electrically connected to the second bump pads, respectively. The second bump pads are mirror images of the first bump pads with respect to a first geometric plane perpendicular to the active surface. The second inner pads are mirror images of the first inner pads with respect to the first geometric plane.
    Type: Application
    Filed: March 17, 2011
    Publication date: April 26, 2012
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Wen-Yuan Chang, Yu-Kai Chen, Yeh-Chi Hsu, Ying-Ni Lee, Wei-Chih Lai
  • Patent number: 8143185
    Abstract: A photocatalytic metal deposition process and a resulting nanocomposite are described. The nanocomposite includes an electrically conducting carbonaceous material, a photoactive metal oxide and a metal. Metals for deposition include noble metals, metal alloys and other transition metals in which the metal is laid down precisely and in a predetermined fashion on one or more surfaces of a composite. Deposition provides a high performance electrocatalyst for a number of suitable applications.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: March 27, 2012
    Assignees: Board of Regents, The University of Texas System, Sid Richardson carbon & Energy Co.
    Inventors: Krishnan Rajeshwar, Norma Tacconi, Chakkankal R. Chenthamarakshan, Wesley Wampler, Thomas F. Carlson, Wen-Yuan Lin
  • Publication number: 20120043528
    Abstract: A homo-material heterophased quantum well includes a first structural layer, a second structural layer and a third structural layer. The second structural layer is sandwiched between the first and third structural layers. The first structural layer, second structural layer and third structural layer are formed by growing atoms of a single material in a single growth direction. The energy gap of the second structural layer is smaller than that of the first and third structural layers.
    Type: Application
    Filed: January 19, 2011
    Publication date: February 23, 2012
    Inventors: I-Kai Lo, Yu-Chi Hsu, Chia-Ho Hsieh, Wen-Yuan Pang, Ming-Chi Chou
  • Publication number: 20120034255
    Abstract: Stabilized forms of gp120 polypeptide, nucleic acids encoding these stabilized forms, vectors comprising these nucleic acids, and methods of using these polypeptides, nucleic acids, vectors and host cells are disclosed. Crystal structures and computer systems including atomic coordinates for stabilized forms of gp120, and gp120 with an extended V3 loop, and methods of using these structures and computer systems are also disclosed.
    Type: Application
    Filed: September 14, 2011
    Publication date: February 9, 2012
    Inventors: Peter Kwong, John Mascola, Gary Nabel, Richard Wyatt, Barna Dey, Ling Xu, Tongqing Zhou, Joseph Sodroski, Wen Yuan, Shi-Hua Xiang
  • Publication number: 20120026044
    Abstract: A monopole antenna is disposed on a substrate including a first surface and a second surface. The monopole antenna includes a feeding point, a radiation unit, and a reflecting element. The radiation unit is disposed on the first surface of the substrate, and includes a feeding section, a first radiation section, a second radiation section, and a third radiation section. The feeding section, the first radiation section, and the second radiation section are connected sequentially. The feeding point is electrically connected to the feeding section. The second radiation section and the feeding section are respectively placed at two sides of a longitudinal axis of the first radiation section. The third radiation section is electrically connected to the first radiation section. The reflecting element is disposed on the second surface of the substrate, and corresponds to a position of the second radiation section.
    Type: Application
    Filed: November 4, 2010
    Publication date: February 2, 2012
    Applicant: Micro-Star Int'l Co., Ltd.
    Inventors: Wen-Yuan Lo, Cheng-Hsu Yang, Yueh-Cheng Chen
  • Publication number: 20120019508
    Abstract: An electrophoretic display includes a row driver connected to an electrophoretic display panel via a plurality of gate scanlines, and the row driver has a decoder. When the electrophoretic display is to update a picture that includes only a block to be changed, the decoder decodes a start position and an end position of the block to determine a portion of gate scanlines that are occupied by the block, and the row driver drives only the portion of gate scanlines. Therefore, the update time is shorter and the power consumption is less than that for a full update case.
    Type: Application
    Filed: June 23, 2011
    Publication date: January 26, 2012
    Applicant: FITIPOWER INTEGRATED TECHNOLOGY INC.
    Inventors: CHIA-HUNG WEI, WEN-YUAN KUO, HSIANG-TSUNG CHUANG
  • Publication number: 20120019509
    Abstract: For picture updating, an electrophoretic display erases the ghost image and then continuously turns on a plurality of frames, each for changing only one gray level, so as to gradually adjust each of the pixels to a respective desired gray level, which can simplify and accelerate the picture updating, and reduce the content size of a lookup table. By incorporating with adjusting the time length of the frames, the lightness adjustment of the electrophoretic display can be simplified.
    Type: Application
    Filed: June 23, 2011
    Publication date: January 26, 2012
    Applicant: FITIPOWER INTEGRATED TECHNOLOGY INC.
    Inventors: CHIA-HUNG WEI, WEN-YUAN KUO, HSIANG-TSUNG CHUANG
  • Publication number: 20120023549
    Abstract: A method for inviting a challenged entity to provide input concerning a sinograph includes displaying, to the challenged entity, a first region having an image of a challenge sinograph; displaying at least a first event-sensitive region, the first event-sensitive region having an image of a real root of the challenge sinograph; and displaying at least a second event-sensitive region. The second event sensitive region has an image of a faux root of the challenge sinograph.
    Type: Application
    Filed: July 21, 2011
    Publication date: January 26, 2012
    Applicant: Academia Sinica
    Inventors: Ling-Jyh Chen, Der-Ming Juang, Wen-Yuan Zhu, Hsiao-Hsuan Yu, Fu-Wei Chen
  • Patent number: 8092038
    Abstract: A lamp shade includes a frame bar and a plurality of fixing members. The frame bar includes a pair of wall bodies and a base connected between the wall bodies. Each wall body has an inner wall surface, and the inner wall surfaces are disposed facing each other. The fixing members are disposed at the wall bodies, and at least one fixing member is located on each inner wall surface.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: January 10, 2012
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Wen-Yuan Liao, Sheng-Chieh Chao, Jui-Chuan Chien
  • Patent number: 8044185
    Abstract: Stabilized forms of gp120 polypeptide, nucleic acids encoding these stabilized forms, vectors comprising these nucleic acids, and methods of using these polypeptides, nucleic acids, vectors and host cells are disclosed. Crystal structures and computer systems including atomic coordinates for stabilized forms of gp120, and gp120 with an extended V3 loop, and methods of using these structures and computer systems are also disclosed.
    Type: Grant
    Filed: September 6, 2006
    Date of Patent: October 25, 2011
    Assignees: The United States of America as represented by the Secretary of the Department of Health and Human Services, Dana Farber Cancer Institute, Inc.
    Inventors: Peter Kwong, John Mascola, Gary Nabel, Richard Wyatt, Barna Dey, Ling Xu, Tongqing Zhou, Chih-Chin Huang, Joseph Sodroski, Wen Yuan, Shi-Hua Xiang
  • Patent number: 8042235
    Abstract: A buckling device for safety belts includes a buckle made of metal material and bent to form a projected holder. A wider segment of the holder is used to insert a side of the safety belt to the buckle. On each of two sides of a narrower segment of the holder is mounted a second side plate. Between two second side plates is defined a locking unit by using a shank. On an upper rim of the second side plate is a recess. The locking unit includes an engagement member in which a rotary member, a fixing piece, a compression spring, a mounting member, and a torsion spring are received. A fastening member includes a bottom sheet, with a wider segment thereof being used to insert another side of the safety belt. The fastening member further includes a retaining pore secured on a narrower segment thereof.
    Type: Grant
    Filed: May 26, 2009
    Date of Patent: October 25, 2011
    Assignee: Taiwan Racing Products Co., Ltd.
    Inventor: Wen-Yuan Wu
  • Patent number: 8026866
    Abstract: A method for applying the same dithering table to different flat panels and a display panel driving method using the same. The method for applying the same dithering table to different flat panels is mainly to set different dot counts between different panels on the rows, in which pixels are shifted, so that the display data of scan lines, in which the pixels are shifted, is shifted by the dot counts when the display data is substituted into the dithering table. Thus, even if different display panels use the same dithering table, the display entropy can be uniformly distributed.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: September 27, 2011
    Assignee: Orise Technology Co., Ltd.
    Inventors: Jeng-Luen Tsai, Wen Yuan Kuo
  • Patent number: 8018418
    Abstract: A data synchronization method for a transmitter of a display device includes utilizing a plurality of first signaling line sets to couple the transmitter and a plurality of receivers in a dedicated type manner, transmitting a synchronization signal to the plurality of receivers according to a transistor-to-transistor logic signal form, transmitting a synchronization start-up signal to the plurality of receivers via the plurality of first signaling line sets a first time later after the synchronization signal is transmitted, and then transmitting a data signal to the plurality of receivers via the plurality of first signaling line sets a second time later after the synchronization start-up signal is transmitted. The synchronization signal has a longer effective time than the synchronization start-up signal.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: September 13, 2011
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Wen-Yuan Tsao, Che-Li Lin, Chi-Ming Yuan
  • Publication number: 20110215019
    Abstract: A package box module for packaging an object is disclosed, which includes a package box having a sidewall and plural first coupling structures disposed on the sidewall, and a common cushion disposed between the object and the sidewall. The common cushion includes plural second coupling structures and plural flexible structures disposed between the second coupling structures. The common cushion can be enlarged by extending the flexible structures, so that the first coupling structures couple to the second coupling structures, thus a gap between the object and the package box is filled by the common cushion.
    Type: Application
    Filed: June 24, 2010
    Publication date: September 8, 2011
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Chung-Hsing Wu, Kun-Hung Hsieh, Wen-Yuan Chang, Jen-Wei Peng
  • Publication number: 20110169147
    Abstract: A chip package structure for being disposed on a carrier includes a package substrate and a chip. The package substrate includes a laminated layer, a patterned conductive layer, a solder-mask layer, at least one outer pad and a padding pattern. The patterned conductive layer is disposed on a first surface of the laminated layer and has at least one inner pad. The solder resist layer is disposed on the first surface and has at least one opening exposed the inner pad. The outer pad is disposed on the solder resist layer, located within the opening, and is connected with the inner pad. The padding pattern is disposed on the solder resist layer. A height of the padding pattern relative to the first surface is greater than that of the outer pad. The chip is located on a second surface of the laminated layer and electrically connected to the package substrate.
    Type: Application
    Filed: November 16, 2010
    Publication date: July 14, 2011
    Applicant: VIA TECHNOLOGIES, INC.
    Inventor: Wen-Yuan Chang
  • Publication number: 20110108984
    Abstract: A circuit board includes a substrate that has a top surface and a base surface opposite to each other, at least a top pad disposed on the top surface, a top solder resist layer disposed on the top surface and covering a portion of the top pad, and a pre-bump disposed on the top pad. The top solder resist layer has a first opening exposing a portion of the top pad. The pre-bump is located in the first opening and has a protrusion protruding from the top solder resist layer. A maximum width of the protrusion is less than or equal to a width of the top pad. A chip package structure having the circuit board is also provided.
    Type: Application
    Filed: January 11, 2011
    Publication date: May 12, 2011
    Applicant: VIA TECHNOLOGIES, INC.
    Inventors: Wen-Yuan Chang, Wei-Cheng Chen, Yeh-Chi Hsu
  • Patent number: 7906377
    Abstract: A fabrication method of a circuit board is provided. A substrate, a top pad, a base pad electrically connecting the top pad, and a top and a base solder resist layers are provided. The top and the base pads are disposed on two opposite surfaces of the substrate, respectively. The top solder resist layer having a first opening partially exposing the top pad and the base solder resist layer having a second opening partially exposing the base pad are disposed on the two surfaces, respectively. A conductive layer covering the base solder resist layer and the base pad is formed. A plating resist layer having a third opening is formed on the conductive layer. A current is applied to the conductive layer through the third opening for electroplating a pre-bump on the top pad. The plating resist layer and the conductive layer are then removed.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: March 15, 2011
    Assignee: VIA Technologies, Inc.
    Inventors: Wen-Yuan Chang, Wei-Cheng Chen, Yeh-Chi Hsu
  • Patent number: 7902926
    Abstract: An embodiment of a communication system is provided, in which a high frequency oscillator generates a first high frequency signal upon receipt of no disable signal. The first high frequency signal is commonly shared by at least two modules. Each module coupled to the high frequency oscillator operates in either busy or idle mode, wherein the module operates at the first high frequency signal when in busy mode, and asserts a request signal when in idle mode. A disablement unit, coupled to the first and second modules, asserts the disable signal to the high frequency oscillator when all of the request signals are asserted, thereby forcing the high frequency oscillator to cease the generation of the first high frequency signal.
    Type: Grant
    Filed: April 20, 2009
    Date of Patent: March 8, 2011
    Assignee: Mediatek Inc.
    Inventors: Ti-Wen Yuan, Chung-Shine Huang
  • Patent number: RE42710
    Abstract: The present invention is about an apparatus for scanning an object. The apparatus comprises an image capture module having a lens and a sensors array for capturing light after scanning the object. There are light sources comprising a visible light source and an infrared light source. Next, a key module of the present invention is a first translation module connected with the lens and the sensors array. The first translation module is-used for changing a first location of the lens and a second location of the sensors array according to using different the light sources so as to improve some optical characteristics, such as aberration resulting from different wavelengths of light sources. A power module connects with the first translation module and the light sources for supporting energy to the first translation module and the light sources. Moreover, a second translation module connects with the light sources and the image capture module, and the second translation driven by the power module.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: September 20, 2011
    Assignee: Transpacific Systems, LLC
    Inventor: Wen-Yuan Chang