Abstract: A circuit board includes a substrate that has a top surface and a base surface opposite to each other, at least a top pad disposed on the top surface, a top solder resist layer disposed on the top surface and covering a portion of the top pad, and a pre-bump disposed on the top pad. The top solder resist layer has a first opening exposing a portion of the top pad. The pre-bump is located in the first opening and has a protrusion protruding from the top solder resist layer. A maximum width of the protrusion is less than or equal to a width of the top pad. A chip package structure having the circuit board is also provided.

Abstract: A method of manufacturing a flexible substrate structure includes the following steps. A first loading substrate having a center area and a peripheral area is provided. A first adhesive layer is formed on the center area of the first loading substrate, and a second adhesive layer is formed on the peripheral area of the first loading substrate. The first flexible substrate is adhered to the first loading substrate by the first adhesive layer and the second adhesive layer to form a flexible substrate structure, wherein the adhesive force between the first flexible substrate and the second adhesive layer is stronger than that between the first flexible substrate and the first adhesive layer. The flexible substrate structure is cut, and the first flexible substrate is separated from the flexible substrate structure.

Abstract: A homo-material heterophased quantum well includes a first structural layer, a second structural layer and a third structural layer. The second structural layer is sandwiched between the first and third structural layers. The first structural layer, second structural layer and third structural layer are formed by growing atoms of a single material in a single growth direction. The energy gap of the second structural layer is smaller than that of the first and third structural layers.

Abstract: Disclosed herein are compositions and methods useful for the treatment of cancer, such as breast cancer. In some embodiments, the methods and compositions include human prolactin, or human prolactin in conjunction with a cytotoxic agent. In other embodiments, the methods and compositions include one or more of human prolactin, growth hormone and placental lactogen, or one or more of human prolactin, growth hormone and placental lactogen in conjunction with a cytotoxic agent. In some embodiments, the cytotoxic agent comprises a chemotherapeutic agent.

Abstract: The present invention describes compositions and methods for inhibiting cell proliferation comprising a prolactin receptor antagonist and an agent that inactivates the HER2/neu signaling pathway, and methods of use thereof.

Abstract: An antenna system includes a first antenna, a second antenna, a band rejection filter, and a dielectric substrate. The band rejection filter is substantially disposed between the first antenna and the second antenna. The band rejection filter includes a protruded ground element, a main branch, a first extension branch, a first additional branch, and a second additional branch. The main branch substantially has a T-shape. The first extension branch is coupled to the main branch. The first additional branch is separated from the main branch, and a first coupling gap is formed between the first additional branch and the main branch. The second additional branch is separated from the main branch, and a second coupling gap is formed between the second additional branch and the first extension branch. The band rejection filter is configured to improve the isolation between the first antenna and the second antenna.

Abstract: A manufacturing method for three-dimensional GaN epitaxial structure comprises a disposing step, in which a substrate of LiAlO2 and a source metal of Ga are disposed inside an vacuum chamber. An exposing step is importing N ions in plasma state and generated by a nitrogen source into the chamber. A heating step is heating up the source metal to generate Ga vapor. A growing step is forming a three-dimensional GaN epitaxial structure with hexagonal micropyramid or hexagonal rod having a broadened disk-like surface on the substrate by reaction between the Ga vapor and the plasma state of N ions.

Abstract: Isolated immunogens including a HIV-1 gp120 polypeptide or immunogenic fragment thereof stabilized in a CD4 bound confirmation by crosslinked cysteines, and methods of their use are disclosed. The immunogens are useful, for example, for generating an immune response to HIV-1 gp120 in a subject.

Abstract: A method for zooming screen, an electronic apparatus and a computer readable medium using the same are provided. The method is adapted to an electronic apparatus having a touch screen. Firstly, a zooming gesture is detected by utilizing the touch screen. Next, a screen object acted by the zooming gesture on the touch screen is searched. Afterwards, a specific part of the screen object and a screen edge of the touch screen are used as a reference to zoom all of objects displayed in a screen of the touch screen, such that a height of the specific part of the screen object is constantly maintained during zooming the screen.

Abstract: An III-nitride quantum well structure includes a GaN base, an InGaN layer and an InGaN covering layer. The GaN base includes a GaN buffering layer, a GaN post extending from the GaN buffering layer, and a GaN pyramid gradually expanding from the GaN post to form a mounting surface. The InGaN layer includes first and second coupling faces. The first coupling face is coupled with the mounting surface. The GaN covering layer includes first and second coupling faces. The first coupling face of the GaN covering layer is coupled with the second coupling face of the InGaN layer. A method for manufacturing the III-nitride quantum well structure and a light-emitting unit having a plurality of III-nitride quantum well structures are also proposed.

Abstract: An integrated circuit (IC) package includes an IC chip and a package carrier. The IC chip includes a substrate and an IC layered structure configured on an active surface of the substrate. The IC layered structure includes a first physical layer interface and a second physical layer interface. The first physical layer interface includes a plurality of first bump pads and a plurality of first inner pads electrically connected to the first bump pads, respectively. The second physical layer interface includes a plurality of second bump pads and a plurality of second inner pads electrically connected to the second bump pads, respectively. The second bump pads are mirror images of the first bump pads with respect to a first geometric plane perpendicular to the active surface. The second inner pads are mirror images of the first inner pads with respect to the first geometric plane.

Abstract: A circuit substrate includes a dielectric layer and a plurality of conductive structures. The dielectric layer has a plurality of conductive openings, a first surface, and a second surface opposite to the first surface. Each of the conductive openings connects the first surface and the second surface. The conductive openings are respectively filled with the conductive structures. Each of the conductive structures is integrally formed and includes a pad part, a connection part, and a protruding part. Each of the connection parts is connected to the corresponding pad part and the corresponding protruding part. Each of the protruding parts has a curved surface that protrudes from the second surface. A process for fabricating the circuit substrate is also provided.

Abstract: In the present invention, copper(I) selenide (Cu2-xSe) nanoparticles are fabricated by pyrolysis in an inert atmosphere. Uniformly dispersed Cu2-xSe particles are synthesized by altering Cu/Se ratio, the concentration of Se Precursors (TOP Se), reaction time and temperature. Analysis by inductively coupled plasma atomic emission spectroscopy (ICP-AES) of said Cu2-xSe nanoparticles reveals that the composition of the nanoparticles is Cu 1.95Se, wherein x=0.05. In addition, Cu2-xSe is dissolved in ethanol to deposit thin films by electrophoretical deposition (EPD) in an inert atmosphere, wherein a positive electrode and a negative electrode are employed. The positive electrode is made of stainless steel plate and the negative electrode is made of indium tin oxide on a glass substrate. Investigations on properties and surface morphology thereof in different electrophoretical conditions are carried out. The rate of EPD is found to significantly influence the quality of thin films.

Abstract: A display device includes a first flexible substrate, a second flexible substrate and a patterned sealant. The patterned sealant is disposed between the first flexible substrate and the second flexible substrate. The patterned sealant includes a hollow rectangular pattern, which is disposed in a peripheral region of the first flexible substrate, and has a rectangular opening corresponding to an active region of the first flexible substrate. The rectangular opening has a long side parallel to a first direction and a short side parallel to a second direction, and the long side has a long side length x1 and the short side has a short side length y1. The hollow rectangular pattern has a first width x2 in the first direction, and a second width y2 in the second direction, wherein y2?x2, y1?x1 and 10?y1/y2?90.

Abstract: In the present invention, copper(I) selenide (Cu2-xSe) nanoparticles are fabricated by pyrolysis in an inert atmosphere. Uniformly dispersed Cu2-xSe particles are synthesized by altering Cu/Se ratio, the concentration of Se Precursors (TOP Se), reaction time and temperature. Analysis by inductively coupled plasma atomic emission spectroscopy (ICP-AES) of said Cu2-xSe nanoparticles reveals that the composition of the nanoparticles is Cu 1.95Se, wherein x=0.05. In addition, Cu2-xSe is dissolved in ethanol to deposit thin films by electrophoretical deposition (EPD) in an inert atmosphere, wherein a positive electrode and a negative electrode are employed. The positive electrode is made of stainless steel plate and the negative electrode is made of indium tin oxide on a glass substrate. Investigations on properties and surface morphology thereof in different electrophoretical conditions are carried out. The rate of EPD is found to significantly influence the quality of thin films.

Abstract: A conveyor-belt linking apparatus utilizes a movable frame slidably disposed on a predetermined supporting surface, a plurality of pivot shafts disposed on the movable frame to support a load object, at least one primary driving element disposed between the movable frame and the predetermined supporting surface to drive the movable frame to reciprocally and slidably move along a predetermined direction, and an engaging driving assembly including a side driving element capable of being outwardly input with a power and a transmission assembly. The transmission assembly capable of synchronically sliding with the movable frame is connected to the side driving element for transmitting the power of the side driving element to rotate each of the pivot shafts. With the movable frame capable of sliding between two conveying positions, the defects of inclination, vibration and sway of the load object resulted from a large clearance between the pivot shafts can be decreased.

Abstract: In an electric contact material of silver matrix capable of resisting arc erosion and containing no cadmium-composite, an Ag—(SnO2+In2O3) composite containing 9˜11% of (SnO2+In2O3) or an Ag—Cu oxide, composite containing 15˜25% of Cu oxide is used. The electrical contact material has a contact resistance of 5˜60 milliohms (mohm) and an arc erosion resistance capability up to 2*103˜10*103 times provided that the Vickers hardness (Hv) of the material is 100˜150, the measured current is 1˜5 amperes, and the measured voltage is 10˜20 volts. Two electrical contacts maintain an arc erosion resisting capability at the condition of a low contact resistance when the electrical contact material is formed on a surface of a metal substrate of an electric connector.

Abstract: A chip package structure for being disposed on a carrier includes a package substrate and a chip. The package substrate includes a laminated layer, a patterned conductive layer, a solder-mask layer, at least one outer pad and a padding pattern. The patterned conductive layer is disposed on a first surface of the laminated layer and has at least one inner pad. The solder resist layer is disposed on the first surface and has at least one opening exposed the inner pad. The outer pad is disposed on the solder resist layer, located within the opening, and is connected with the inner pad. The padding pattern is disposed on the solder resist layer. A height of the padding pattern relative to the first surface is greater than that of the outer pad. The chip is located on a second surface of the laminated layer and electrically connected to the package substrate.

Abstract: A signal transmission system of a flat panel device includes an encoder, a transmitter, a receiver, and a decoder. The encoder converts a digital signal to a switch control signal. The transmitter includes 4n signal-lines for transmitting a current signal according to the switch control signal. The receiver includes 4n terminations, a plurality of terminal resistors, and a plurality of comparators. The receiver generates a group of voltage levels according to the current signal. Each comparator is coupled between any two terminations so as to generate a group of voltage differences. The decoder converts the group of voltage differences to the digital signal.

Abstract: A chip package structure includes a carrier and a chip group. The chip group includes a pair of first chips that are identical IC chips. The pair of first chips are disposed on the carrier in opposite directions and parallel to each other, and electrically connected with the carrier.