Patents by Inventor Willem Frederik Adrianus Besling

Willem Frederik Adrianus Besling has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130328142
    Abstract: Disclosed is an integrated circuit (100), comprising a semiconductor substrate (110) carrying a plurality of circuit elements; and a pressure sensor including a cavity (140) on said semiconductor substrate, said cavity comprising a pair of electrodes (120, 122) laterally separated from each other; and a flexible membrane (130) over and spatially separated from said electrodes such that said membrane interferes with a fringe field between said electrodes, said membrane comprising at least one aperture (132). A method of manufacturing such an IC is also disclosed.
    Type: Application
    Filed: June 11, 2013
    Publication date: December 12, 2013
    Inventors: Axel Nackaerts, Willem Frederik Adrianus Besling, Klaus Reimann
  • Publication number: 20130316830
    Abstract: a gaming system has a pressure measurement in the remote control (which may be the complete gaming apparatus) and this is used to derive a height of the remote control. In this way, barometric pressure measurement allows precise determination of the altitude of the game controller. The altitude information is then used to control the game.
    Type: Application
    Filed: May 20, 2013
    Publication date: November 28, 2013
    Inventors: Aliaksei Vladimirovich Sedzin, Willem Frederik Adrianus Besling
  • Publication number: 20130233086
    Abstract: A pressure sensor measures pressure by measuring the deflection of a MEMS membrane using a capacitive read-out method. There are two ways to implement the invention. One involves the use of an integrated Pirani sensor and the other involves the use of an integrated resonator, to function as a reference pressure sensor, for measuring an internal cavity pressure.
    Type: Application
    Filed: March 6, 2013
    Publication date: September 12, 2013
    Applicant: NXP B. V.
    Inventors: Willem Frederik Adrianus Besling, Martijn Goossens, Jozef Thomas Martinus van Beek, Peter Gerard Steenken, Olaf Wunnicke
  • Patent number: 8455357
    Abstract: A method of plating via hole in a substrate includes providing a substrate having a first side and a second side and a plurality of through substrate via holes; depositing a first seed layer on the first side of the substrate; applying a foil on the first seed layer of the substrate closing the first ends of the plurality of via holes; electro-chemical plating of the second side of the substrate; and removing the foil.
    Type: Grant
    Filed: September 28, 2009
    Date of Patent: June 4, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Willem Frederik Adrianus Besling, Freddy Roozeboom, Yann Pierre Roger Lamy
  • Patent number: 8445382
    Abstract: A dual damascene process for forming conductive interconnects on an integrated circuit die. The process includes providing a layer (16) of porous, ultra low-k (ULK) dielectric material in which a via opening (30) is subsequently formed. A thermally degradable polymeric (“porogen”) material (42) is applied to the side wall sidewalls of the opening (30) such that the porogen material penetrates deeply into the porous ULK dielectric material (thereby sealing the pores and increasing the density thereof). Once a conductive material (36) has been provided with the opening (30) and polished back by means of chemical mechanical polishing (CMP), the complete structure is subjected to a curing step to cause the porogen material (44) with the ULK dielectric layer (16) to decompose and evaporate, thereby restoring the porosity (and low-k value) of the dielectric layer (16). Attached are a marked-up copy of the originally filed specification and a clean substitute specification in accordance with 37 C.F.R. §§1.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: May 21, 2013
    Assignee: NXP B.V.
    Inventor: Willem Frederik Adrianus Besling
  • Publication number: 20130118265
    Abstract: A MEMS pressure sensor wherein at least one of the electrode arrangements comprises an inner electrode and an outer electrode arranged around the inner electrode. The capacitances associated with the inner electrode and the outer electrode are independently measured and can be differentially measured. This arrangement enables various different read out schemes to be implemented and also enables improved compensation for variations between devices or changes in device characteristics over time.
    Type: Application
    Filed: May 2, 2012
    Publication date: May 16, 2013
    Applicant: NXP B.V.
    Inventors: Willem Frederik Adrianus BESLING, Klaus REIMANN, Peter Gerard STEENEKEN, Olaf WUNNICKE, Reinout WOLTJER
  • Publication number: 20130122332
    Abstract: Various embodiments relate to an in-cell battery management device including: an integrated circuit (IC) including a controller, a resistive balancer, a voltage sensor, and a pressure sensor; and an IC package that encloses the IC having a hole over the pressure sensor wherein the hole allows the pressure sensor to measure pressure in a battery cell; wherein the IC package is contact with the battery cell.
    Type: Application
    Filed: November 16, 2011
    Publication date: May 16, 2013
    Applicant: NXP B.V.
    Inventors: Johannes Petrus Maria van Lammeren, Willem Frederik Adrianus Besling
  • Publication number: 20130036827
    Abstract: Various embodiments relate to a MEMS pressure sensor including: a lower electrode; a first insulating layer over the lower electrode; a second insulating layer over the first insulating layer that forms a cavity between the first and second insulating layers; an upper electrode over the second insulating layer, wherein a portion of the cavity is between the upper and lower electrodes; and a NONON pressure membrane over the upper electrode.
    Type: Application
    Filed: August 11, 2011
    Publication date: February 14, 2013
    Applicant: NXP B.V.
    Inventor: Willem Frederik Adrianus Besling
  • Patent number: 8324117
    Abstract: A method of forming a dielectric layer on a further layer of a semiconductor device is disclosed. The method comprises depositing a dielectric precursor compound and a further precursor compound over the further layer, the dielectric precursor compound comprising a metal ion from the group consisting of Yttrium and the Lanthanide series elements, and the further precursor compound comprising a metal ion from the group consisting of group IV and group V metals; and chemically converting the dielectric precursor compound and the further precursor compound into a dielectric compound and a further compound respectively, the further compound self-assembling during said conversion into a plurality of nanocluster nuclei within the dielectric layer formed from the first dielectric precursor compound. The nanoclusters may be dielectric or metallic in nature. Consequently, a dielectric layer is formed that has excellent charge trapping capabilities.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: December 4, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jinesh Balakrishna Pillai Kochupurackal, Willem Frederik Adrianus Besling, Johan Hendrik Klootwijk, Robert Adrianus Maria Wolters, Freddy Roozeboom
  • Publication number: 20120286846
    Abstract: A switching circuit employs switches operating at low on resistance and high off capacitance. In connection with various example embodiments, a switching circuit selectively couples a communication port to one of two or more internal circuits based upon a type of input at the communication port. A sensor circuit senses the type of the input and, based upon the sensed input type, actuates one or more switches in the switching circuit.
    Type: Application
    Filed: May 11, 2011
    Publication date: November 15, 2012
    Inventors: Olaf Wunnicke, Willem Frederik Adrianus Besling, Gerrit Willem den Besten, Michael Joehren, Klaus Reimann, James Raymond Spehar, Peter Gerard Steeneken
  • Publication number: 20120259188
    Abstract: Disclosed is a flexible insert (100) for placement on the human eye, comprising a light source (110) in said insert such that light emitted from the light source is shielded from the human eye upon correct placement of the insert on the human eye, a light-responsive material (120) placed in the light path of the light source, said light-responsive material emitting light upon stimulation by the light from said light source, the intensity of said stimulated emission being sensitive to a chemical interaction of the light-sensitive material with an analyte of interest, a photodetector (130) for detecting the light emitted by the light-responsive material; and a transmitter (140) coupled to the photodetector for transmitting a photodetector reading. The insert may be used in conjunction with a reader for automated monitoring of an analyte of interest such as glucose in the tear fluid of its wearer.
    Type: Application
    Filed: March 30, 2012
    Publication date: October 11, 2012
    Applicant: NXP B.V.
    Inventor: Willem Frederik Adrianus Besling
  • Publication number: 20120167659
    Abstract: Various embodiments relate to a pressure sensor and related methods of manufacturing and use. A pressure sensor may include an electrical contact included in a flexible membrane that deflects in response to a measured ambient pressure. The electrical contact may be separated from a signal path through a cavity formed using a sacrificial layer and PVD plugs. At one or more defined touch-point pressure thresholds, the membrane of the pressure sensor may deflect so that the state of contact between an electrical contact and one or more sections of a signal path may change. In some embodiments, the change of state may cause the pressure sensor to trigger an alarm in the electrical circuit. Various embodiments also enable the operation of the electrical circuit for testing and calibration through the use of one or more actuation electrode layers.
    Type: Application
    Filed: January 5, 2011
    Publication date: July 5, 2012
    Applicant: NXP B.V.
    Inventors: Willem Frederik Adrianus Besling, Peter Gerard Steeneken, Olaf Wunnicke
  • Publication number: 20120133047
    Abstract: Therefore, a method of plating wafer via holes in a wafer is provided. A substrate (200) having a first and second side and a plurality of wafer via holes (210) is provided. Each via hole comprises a first and second end extending between the first and second side. A first seed layer (220) is deposited on the first side of the 5 wafer (200). A foil (250) is applied on the first seed layer (220) of the wafer closing the first ends of the plurality of wafer via holes (210). The second side of the wafer (200) is electro-chemically plated and the foil (250) is removed.
    Type: Application
    Filed: September 29, 2009
    Publication date: May 31, 2012
    Inventors: Willem Frederik Adrianus Besling, Freddy Roozeboom, Yann Pierre Roger Lamy
  • Publication number: 20120116189
    Abstract: A battery comprises a carrier foil, with solid state battery elements spaced along the foil and mounted on opposite sides of the foil in pairs, with the battery elements of a pair mounted at the same position along the foil. The carrier foil is folded to define a meander pattern with battery element pairs that are adjacent each other along the foil arranged back to back.
    Type: Application
    Filed: November 2, 2011
    Publication date: May 10, 2012
    Applicant: NXP B.V.
    Inventors: Friso Jacobus Jedema, Willem Frederik Adrianus Besling, Freddy Roozeboom, René Wilhelmus Johannes Maria van den Boomen, Freek Egbert van Straten
  • Publication number: 20110278952
    Abstract: A charge-pump capacitive DC-DC converter (200) is disclosed, which includes a reconfigurable charge-pump capacitor array. The DC-DC converter is configured to provide a continuously variable ratio between its input voltage (Vin) and its output voltage (Vout), by means of at least one of the at least one charge-pump capacitors (C21, C22) forming the reconfigurable array being a variable capacitor. In the embodiments, the one or more variable capacitors (C21, C22) may be a ferroelectric capacitor, an anti-ferroelectric capacitor, or other ferrioc capacitor. The DC-DC converter (200) may provide a bias circuit to the capacitor or capacitors, and may further provide a control loop (220, 230). Alternatively, the capacitor may provide a degree of self-control.
    Type: Application
    Filed: October 28, 2009
    Publication date: November 17, 2011
    Applicant: NXP B.V.
    Inventors: Klaus Reimann, Willem Frederik Adrianus Besling, Hendrik Johannes Bergveld, Pavel Novoselov
  • Publication number: 20110272786
    Abstract: An energy storage device (300), the device (300) comprising a substrate (102), a steric structure (104) formed on and/or in a main surface (106) of the substrate (102), a current collector stack (202) formed on the steric structure (104), and an electric storage stack (302) formed on the current collector stack (202), wherein side walls (108) of the steric structure (104) and the main surface (106) of the substrate (102) enclose an acute angle of more than 80 degrees.
    Type: Application
    Filed: September 25, 2009
    Publication date: November 10, 2011
    Applicant: NXP B.V.
    Inventors: Willem Frederik Adrianus Besling, Rogier Adrianus Henrica Niessen, Johan Hendrik Klootwijk, Nynke Verhaegh, Petrus Henricus Laurentius Notten, Marcel Mulder
  • Publication number: 20110183186
    Abstract: The present invention relates to a method of manufacturing a solid-state battery with a high flexibility. The method comprises the steps of: forming an arrangement of battery cells (2) on a first substrate layer and providing a barrier layer (5) between the battery cells and the first substrate layer, applying on the arrangement of battery cells on the side not covered by the first substrate layer a second substrate layer (13), and removing the first substrate layer completely from the barrier layer, applying on the barrier layer a third substrate layer (14). The present invention further refers to the solid-state battery manufactured according to the method, as well as to a device, including the solid-state battery.
    Type: Application
    Filed: September 18, 2009
    Publication date: July 28, 2011
    Applicants: NXP B.V., KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Johan Hendrik Klootwijk, Rogier Adrianus Henrica Niessen, Petrus Henricus Laurentius Notten, Nynke Verhaegh, Willem Frederik Adrianus Besling
  • Publication number: 20110163088
    Abstract: The invention relates to a token, to an integrated circuit comprising the token, to a method of randomizing the token and a system for randomizing the token. The token comprises a physical unclonable function and comprising probing means for probing the physical unclonable function. The physical unclonable function comprises a capacitor comprising a dielectric medium being arranged at least partially between the electrodes of the capacitor. The dielectric medium is configured for contributing to a capacitance value of the capacitor and comprises conducting particles substantially randomly dispersed in the dielectric medium. The conducting particles comprise a phase changeable material being changeable between a first structural state having a first conductivity and a second structural state having a second conductivity different from the first conductivity.
    Type: Application
    Filed: December 17, 2010
    Publication date: July 7, 2011
    Applicant: NXP B.V.
    Inventors: Willem Frederik Adrianus BESLING, Jinesh Balakrishna Pillai KOCHUPURACKAL
  • Publication number: 20110101471
    Abstract: A method of forming a dielectric layer on a further layer of a semiconductor device is disclosed. The method comprises depositing a dielectric precursor compound and a further precursor compound over the further layer, the dielectric precursor compound comprising a metal ion from the group consisting of Yttrium and the Lanthanide series elements, and the further precursor compound comprising a metal ion from the group consisting of group IV and group V metals; and chemically converting the dielectric precursor compound and the further precursor compound into a dielectric compound and a further compound respectively, the further compound self-assembling during said conversion into a plurality of nanocluster nuclei within the dielectric layer formed from the first dielectric precursor compound. The nanoclusters may be dielectric or metallic in nature. Consequently, a dielectric layer is formed that has excellent charge trapping capabilities.
    Type: Application
    Filed: April 22, 2009
    Publication date: May 5, 2011
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jinesh Balakrishna Pillai Kochupurackal, Willem Frederik Adrianus Besling, Johan Hendrik Klootwijk, Robert Adrianus Maria Wolters, Freddy Roozeboom
  • Publication number: 20090321945
    Abstract: A dual damascene process for forming conductive interconnects on an integrated circuit die. The process comprises providing a layer (16) of porous, ultra low-k (ULK) dielectric material in which a via opening (30) is subsequently formed. A thermally degradable polymeric (“porogen”) material (42) is applied to the side walls of the opening (30) such that the porogen material penetrates deeply into the porous ULK dielectric material (thereby sealing the pores and increasing the density thereof). Once a conductive material (36) has been provided with the opening (30) and polished back by means of chemical mechanical polishing (CMP), the complete structure is subjected to a curing step to cause the porogen material (44) with the ULK dielectric layer (16) to decompose and evaporate, thereby restoring the porosity (and low-k value) of the dielectric layer (16).
    Type: Application
    Filed: March 20, 2006
    Publication date: December 31, 2009
    Applicant: NXP B.V.
    Inventor: Willem Frederik Adrianus Besling