Abstract: A branch metric calculation unit calculates a set of branch metric values for subsequent samples of the sampled input signal. Each of the set of branch metric values is an indication for the likelihood that an amplitude value of a sample corresponds to a particular state, a state being defined as a sequence of n-ary digits. A delay unit, which forms part of a delay chain of delay units, includes a first delay unit of the delay chain which is coupled to the branch metric calculation unit. A path metric calculation chain of path metric calculation units includes one or more path metric calculation units having first inputs coupled to a delay unit and second inputs coupled to a preceding path metric calculation unit. The path metric calculation unit calculates the path metric values from the branch metric values, a path metric value being on indication for the likelihood that a sequence of samples corresponds to a sequence of states.

Abstract: The present invention relates to a method and system for multi-dimensionally coding and/or decoding an information to/from a lattice structure representing bit positions of said coded information in at least two dimensions. Encoding and/or decoding is performed by using a close-packed lattice structure, preferably a quasi-hexagonal lattice structure. In particular, at least partial quasi-hexagonal clusters consisting of one central bit and a plurality of nearest neighboring bits can be defined, and a code constraint can be applied such that for each of said at least partial quasi-hexagonal clusters a predetermined minimum number of said nearest neighboring bits are of the same bit state as said central bit. Thereby, intersymbol interferences can be minimized at a high code efficiency.

Abstract: The present invention relates to a method and system for multi-dimensionally coding and/or decoding an information to/from a lattice structure representing bit positions of said coded information in at least two dimensions. Encoding and/or decoding is performed by using a close-packed lattice structure, preferably a quasi-hexagonal lattice structure. In particular, at least partial quasi-hexagonal clusters consisting of one central bit and a plurality of nearest neighboring bits can be defined, and a code constraint can be applied such that for each of said at least partial quasi-hexagonal clusters a predetermined minimum number of said nearest neighboring bits are of the same bit state as said central bit. Thereby, intersymbol interferences can be minimized at a high code efficiency.

Abstract: The invention relates to a method for encoding a stream of bits of a signal relating to a binary source into a stream of bits of a signal relating to a binary channel, the binary source comprising a main source and a secondary source, the main source being encoded in a main channel and the secondary source being encoded in a secondary channel, the secondary channel being embedded in the main channel in order to form the binary channel, wherein the binary channel is divided in blocks, each block comprising a number of user bits and that in at least one of the blocks the secondary channel also is used for encoding non-user bits.

Abstract: The invention relates to a method and device for adding or extracting a secondary information signal to/from a runlength-limited code sequence. A polarity of a runlength at a first predetermined position of the runlength-limited code sequence is detected and a parameter reflecting the degree of freedom that is present in the runlength-limited channel code, e.g. the selection of a merging bit pattern in the CD-standard, is set on the basis of the detected polarity so as to obtain a predetermined polarity of a runlength at a subsequent second predetermined position of the runlength-limited code sequence. The predetermined polarity then corresponds to a binary value of the secondary information. Thus, a side-channel with a small capacity is provided, which is positioned very close to the physical channel such that the secondary information is hard to be detected from the EFM bit stream. Therefore, the side-channel can be used as a hidden channel for copy protection purposes.

Abstract: Domain bloom, also known as asymmetry, is a systematic imperfection caused by the writing process in optical discs. During disc read-out it causes signal transitions to shift with respect to their nominal positions. State-of-the-art equalization and detection methods suffer significant performance losses if directly applied to replay signals with asymmetry. A non-linear model for replay signals with asymmetry is used for new equalization and detection techniques that are applicable to signals in the presence of asymmetry. Modifications are described of the threshold bit-detector, the run-length pushback bit-detector, and the PRML sequence detector, which have significant performance benefits. These benefits come at almost no additional cost with respect to existing detectors.

Abstract: A circuit arrangement including means for determining a slicer level from incoming signal levels for slicing the incoming signal levels on the basis of the slicer level thus determined, includes a first and a second register circuit, which register circuits are connected to an output of a discriminator circuit. The discriminator circuit compares an incoming signal level with a set discrimination level and is adapted to apply an incoming signal level to the first register circuit if the incoming signal level is higher than the set discrimination level and to apply and incoming signal level to the second register circuit if the incoming signal level is lower than the set termination level. The first and the second register circuit are adapted to determine a register value of a least two different incoming signal levels consecutively applied to the register circuit. The circuit supplies a signal having a level which is a value determine from register values determined by the first and second register circuit.

Abstract: A detector (30) is described for detecting a digital signal (Bio) out of an input information signal (Ai) which represents a runlength limited sequence, the runlength having a minimal value m. The detector (30) generates (60, 62) a preliminary binary signal (Bi) out of the input information signal (Ai). A composed sequence of subsequent bits is identified (86) within the preliminary binary signal (Bi) which subsequently includes at least a first neighboring bit of a run of length greater or equal than m+1, one or more further runs of length m and at least a second neighboring bit of a run of length greater or equal than intl. A set of sequences are generated (84, 86). These sequences can be obtained from said composed sequence by changing polarities of binary values within the composed sequence without violating the runlength constraint. The set includes the composed sequence obtained from the preliminary binary signal.

Abstract: The invention relates to a method for generating a primary binary signal having a predetermined spectral shape in a predetermined frequency range, in particular having a notch in the power spectrum in a predetermined frequency range. In order to avoid crosstalk between a primary binary signal and a secondary binary signal it is proposed according to the invention that data-words are modulated into channel-words forming the channel bitstream of the primary binary signal and that the modulation of the data-words is chosen such that the predetermined spectral shape of the channel bitstream of the primary binary signal is achieved by using an evaluation criterion based on a spectral weight function the shape of which is tailored to the spectral extent of the channel bitstream of a secondary binary signal.

Abstract: The invention relates to a method of converting a stream of databits of a binary information signal into a stream of databits of a constrained binary channel signal. This stream of databits of the binary information signal is divided into n-bit information words. These information words are converted into m1-bit channel words, in accordance with a channel code C1, or m2-bit channel words, in accordance with a channel code C2, where m1, m2 and n are integers for which it holds that m2>m1≧n. The m2-bit channel word is chosen from of at least two m2-bit channel words, at least two of which have opposite parities, the concatenated m1-bit channel words and the m2-bit channel words complying with a runlength constraint of the binary channel signal.

Abstract: A device and associated method for processing a digital information signal from a channel signal. The digital information signal is runlength limited with one or more constraints. The device comprises receiving means for receiving the channel signal and means for comparing a detected runlength with a predetermined value indicative of a minimum runlength constraint or a maximum runlength constraint of the channel signal and for generating a control signal when the detected runlength violates said constraint. The device further comprises substitute means for in response to the control signal deleting or inserting an element in the channel signal.

Abstract: A partial response maximum likelihood (PRML) bit detection apparatus is disclosed for deriving a bit sequence (xk) from an input information signal. The apparatus comprises input means for receiving the input information signal. The apparatus further comprises sampling means for sampling the input information signal at sampling instants so as to obtain samples (zk) of the information signal at said sampling instants. The apparatus also comprises calculating means (50, 70) for (a) calculating (50) at a sampling instant ti for one or more of a plurality of states sj (Sa, Sb, Sc) at said sampling instant, an optimum path metric value PM(sj,ti) and for determining for said one or more states a best predecessor state at the directly preceding sampling instant ti−1, a state at said sampling instant identifying a sequence of n subsequent bits.

Abstract: The invention relates to a method for generating a primary binary signal having a predetermined spectral shape in a predetermined frequency range, in particular having a notch in the power spectrum in a predetermined frequency range. In order to avoid crosstalk between a primary binary signal and a secondary binary signal it is proposed according to the invention that data-words are modulated into channel-words forming the channel bitstream of the primary binary signal and that the modulation of the data-words is chosen such that the predetermined spectral shape of the channel bitstream of the primary binary signal is achieved by using an evaluation criterion based on a spectral weight function the shape of which is tailored to the spectral extent of the channel bitstream of a secondary binary signal.

Abstract: The signal processor (5) for converting a read signal into a bit-stream, and correcting runs in that bit-stream which violate a minimum run length constraint. The signal processor (5) comprises a preliminary detector (51) able to convert a read signal read out from a recording medium (1) into a bit-stream. The signal processor (5) further comprises a violation detector (52) able to detect a first violating run Rv violating a minimum run length constraint in the bit-stream. Also, the signal processor (5) comprises a correction means (53) able to correct a first violating run Rv by toggling a bit chosen from a first bit in a first direction, and a second bit in a second direction. The correction means (53) is further able to correct subsequent violating runs Rv that are created as a result of the correction of the first violating run Rv. The correction means (53) may be able to use tangential tilt information to decide in which direction the corrections are made.

Abstract: The invention relates to methods and devices for converting a stream of data bits of a binary information signal 2 into a stream of data bits of a constrained binary channel signal 3 using multiple channel codes Cst, Cpc. Apart from a standard code Cst, that is designed for a high coding rate, a parity-check enabling code Cpc is used that allows realization of a certain, predefined parity-check constraint imposed on the constrained binary channel signal 3. This parity-check constraint is related to a predetermined error event of the channel. The amount of use of the parity-check enabling code Cpc is dependent on the need for preventing the certain error event. Also another channel code Csub can be used in this method in order to realise DC-control.

Abstract: The invention relates to a method of converting a stream of databits of a binary information signal into a stream of databits of a constrained binary channel signal. This stream of databits of the binary information signal is divided into n-bit information words. These information words are converted into m1-bit channel words, in accordance with a channel code C1, or m2-bit channel words, in accordance with a channel code C2, where m1, m2 and n are integers for which it holds that m2>m1≧n. The m2-bit channel word is chosen from of at least two m2-bit channel words, at least two of which have opposite parities, the concatenated m1-bit channel words and the m2-bit channel words complying with a runlength constraint of the binary channel signal.

Abstract: A method of converting a stream of databits of a binary information signal into a stream of databits of a constrained binary channel signal, a device for encoding, a signal, a record carrier, a method for decoding, and a device for decoding. The signal is constructed by repetitively or alternately using channel codes C1 and C2. Since two channel words with opposite parities are available in the channel code C2 for each information word, and the same state is established, predetermined properties of the constrained binary channel signal can be influenced. Since the method further comprises the step of substituting, in dependence upon a value of a predetermined property of the binary channel signal, a channel word for a substitute channel word, wherein the substituted channel word and the substitute channel word establish the same state, predetermined properties of the constrained binary channel signal can be further influenced.

Abstract: The invention relates to a method and device for encoding information words and a method and device for decoding as well as a storage medium for storing and a signal comprising such encoded information words. In order to improve the properties of a burst-indicator subcode it is proposed to encode the bits of a burst-indicator subcode byte into different channel words. Thus, these bits are spread over an entire frame of encoded data improving burst error detecting and correcting properties.

Abstract: A method of converting a stream of databits of a binary information signal into a stream of databits of a constrained binary channel signal. This stream of databits of the information signal is divided into n-bit information words. These information words are converted into m1-bit channel words in accordance with a channel code C1, or m2-bit channel words in accordance with a channel code C2, where m1, m2, and n are intergers such that m2>m1≧n. The m2-bit channel word is chosen from of at least two m2-bit channel words, at least two of which have opposite parities. The concatenated m1-bit channel words and the m2-bit channel words comply with a runlength constraint of the constrained binary channel signal. The constrained binary channel signal may be recorded on a record carrier.

Abstract: The invention relates to a method of storing a number of data bits of a secondary channel (30) in the frame of a main channel (20) and to a method of decoding a stream of bits relating to a secondary channel (30) embedded in the frames of a main channel (20) into a stream of data bits (62). In order to enable a certain synchronization and to guarantee a fixed amount of storage capacity in the secondary channel as well as to be able to correct deletions or insertions of bits in the secondary channel it is proposed according to the invention to form a secondary frame (11) having a fixed number of frame bits, to fill a fixed part of the secondary frame (11) with data bits (113), an end-bit (114) set to a first bit-value and, if necessary, with filling bits (115) set to a second bit-value, to encode the secondary frame (11) producing encoded data bits (113) and parity bits (112), which are finally embedded in the frame of the main channel (20).