Patents by Inventor William G. Easter

William G. Easter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020090889
    Abstract: The present invention provides a polishing apparatus for use in polishing a substrate, including: (1) A polishing platen, and (2) a rotational strain sensor coupled to the polishing platen configured to detect a change in a rotational strain of the polishing platen during a polishing process. In addition, the present invention provides an accompanying method of detecting an endpoint during the polishing process by detecting a change between a first rotational strain and a second rotational strain with the rotational strain sensor.
    Type: Application
    Filed: January 10, 2001
    Publication date: July 11, 2002
    Inventors: Annette M. Crevasse, William G. Easter, John A. Maze, Frank Miceli
  • Publication number: 20020074016
    Abstract: The present invention provides a semiconductor wafer cleaning brush assembly having an arbor with: (1) an expandable member configured to have a non-expanded position and an expanded position, and (2) a cleaning brush, locatable about the expandable member, having an inner diameter greater than an outer diameter of the expandable member in the non-expanded position and less than an outer diameter of the expandable member in the expanded position. The present invention further provides a method of replacing the cleaning brush of the assembly, and a method of cleaning a semiconductor wafer with such an assembly.
    Type: Application
    Filed: December 15, 2000
    Publication date: June 20, 2002
    Inventors: Annette M. Crevasse, William G. Easter, John A. Maze, Frank Miceli
  • Patent number: 6402599
    Abstract: The present invention provides a slurry delivery system comprising a slurry conduit couplable to a wall of the slurry tank, and configured to receive a slurry therein and deliver a stream of the slurry against an inner wall of the slurry tank. Thus, the system inhibits drying of a slurry within the slurry tank and minimizes agglomeration on the sides of the slurry tank that results from slurry drying on the sides of the slurry tank's wall when the slurry level within the tank rises and falls. This minimization of agglomeration reduces the agglomerates within the slurry supply, which in turn, reduces the number of contaminants and scratches affecting the overall quality of the semiconductor wafer substrate.
    Type: Grant
    Filed: May 3, 2000
    Date of Patent: June 11, 2002
    Assignee: Agere Systems Guardian Corp.
    Inventors: Annette M. Crevasse, William G. Easter, John A. Maze, Frank Miceli, Craig R. Zavilla
  • Publication number: 20020052115
    Abstract: The present invention, in one embodiment, provides a method for eliminating agglomerate particles in a polishing slurry. In this particular embodiment, the method is directed to reducing agglomeration of slurry particles within a waste slurry passing through a slurry system drain. The method comprises conveying the waste slurry to the drain, wherein the waste slurry may form an agglomerate having an agglomerate particle size. The method further comprises subjecting the waste slurry to energy emanating from an energy source. The energy source thereby transfers energy to the waste slurry to substantially reduce the agglomerate particle size. Substantially reduce means that the agglomerate is size is reduced such that the waste slurry is free to flow through the drain.
    Type: Application
    Filed: November 14, 2001
    Publication date: May 2, 2002
    Applicant: Lucent Technologies Inc.
    Inventors: Annette M. Crevasse, William G. Easter, John A. Maze, Sailesh M. Merchant, Frank Miceli
  • Patent number: 6373945
    Abstract: The present invention provides a terminal block extension for use with a terminal block having electrical contacts and that is electrically coupled to a wiring system. In one embodiment, the terminal block comprises an insulating body having first and second coupling ends and a first conductor disposed within the insulating body having first and second conducting ends. The first coupling end is configured to mechanically couple to the terminal block. The second coupling end is configured to mechanically couple to another terminal block extension. The first conducting end is configured to couple to one of the electrical contacts. The second conducting end is configured to receive a first wire of the wiring system and cooperatively engage a first coupling end of another terminal block extension.
    Type: Grant
    Filed: October 13, 1999
    Date of Patent: April 16, 2002
    Assignee: Agere Systems Guardian Corp.
    Inventors: William G. Easter, Dale D. Evans, John A. Maze, Frank Miceli, Jose Omar Rodriguez
  • Patent number: 6368190
    Abstract: An apparatus for the electrochemical mechanical planarization of semiconductor wafers includes a rotatable platen and a polishing pad disposed on the platen. The polishing pad has top and bottom surfaces. A wafer carrier is disposed proximate to the platen for pressing a semiconductor wafer against the platen. At least one carrier electrode is disposed on the carrier and is adapted to electrically connect an electrically conducting surface of the semiconductor wafer to an electrolytic circuit including a potential source. A platen electrode is operatively connected to the platen. The platen electrode electrically connects an electrolytic solution disposed on the polishing pad to the potential source and to the electrode on the wafer carrier to complete the electrolytic circuit. The platen electrode has a substantially circular circumference for discharging electrons into the electrolytic solution. The platen electrode is substantially devoid of portions under the bottom surface of the polishing pad.
    Type: Grant
    Filed: January 26, 2000
    Date of Patent: April 9, 2002
    Assignee: Agere Systems Guardian Corp.
    Inventors: William G. Easter, John A. Maze, III, Frank Miceli
  • Patent number: 6355184
    Abstract: The present invention, in one embodiment, provides a method for eliminating agglomerate particles in a polishing slurry. In this particular embodiment, the method is directed to reducing agglomeration of slurry particles within a waste slurry passing through a slurry system drain. The method comprises conveying the waste slurry to the drain, wherein the waste slurry may form an agglomerate having an agglomerate particle size. The method further comprises subjecting the waste slurry to energy emanating from an energy source. The energy source thereby transfers energy to the waste slurry to substantially reduce the agglomerate particle size. Substantially reduce means that the agglomerate is size is reduced such that the waste slurry is free to flow through the drain.
    Type: Grant
    Filed: October 26, 1999
    Date of Patent: March 12, 2002
    Assignee: Agere Systems Guardian Corp.
    Inventors: Annette M. Crevasse, William G. Easter, John A. Maze, Sailesh M. Merchant, Frank Miceli
  • Patent number: 6354928
    Abstract: The present invention provides a polishing apparatus comprising a carrier head having a periphery, a first region, a carrier ring, and a second region. The carrier ring is coupled to the periphery. The carrier ring and carrier head are configured to cooperatively receive an object to be polished. The first region is associated with the carrier head and is capable of manifesting a polarity proximate the carrier ring. The second region is associated with the carrier ring and is capable of manifesting the polarity proximate the first region. The first and second regions have like polarities that create a repelling force between the carrier head and the carrier ring.
    Type: Grant
    Filed: April 21, 2000
    Date of Patent: March 12, 2002
    Assignee: Agere Systems Guardian Corp.
    Inventors: Annette M. Crevasse, William G. Easter, John A. Maze, Frank Miceli
  • Patent number: 6299519
    Abstract: An apparatus and method for removing a polishing pad from a platen during a CMP process is disclosed. The invention facilitates the removal of a polishing pad from a platen by providing a polishing pad having at least one protuberance portion extending from the main portion of the pad such that the polishing pad may be removed manually or with the assistance of a device by engaging the protuberance portion.
    Type: Grant
    Filed: August 3, 1999
    Date of Patent: October 9, 2001
    Assignee: Agere Systems Guardian Corp.
    Inventors: William G. Easter, John A. Maze, III, Frank Micelli
  • Patent number: 6288648
    Abstract: The present invention provides a method of manufacturing an integrated circuit using a conditioning wheel status indicator with a polishing apparatus having a conditioning wheel and a polishing pad. In one embodiment, the conditioning wheel status indicator comprises a drive motor, an ammeter, and an indicator. The drive motor is coupled to the conditioning wheel and configured to rotate the conditioning wheel against the polishing pad at a prescribed rotation rate. The ammeter is coupled to the drive motor and configured to measure a current of the drive motor. The current registered is a nominal current when the conditioning wheel is new. The indicator is coupled to the ammeter and configured to register an excess current that exceeds the nominal current when the conditioning wheel has incurred an undesirable degree of wear.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: September 11, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: William G. Easter, John A. Maze, Frank Miceli, Yifeng W. Yan
  • Patent number: 6281129
    Abstract: The present invention provides a method of manufacturing a semiconductor device using a polishing apparatus having a polishing pad conditioning wheel. In one embodiment, the polishing pad conditioning wheel comprises a conditioning head, a setting alloy, an abrasive material, and a corrosion resistant coating. The conditioning head has opposing first and second faces with the first face being coupleable to the polishing apparatus. The setting alloy is coupled to the conditioning head at the second face, and the abrasive material is embedded in the setting alloy, which is substantially covered by the corrosion resistant coating.
    Type: Grant
    Filed: September 20, 1999
    Date of Patent: August 28, 2001
    Assignee: Agere Systems Guardian Corp.
    Inventors: William G. Easter, John A. Maze, Sailesh M. Merchant
  • Patent number: 6264536
    Abstract: A technique for reducing corrosion over a steel platen used during semiconductor wafer polishing. An anodic metal plate is attached to the steel platen to cathodically protect the surface of the steel platen via an electrochemical process. This cathodic protection inhibits the formation of localized anodic sections formed on the steel platen. Since the steel platen now has fewer, if any, localized anodic sections present in the prior art, the steel platen is less likely to corrode. The anodic metal may be made of an inexpensive metal material such as magnesium, aluminum, or some other appropriate metal. The metal plate is also replaceable in nature, i.e., it may be replaced after the metal plate has been corroded.
    Type: Grant
    Filed: February 1, 2000
    Date of Patent: July 24, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: Annette M. Crevasse, William G. Easter, John A. Maze, III, Sailesh M. Merchant, Frank Miceli
  • Patent number: 6206770
    Abstract: The present invention provides a method of manufacturing an integrated circuit using a polishing head in a semiconductor wafer polishing apparatus. The polishing head preferably comprises a wafer carrier head and a protuberance coupled to the wafer carrier head. The wafer carrier head has a back surface that contacts the wafer when it is positioned within the carrier head and a carrier ring depends from the carrier head to form an annulus. The annulus has an inner surface, which is typically an inner surface of the carrier ring, and it forms a cavity with the wafer carrier head that is configured to receive a semiconductor wafer therein. The protuberance is located within the annulus proximate the inner surface and is configured to cooperate with a concavity in a periphery of the semiconductor wafer. This cooperation prevents the semiconductor wafer from rotating with respect to the wafer carrier head during polishing of the semiconductor wafer.
    Type: Grant
    Filed: August 18, 1999
    Date of Patent: March 27, 2001
    Assignee: Lucent Technologies Inc.
    Inventors: William G. Easter, John A. Maze, Frank Miceli
  • Patent number: 6121142
    Abstract: The present invention provides, for use with a polishing apparatus, a carrier structure comprising a first magnetic body, a second magnetic body, and a retaining ring. In one advantageous embodiment, the first magnetic body has a first side coupleable to the polishing apparatus, and a second side. The second magnetic body has a first side proximate and juxtaposed the second side of the first magnetic body. The second magnetic body is coupled to the first magnetic body to allow undulant motion with respect to the first magnetic body. The first and second magnetic bodies are configured to have a like polarity. The retaining ring is coupled to the second side of the second magnetic body and forms a retaining cavity configured to receive an object to be polished. Thus, the first and second magnetic bodies may cooperate to form a frictionless gimbal.
    Type: Grant
    Filed: September 14, 1998
    Date of Patent: September 19, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Annette M. Crevasse, William G. Easter, John A. Maze
  • Patent number: 6093086
    Abstract: The present invention provides a method of manufacturing an integrated circuit using a polishing head release mechanism. The polishing head release mechanism is for use with a polishing tool having a polishing head and a polishing platen. In one embodiment, the polishing head release mechanism comprises a platen protective shield, shield-to-platen retainers, and retaining clamps. The shield-to-platen retainers are configured to removably couple the platen protective shield to the polishing platen. The retaining clamps are couplable to the platen protective shield and configured to couple the polishing head to the platen protective shield.
    Type: Grant
    Filed: September 24, 1999
    Date of Patent: July 25, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: William G. Easter, John A. Maze, Frank Miceli, Jose O. Rodriguez
  • Patent number: 6059638
    Abstract: The present invention provides a polishing apparatus having a drive motor, a carrier head and a polishing platen with a magnetic region formed in either the carrier head or the polishing platen. The magnetic region is configured to create an attracting force between the carrier head and the polishing platen. The drive motor is capable of producing a rotational polishing force. The carrier head is configured to retain an object to be polished, while the polishing platen has a polishing pad and is juxtaposed the carrier head.
    Type: Grant
    Filed: January 25, 1999
    Date of Patent: May 9, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Annette M. Crevasse, William G. Easter, John A. Maze, Frank Micelli, Jose O. Rodriguez
  • Patent number: 6024829
    Abstract: The present invention, in one embodiment, provides a method for eliminating agglomerate particles in a polishing slurry. In this particular embodiment, the method includes transferring a slurry that has a design particle size from a slurry source to an energy source. In many instances, the slurry forms an agglomerate that has an agglomerated particle size, which is substantially larger than the design particle size. This larger particle size is highly undesirable because it can damage the semiconductor wafer surface as it is polished. The method further includes subjecting the agglomerate to energy, such as an ultra sonic wave emanating from the energy source, and transferring energy from the energy source to the slurry to reduce the agglomerated particle size to substantially the design particle size.
    Type: Grant
    Filed: May 21, 1998
    Date of Patent: February 15, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: William G. Easter, John A. Maze
  • Patent number: 5478758
    Abstract: A method of making a gettering structure for dielectrically isolated wafer structures, such as bonded wafers. A getterer layer is deposited over the wafer having semiconductor regions isolated from each other by trenches. The polysilicon is etched back leaving the polysilicon on the sides of the regions. The polysilicon may be doped. The polysilicon is oxidized and a second layer of polysilicon may be deposited to fill voids in the trenches.
    Type: Grant
    Filed: June 3, 1994
    Date of Patent: December 26, 1995
    Assignee: AT&T Corp.
    Inventor: William G. Easter
  • Patent number: 5366924
    Abstract: A process for planarizing a bonded wafer. The wafer has a layer of exposed oxide thereon which acts as a reference for the grinding and polishing of the wafer. The resulting ground and polished wafer has a thinned, substantially planar, working layer for subsequent fabrication of transistors, etc.
    Type: Grant
    Filed: March 16, 1992
    Date of Patent: November 22, 1994
    Assignee: AT&T Bell Laboratories
    Inventors: William G. Easter, Richard H. Shanaman, III
  • Patent number: H1174
    Abstract: A process for forming a dielectrically isolated wafer is disclosed. In particular, the conventional process is altered to replace the step of growing the thick polysilicon handle layer with the steps of growing a relatively thin conformal coating layer and bonding a single crystal wafer thereto. The wafer will become the substrate of the final device structure. The process of bonding is considered to be more efficient and economical than the prior art polysilicon growth process. Additionally, the tub structures of the wafer bonding process may be exposed to a somewhat lower temperature (for bonding) for shorter period of time than the tub regions of the conventional thick polysilicon DI structures. Therefore, the tub regions will exhibit superior qualities (e.g., less stress, fewer crystal defects) when compared with those formed with the conventional polysilicon growth technique.
    Type: Grant
    Filed: August 7, 1991
    Date of Patent: April 6, 1993
    Assignee: American Telephone and Telegraph Company
    Inventors: William G. Easter, Richard H. Shanaman, III