Patents by Inventor William J. Borland

William J. Borland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8921963
    Abstract: A photovoltaic cell such as a solar cell is disclosed. The cell comprises (a) a semiconductor substrate having a front surface, (b) one or more anti-reflection coating layers on the front surface of the semiconductor substrate, (c) a plurality of silver-containing fingers in contact with the one or more anti-reflection coating layers and in electrical contact with the semiconductor substrate; and (d) one or more base metal containing buss bars each in contact with the one or more anti-reflection coating layers and the silver-containing fingers. The base metal may be selected from one or more of copper, nickel, lead, tin, iron, indium, zinc, bismuth and cobalt. Methods for making photovoltaic cells with base metal containing buss bars are also disclosed.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: December 30, 2014
    Assignee: E I du Pont de Nemours and Company
    Inventors: William J Borland, Alan Frederick Carroll, Barry Edward Taylor
  • Patent number: 8875363
    Abstract: Disclosed are methods of making a dielectric on a metal foil, and a method of making a large area capacitor that includes a dielectric on a metal foil. A first dielectric layer is formed over the metal foil by physical vapor deposition, and a dielectric precursor layer is formed over the first dielectric layer by chemical solution deposition. The metal foil, first dielectric layer and dielectric precursor layer are prefired at a prefiring temperature in the range of 350 to 650° C. The prefired dielectric precursor layer, the first dielectric layer and the base metal foil are subsequently fired at a firing temperature in the range of 700 to 1200° C.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: November 4, 2014
    Assignee: CDA Processing Limited Liability Company
    Inventors: Seigi Suh, Esther Kim, William J. Borland, Christopher Allen Gross, Omega N. Mack, Timothy R. Overcash
  • Patent number: 8840701
    Abstract: Disclosed are methods of making multi-element, finely divided, metal powders containing one or more reactive metals and one or more non-reactive metals. Reactive metals include metals or mixtures thereof from titanium (Ti), zirconium (Zr), hafnium (Hf), tantalum (Ta), niobium (Nb), vanadium (V), nickel (Ni), cobalt (Co), molybdenum (Mo), manganese (Mn), and iron (Fe). Non-reactive metals include metals or mixtures such as silver (Ag), tin (Sn), bismuth (Bi), lead (Pb), antimony (Sb), zinc (Zn), germanium (Ge), phosphorus (P), gold (Au), cadmium (Cd), berrylium (Be), tellurium (Te).
    Type: Grant
    Filed: August 12, 2009
    Date of Patent: September 23, 2014
    Assignee: E I du Pont de Nemours and Company
    Inventors: William J. Borland, Howard David Glicksman
  • Publication number: 20140174527
    Abstract: A photovoltaic cell such as a solar cell is disclosed. The cell comprises (a) a semiconductor substrate having a front surface, (b) one or more anti-reflection coating layers on the front surface of the semiconductor substrate, (c) a plurality of silver-containing fingers in contact with the one or more anti-reflection coating layers and in electrical contact with the semiconductor substrate; and (d) one or more base metal containing buss bars each in contact with the one or more anti-reflection coating layers and the silver-containing fingers. The base metal may be selected from one or more of copper, nickel, lead, tin, iron, indium, zinc, bismuth and cobalt. Methods for making protovoltaic cells with base metal containing buss bars are also disclosed.
    Type: Application
    Filed: February 27, 2014
    Publication date: June 26, 2014
    Applicant: E I DU Pont De Nemours And Company
    Inventors: WILLIAM J BORLAND, ALAN FREDERICK CARROLL, BARRY EDWARD TAYLOR
  • Patent number: 8710355
    Abstract: Photovoltaic cells, including silicon solar cells, and methods and compositions for making such photovoltaic cells are provided. A silicon substrate having p-type silicon base and an n-type silicon layer is provided with a silicon nitride layer, an exchange metal in contact with the silicon nitride layer, and a non-exchange metal in contact with the exchange metal. This assembly is fired to form a metal silicide contact on the silicon substrate, and a conductive metal electrode in contact with the metal silicide contact. The exchange metal is from nickel, cobalt, iron, manganese, molybdenum, and combinations thereof, and the non-exchange metal is from silver, copper, tin, bismuth, lead, antimony, arsenic, indium, zinc, germanium, gold, cadmium, beryllium, and combinations thereof.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: April 29, 2014
    Assignees: E I du Pont de Nemours and Company
    Inventors: William J. Borland, Howard David Glicksman, Jon-Paul Maria
  • Patent number: 8697476
    Abstract: A photovoltaic cell such as a solar cell is disclosed. The cell comprises (a) a semiconductor substrate having a front surface, (b) one or more anti-reflection coating layers on the front surface of the semiconductor substrate, (c) a plurality of silver-containing fingers in contact with the one or more anti-reflection coating layers and in electrical contact with the semiconductor substrate; and (d) one or more base metal containing buss bars each in contact with the one or more anti-reflection coating layers and the silver-containing fingers. The base metal may be selected from one or more of copper, nickel, lead, tin, iron, indium, zinc, bismuth and cobalt. Methods for making protovoltaic cells with base metal containing buss bars are also disclosed.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: April 15, 2014
    Assignee: E I du Pont de Nemours and Company
    Inventors: William J. Borland, Alan Frederick Carroll, Barry Edward Taylor
  • Patent number: 8564967
    Abstract: A printed wiring board semiconductor package or PWB power core comprising singulated capacitors embedded on multiple layers of the printed wiring board semiconductor package wherein at least a part of each embedded capacitor lies within the die shadow and wherein the embedded, singulated capacitors comprise at least a first electrode and a second electrode. The first electrodes and second electrodes of the embedded singulated capacitors are interconnected to the Vcc (power) terminals and the Vss (ground) terminals respectively of a semiconductor device. The size of the embedded capacitors are varied to produce different self-resonant frequencies and their vertical placements within the PWB semiconductor package are used to control the inherent inductance of the capacitor-semiconductor electrical interconnections so that customized resonant frequencies of the embedded capacitors can be achieved with low impedance.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: October 22, 2013
    Assignee: CDA Processing Limited Liability Company
    Inventors: Daniel Irwin Amey, Jr., William J. Borland
  • Publication number: 20130000709
    Abstract: Photovoltaic cells including silicon solar cells are provided. A silicon substrate having an n-type silicon layer is provided with a silicon nitride layer, a reactive metal in contact with said silicon nitride layer, and a non-reactive metal in contact with the reactive metal. This assembly is fired to form a low Shottky barrier height contact comprised of metal nitride, and optionally metal silicide, on the silicon substrate, and a conductive metal electrode in contact with said low Shottky barrier height contact. The reactive metal may be titanium, zirconium, hafnium, vanadium, niobium, and tantalum, and combinations thereof, and the non-reactive metal may be silver, tin, bismuth, lead, antimony, arsenic, indium, zinc, germanium, nickel, phosphorus, gold, cadmium, berrylium, and combinations thereof.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 3, 2013
    Applicant: E I DU PONT DE NEMOURS AND COMPANY NORTH CAROLINA STATE UNIVERSITY
    Inventors: WILLIAM J. BORLAND, Jon-Paul Maria
  • Patent number: 8294024
    Abstract: Photovoltaic cells, including silicon solar cells, and methods and compositions for making such photovoltaic cells are provided. A silicon substrate having an n-type silicon layer is provided with a silicon nitride layer, a reactive metal in contact with said silicon nitride layer, and a non-reactive metal in contact with the reactive metal. This assembly is fired to form a low Schottky barrier height contact comprised of metal nitride, and optionally metal silicide, on the silicon substrate, and a conductive metal electrode in contact with said low Schottky barrier height contact. The reactive metal may be titanium, zirconium, hafnium, vanadium, niobium, and tantalum, and combinations thereof, and the non-reactive metal may be silver, tin, bismuth, lead, antimony, arsenic, indium, zinc, germanium, nickel, phosphorus, gold, cadmium, berrylium, and combinations thereof.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: October 23, 2012
    Assignees: E I du Pont de Nemours and Company, North Carolina State University
    Inventors: William J. Borland, Jon-Paul Maria
  • Patent number: 8183108
    Abstract: A method of making dense dielectrics layers via chemical solution deposition by adding inorganic glass fluxed material to high dielectric constant compositions, depositing the resultant mixture onto a substrate and annealing the substrate at temperatures between the softening point of the inorganic glass flux and the melting point of the substrate. A method of making a capacitor comprising a dense dielectric layer.
    Type: Grant
    Filed: June 15, 2006
    Date of Patent: May 22, 2012
    Assignee: CDA Processing Limited Liability Company
    Inventors: William J. Borland, Seigi Suh, Jon-Paul Maria, Jon Fredrick Ihlefeld, Ian Burn
  • Publication number: 20120085401
    Abstract: A photovoltaic cell such as a solar cell is disclosed. The cell comprises (a) a semiconductor substrate having a front surface, (b) one or more anti-reflection coating layers on the front surface of the semiconductor substrate, (c) a plurality of silver-containing fingers in contact with the one or more anti-reflection coating layers and in electrical contact with the semiconductor substrate; and (d) one or more base metal containing buss bars each in contact with the one or more anti-reflection coating layers and the silver-containing fingers. The base metal may be selected from one or more of copper, nickel, lead, tin, iron, indium, zinc, bismuth and cobalt. Methods for making protovoltaic cells with base metal containing buss bars are also disclosed.
    Type: Application
    Filed: April 8, 2011
    Publication date: April 12, 2012
    Applicant: E.I. DU PONT DE NEMOURS AND COMPANY
    Inventors: William J. Borland, Alan Frederick Carroll, Barry Edward Taylor
  • Patent number: 7813141
    Abstract: This invention relates to a capacitive/resistive device, which may be embedded within a layer of a printed wiring board. Embedding the device conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability. More specifically, the device, comprises a first metallic foil; a second metallic foil; a first electrode formed from the first metallic foil; a dielectric disposed over the first electrode; a resistor element formed on and adjacent to the dielectric; a conductive trace; and a second electrode formed from the second metallic foil and disposed over the dielectric and in electrical contact with the resistor element, wherein the dielectric is disposed between the first electrode and the second electrode and wherein said dielectric comprises an unfilled polymer of dielectric constant less than 4.0.
    Type: Grant
    Filed: August 8, 2008
    Date of Patent: October 12, 2010
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: William J. Borland, G. Sidney Cox, David Ross McGregor
  • Patent number: 7795663
    Abstract: The present invention is directed to a dielectric thin film composition comprising: (1) one or more barium/titanium-containing additives selected from (a) barium titanate, (b) any composition that can form barium titanate during firing, and (c) mixtures thereof; dissolved in (2) organic medium; and wherein said thin film composition is doped with 0.002-0.05 atom percent of a dopant comprising an element selected from Sc, Cr, Fe, Co, Ni, Ca, Zn, Al, Ga, Y, Nd, Sm, Eu, Gd, Dy, Ho, Er, Yb, Lu and mixtures thereof and to capacitors comprising such compositions.
    Type: Grant
    Filed: June 21, 2005
    Date of Patent: September 14, 2010
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: Seigi Suh, William J. Borland
  • Patent number: 7778038
    Abstract: The present invention relates to a power core comprising: at least one embedded surface mount technology (SMT) discrete chip capacitor layer comprising at least one embedded SMT discrete chip capacitor; and at least one planar capacitor laminate; wherein at least one planar capacitor laminate serves as a low inductance path to supply a charge to at least one embedded SMT discrete chip capacitor; and wherein said embedded SMT discrete chip capacitor is connected in parallel to said planar capacitor laminate.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: August 17, 2010
    Assignee: E.I. du Pont de Nemours and Company
    Inventors: David Ross McGregor, Daniel Irwin Amey, Jr., Sounak Banerji, William J. Borland, Karl Hartmann Dietz, Attiganal N. Sreeram
  • Publication number: 20100154875
    Abstract: Photovoltaic cells, including silicon solar cells, and methods and compositions for making such photovoltaic cells are provided. A silicon substrate having p-type silicon base and an n-type silicon layer is provided with a silicon nitride layer, an exchange metal in contact with the silicon nitride layer, and a non-exchange metal in contact with the exchange metal. This assembly is fired to form a metal silicide contact on the silicon substrate, and a conductive metal electrode in contact with the metal silicide contact. The exchange metal is from nickel, cobalt, iron, manganese, molybdenum, and combinations thereof, and the non-exchange metal is from silver, copper, tin, bismuth, lead, antimony, arsenic, indium, zinc, germanium, gold, cadmium, berrylium, and combinations thereof.
    Type: Application
    Filed: November 13, 2009
    Publication date: June 24, 2010
    Applicant: E. I. DU PONT DE NEMOURS AND COMPNAY & NORTH CAROLINA STATE UNIVERSITY
    Inventors: William J. Borland, Howard David Glicksman, Jon-Paul Maria
  • Patent number: 7741189
    Abstract: A method of embedding thick-film fired-on-foil capacitors includes entirely covering the dielectric with an encapsulating electrode to avoid cracking in the dielectric due to shrinkage and temperature coefficient of expansion differences between the electrode and dielectric.
    Type: Grant
    Filed: June 15, 2006
    Date of Patent: June 22, 2010
    Assignee: E.I. du Pont de Nemours and Company
    Inventors: William J. Borland, Saul Ferguson, Diptarka Majumdar, Richard Ray Traylor
  • Patent number: 7701052
    Abstract: A device comprising a power core wherein said power core comprises: at least one embedded singulated capacitor layer containing at least one embedded singulated capacitor wherein said embedded singulated capacitor comprises at least a first electrode and a second electrode and wherein said embedded singulated capacitor is positioned on the outer layer of the power core with both first and second electrodes of the capacitor on the outer layer of the power core so that at least one Vcc (power) terminal and at least one Vss (ground) terminal of a semiconductor device can be directly connected to at least one first and at least one second electrode, respectively.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: April 20, 2010
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: William J. Borland, Saul Ferguson
  • Patent number: 7688569
    Abstract: Dielectric powder and thick-film paste compositions are formed having high dielectric constants, low loss tangents, and other desirable electrical and physical properties. Conductive powder and paste compositions are formed having desirable electrical and physical properties. The dielectric powder and thick-film paste compositions can be used in combination with the conductive powder and paste compositions to form capacitors and other fired-on-foil passive circuit components.
    Type: Grant
    Filed: March 16, 2004
    Date of Patent: March 30, 2010
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: William J. Borland, Alton Bruce Jones, III, Olga L. Renovales, Kenneth Warren Hang
  • Publication number: 20100073845
    Abstract: Disclosed are methods of making a dielectric on a metal foil, and a method of making a large area capacitor that includes a dielectric on a metal foil. A first dielectric layer is formed over the metal foil by physical vapor deposition, and a dielectric precursor layer is formed over the first dielectric layer by chemical solution deposition. The metal foil, first dielectric layer and dielectric precursor layer are prefired at a prefiring temperature in the range of 350 to 650° C. The prefired dielectric precursor layer, the first dielectric layer and the base metal foil are subsequently fired at a firing temperature in the range of 700 to 1200° C.
    Type: Application
    Filed: September 25, 2008
    Publication date: March 25, 2010
    Applicant: E. I. DU PONT DE NEMOURS AND COMPANY
    Inventors: SEIGI SUH, Esther Kim, William J. Borland, Christopher Allen Gross, Omega N. Mack, Timothy R. Overcash
  • Publication number: 20100037942
    Abstract: Photovoltaic cells, including silicon solar cells, and methods and compositions for making such photovoltaic cells are provided. A silicon substrate having an n-type silicon layer is provided with a silicon nitride layer, a reactive metal in contact with said silicon nitride layer, and a non-reactive metal in contact with the reactive metal. This assembly is fired to form a low Shottky barrier height contact comprised of metal nitride, and optionally metal silicide, on the silicon substrate, and a conductive metal electrode in contact with said low Shottky barrier height contact. The reactive metal may be titanium, zirconium, hafnium, vanadium, niobium, and tantalum, and combinations thereof, and the non-reactive metal may be silver, tin, bismuth, lead, antimony, arsenic, indium, zinc, germanium, nickel, phosphorus, gold, cadmium, berrylium, and combinations thereof.
    Type: Application
    Filed: August 5, 2009
    Publication date: February 18, 2010
    Applicants: E. I. DU PONT DE NEMOURS AND COMPANY, NORTH CAROLINA STATE UNIVERSITY
    Inventors: William J. Borland, Jon-Paul Maria