Patents by Inventor William J. Borland
William J. Borland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8921963Abstract: A photovoltaic cell such as a solar cell is disclosed. The cell comprises (a) a semiconductor substrate having a front surface, (b) one or more anti-reflection coating layers on the front surface of the semiconductor substrate, (c) a plurality of silver-containing fingers in contact with the one or more anti-reflection coating layers and in electrical contact with the semiconductor substrate; and (d) one or more base metal containing buss bars each in contact with the one or more anti-reflection coating layers and the silver-containing fingers. The base metal may be selected from one or more of copper, nickel, lead, tin, iron, indium, zinc, bismuth and cobalt. Methods for making photovoltaic cells with base metal containing buss bars are also disclosed.Type: GrantFiled: February 27, 2014Date of Patent: December 30, 2014Assignee: E I du Pont de Nemours and CompanyInventors: William J Borland, Alan Frederick Carroll, Barry Edward Taylor
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Patent number: 8875363Abstract: Disclosed are methods of making a dielectric on a metal foil, and a method of making a large area capacitor that includes a dielectric on a metal foil. A first dielectric layer is formed over the metal foil by physical vapor deposition, and a dielectric precursor layer is formed over the first dielectric layer by chemical solution deposition. The metal foil, first dielectric layer and dielectric precursor layer are prefired at a prefiring temperature in the range of 350 to 650° C. The prefired dielectric precursor layer, the first dielectric layer and the base metal foil are subsequently fired at a firing temperature in the range of 700 to 1200° C.Type: GrantFiled: September 25, 2008Date of Patent: November 4, 2014Assignee: CDA Processing Limited Liability CompanyInventors: Seigi Suh, Esther Kim, William J. Borland, Christopher Allen Gross, Omega N. Mack, Timothy R. Overcash
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Patent number: 8840701Abstract: Disclosed are methods of making multi-element, finely divided, metal powders containing one or more reactive metals and one or more non-reactive metals. Reactive metals include metals or mixtures thereof from titanium (Ti), zirconium (Zr), hafnium (Hf), tantalum (Ta), niobium (Nb), vanadium (V), nickel (Ni), cobalt (Co), molybdenum (Mo), manganese (Mn), and iron (Fe). Non-reactive metals include metals or mixtures such as silver (Ag), tin (Sn), bismuth (Bi), lead (Pb), antimony (Sb), zinc (Zn), germanium (Ge), phosphorus (P), gold (Au), cadmium (Cd), berrylium (Be), tellurium (Te).Type: GrantFiled: August 12, 2009Date of Patent: September 23, 2014Assignee: E I du Pont de Nemours and CompanyInventors: William J. Borland, Howard David Glicksman
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Publication number: 20140174527Abstract: A photovoltaic cell such as a solar cell is disclosed. The cell comprises (a) a semiconductor substrate having a front surface, (b) one or more anti-reflection coating layers on the front surface of the semiconductor substrate, (c) a plurality of silver-containing fingers in contact with the one or more anti-reflection coating layers and in electrical contact with the semiconductor substrate; and (d) one or more base metal containing buss bars each in contact with the one or more anti-reflection coating layers and the silver-containing fingers. The base metal may be selected from one or more of copper, nickel, lead, tin, iron, indium, zinc, bismuth and cobalt. Methods for making protovoltaic cells with base metal containing buss bars are also disclosed.Type: ApplicationFiled: February 27, 2014Publication date: June 26, 2014Applicant: E I DU Pont De Nemours And CompanyInventors: WILLIAM J BORLAND, ALAN FREDERICK CARROLL, BARRY EDWARD TAYLOR
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Patent number: 8710355Abstract: Photovoltaic cells, including silicon solar cells, and methods and compositions for making such photovoltaic cells are provided. A silicon substrate having p-type silicon base and an n-type silicon layer is provided with a silicon nitride layer, an exchange metal in contact with the silicon nitride layer, and a non-exchange metal in contact with the exchange metal. This assembly is fired to form a metal silicide contact on the silicon substrate, and a conductive metal electrode in contact with the metal silicide contact. The exchange metal is from nickel, cobalt, iron, manganese, molybdenum, and combinations thereof, and the non-exchange metal is from silver, copper, tin, bismuth, lead, antimony, arsenic, indium, zinc, germanium, gold, cadmium, beryllium, and combinations thereof.Type: GrantFiled: November 13, 2009Date of Patent: April 29, 2014Assignees: E I du Pont de Nemours and CompanyInventors: William J. Borland, Howard David Glicksman, Jon-Paul Maria
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Patent number: 8697476Abstract: A photovoltaic cell such as a solar cell is disclosed. The cell comprises (a) a semiconductor substrate having a front surface, (b) one or more anti-reflection coating layers on the front surface of the semiconductor substrate, (c) a plurality of silver-containing fingers in contact with the one or more anti-reflection coating layers and in electrical contact with the semiconductor substrate; and (d) one or more base metal containing buss bars each in contact with the one or more anti-reflection coating layers and the silver-containing fingers. The base metal may be selected from one or more of copper, nickel, lead, tin, iron, indium, zinc, bismuth and cobalt. Methods for making protovoltaic cells with base metal containing buss bars are also disclosed.Type: GrantFiled: April 8, 2011Date of Patent: April 15, 2014Assignee: E I du Pont de Nemours and CompanyInventors: William J. Borland, Alan Frederick Carroll, Barry Edward Taylor
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Patent number: 8564967Abstract: A printed wiring board semiconductor package or PWB power core comprising singulated capacitors embedded on multiple layers of the printed wiring board semiconductor package wherein at least a part of each embedded capacitor lies within the die shadow and wherein the embedded, singulated capacitors comprise at least a first electrode and a second electrode. The first electrodes and second electrodes of the embedded singulated capacitors are interconnected to the Vcc (power) terminals and the Vss (ground) terminals respectively of a semiconductor device. The size of the embedded capacitors are varied to produce different self-resonant frequencies and their vertical placements within the PWB semiconductor package are used to control the inherent inductance of the capacitor-semiconductor electrical interconnections so that customized resonant frequencies of the embedded capacitors can be achieved with low impedance.Type: GrantFiled: December 3, 2007Date of Patent: October 22, 2013Assignee: CDA Processing Limited Liability CompanyInventors: Daniel Irwin Amey, Jr., William J. Borland
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Publication number: 20130000709Abstract: Photovoltaic cells including silicon solar cells are provided. A silicon substrate having an n-type silicon layer is provided with a silicon nitride layer, a reactive metal in contact with said silicon nitride layer, and a non-reactive metal in contact with the reactive metal. This assembly is fired to form a low Shottky barrier height contact comprised of metal nitride, and optionally metal silicide, on the silicon substrate, and a conductive metal electrode in contact with said low Shottky barrier height contact. The reactive metal may be titanium, zirconium, hafnium, vanadium, niobium, and tantalum, and combinations thereof, and the non-reactive metal may be silver, tin, bismuth, lead, antimony, arsenic, indium, zinc, germanium, nickel, phosphorus, gold, cadmium, berrylium, and combinations thereof.Type: ApplicationFiled: September 14, 2012Publication date: January 3, 2013Applicant: E I DU PONT DE NEMOURS AND COMPANY NORTH CAROLINA STATE UNIVERSITYInventors: WILLIAM J. BORLAND, Jon-Paul Maria
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Patent number: 8294024Abstract: Photovoltaic cells, including silicon solar cells, and methods and compositions for making such photovoltaic cells are provided. A silicon substrate having an n-type silicon layer is provided with a silicon nitride layer, a reactive metal in contact with said silicon nitride layer, and a non-reactive metal in contact with the reactive metal. This assembly is fired to form a low Schottky barrier height contact comprised of metal nitride, and optionally metal silicide, on the silicon substrate, and a conductive metal electrode in contact with said low Schottky barrier height contact. The reactive metal may be titanium, zirconium, hafnium, vanadium, niobium, and tantalum, and combinations thereof, and the non-reactive metal may be silver, tin, bismuth, lead, antimony, arsenic, indium, zinc, germanium, nickel, phosphorus, gold, cadmium, berrylium, and combinations thereof.Type: GrantFiled: August 5, 2009Date of Patent: October 23, 2012Assignees: E I du Pont de Nemours and Company, North Carolina State UniversityInventors: William J. Borland, Jon-Paul Maria
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Patent number: 8183108Abstract: A method of making dense dielectrics layers via chemical solution deposition by adding inorganic glass fluxed material to high dielectric constant compositions, depositing the resultant mixture onto a substrate and annealing the substrate at temperatures between the softening point of the inorganic glass flux and the melting point of the substrate. A method of making a capacitor comprising a dense dielectric layer.Type: GrantFiled: June 15, 2006Date of Patent: May 22, 2012Assignee: CDA Processing Limited Liability CompanyInventors: William J. Borland, Seigi Suh, Jon-Paul Maria, Jon Fredrick Ihlefeld, Ian Burn
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Publication number: 20120085401Abstract: A photovoltaic cell such as a solar cell is disclosed. The cell comprises (a) a semiconductor substrate having a front surface, (b) one or more anti-reflection coating layers on the front surface of the semiconductor substrate, (c) a plurality of silver-containing fingers in contact with the one or more anti-reflection coating layers and in electrical contact with the semiconductor substrate; and (d) one or more base metal containing buss bars each in contact with the one or more anti-reflection coating layers and the silver-containing fingers. The base metal may be selected from one or more of copper, nickel, lead, tin, iron, indium, zinc, bismuth and cobalt. Methods for making protovoltaic cells with base metal containing buss bars are also disclosed.Type: ApplicationFiled: April 8, 2011Publication date: April 12, 2012Applicant: E.I. DU PONT DE NEMOURS AND COMPANYInventors: William J. Borland, Alan Frederick Carroll, Barry Edward Taylor
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Patent number: 7813141Abstract: This invention relates to a capacitive/resistive device, which may be embedded within a layer of a printed wiring board. Embedding the device conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability. More specifically, the device, comprises a first metallic foil; a second metallic foil; a first electrode formed from the first metallic foil; a dielectric disposed over the first electrode; a resistor element formed on and adjacent to the dielectric; a conductive trace; and a second electrode formed from the second metallic foil and disposed over the dielectric and in electrical contact with the resistor element, wherein the dielectric is disposed between the first electrode and the second electrode and wherein said dielectric comprises an unfilled polymer of dielectric constant less than 4.0.Type: GrantFiled: August 8, 2008Date of Patent: October 12, 2010Assignee: E. I. du Pont de Nemours and CompanyInventors: William J. Borland, G. Sidney Cox, David Ross McGregor
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Patent number: 7795663Abstract: The present invention is directed to a dielectric thin film composition comprising: (1) one or more barium/titanium-containing additives selected from (a) barium titanate, (b) any composition that can form barium titanate during firing, and (c) mixtures thereof; dissolved in (2) organic medium; and wherein said thin film composition is doped with 0.002-0.05 atom percent of a dopant comprising an element selected from Sc, Cr, Fe, Co, Ni, Ca, Zn, Al, Ga, Y, Nd, Sm, Eu, Gd, Dy, Ho, Er, Yb, Lu and mixtures thereof and to capacitors comprising such compositions.Type: GrantFiled: June 21, 2005Date of Patent: September 14, 2010Assignee: E. I. du Pont de Nemours and CompanyInventors: Seigi Suh, William J. Borland
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Patent number: 7778038Abstract: The present invention relates to a power core comprising: at least one embedded surface mount technology (SMT) discrete chip capacitor layer comprising at least one embedded SMT discrete chip capacitor; and at least one planar capacitor laminate; wherein at least one planar capacitor laminate serves as a low inductance path to supply a charge to at least one embedded SMT discrete chip capacitor; and wherein said embedded SMT discrete chip capacitor is connected in parallel to said planar capacitor laminate.Type: GrantFiled: November 30, 2005Date of Patent: August 17, 2010Assignee: E.I. du Pont de Nemours and CompanyInventors: David Ross McGregor, Daniel Irwin Amey, Jr., Sounak Banerji, William J. Borland, Karl Hartmann Dietz, Attiganal N. Sreeram
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Publication number: 20100154875Abstract: Photovoltaic cells, including silicon solar cells, and methods and compositions for making such photovoltaic cells are provided. A silicon substrate having p-type silicon base and an n-type silicon layer is provided with a silicon nitride layer, an exchange metal in contact with the silicon nitride layer, and a non-exchange metal in contact with the exchange metal. This assembly is fired to form a metal silicide contact on the silicon substrate, and a conductive metal electrode in contact with the metal silicide contact. The exchange metal is from nickel, cobalt, iron, manganese, molybdenum, and combinations thereof, and the non-exchange metal is from silver, copper, tin, bismuth, lead, antimony, arsenic, indium, zinc, germanium, gold, cadmium, berrylium, and combinations thereof.Type: ApplicationFiled: November 13, 2009Publication date: June 24, 2010Applicant: E. I. DU PONT DE NEMOURS AND COMPNAY & NORTH CAROLINA STATE UNIVERSITYInventors: William J. Borland, Howard David Glicksman, Jon-Paul Maria
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Patent number: 7741189Abstract: A method of embedding thick-film fired-on-foil capacitors includes entirely covering the dielectric with an encapsulating electrode to avoid cracking in the dielectric due to shrinkage and temperature coefficient of expansion differences between the electrode and dielectric.Type: GrantFiled: June 15, 2006Date of Patent: June 22, 2010Assignee: E.I. du Pont de Nemours and CompanyInventors: William J. Borland, Saul Ferguson, Diptarka Majumdar, Richard Ray Traylor
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Patent number: 7701052Abstract: A device comprising a power core wherein said power core comprises: at least one embedded singulated capacitor layer containing at least one embedded singulated capacitor wherein said embedded singulated capacitor comprises at least a first electrode and a second electrode and wherein said embedded singulated capacitor is positioned on the outer layer of the power core with both first and second electrodes of the capacitor on the outer layer of the power core so that at least one Vcc (power) terminal and at least one Vss (ground) terminal of a semiconductor device can be directly connected to at least one first and at least one second electrode, respectively.Type: GrantFiled: August 31, 2006Date of Patent: April 20, 2010Assignee: E. I. du Pont de Nemours and CompanyInventors: William J. Borland, Saul Ferguson
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Patent number: 7688569Abstract: Dielectric powder and thick-film paste compositions are formed having high dielectric constants, low loss tangents, and other desirable electrical and physical properties. Conductive powder and paste compositions are formed having desirable electrical and physical properties. The dielectric powder and thick-film paste compositions can be used in combination with the conductive powder and paste compositions to form capacitors and other fired-on-foil passive circuit components.Type: GrantFiled: March 16, 2004Date of Patent: March 30, 2010Assignee: E. I. du Pont de Nemours and CompanyInventors: William J. Borland, Alton Bruce Jones, III, Olga L. Renovales, Kenneth Warren Hang
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Publication number: 20100073845Abstract: Disclosed are methods of making a dielectric on a metal foil, and a method of making a large area capacitor that includes a dielectric on a metal foil. A first dielectric layer is formed over the metal foil by physical vapor deposition, and a dielectric precursor layer is formed over the first dielectric layer by chemical solution deposition. The metal foil, first dielectric layer and dielectric precursor layer are prefired at a prefiring temperature in the range of 350 to 650° C. The prefired dielectric precursor layer, the first dielectric layer and the base metal foil are subsequently fired at a firing temperature in the range of 700 to 1200° C.Type: ApplicationFiled: September 25, 2008Publication date: March 25, 2010Applicant: E. I. DU PONT DE NEMOURS AND COMPANYInventors: SEIGI SUH, Esther Kim, William J. Borland, Christopher Allen Gross, Omega N. Mack, Timothy R. Overcash
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Publication number: 20100037941Abstract: Methods and compositions for making photovoltaic devices are provided. A metal that is reactive with silicon is placed in contact with the n-type silicon layer of a silicon substrate. The silicon substrate and reactive metal are fired to form a silicide contact to the n-type silicon layer. A conductive metal electrode is placed in contact with the silicide contact. A silicon solar cell made by such methods is also provided.Type: ApplicationFiled: August 5, 2009Publication date: February 18, 2010Applicants: E. I. DU PONT DE NEMOURS AND COMPANY, NORTH CAROLINA STATE UNIVERSITYInventors: WILLIAM J. BORLAND, Jon-Paul Maria