Patents by Inventor William Parsons

William Parsons has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11508112
    Abstract: Techniques are disclosed for improving the throughput of ray intersection or visibility queries performed by a ray tracing hardware accelerator. Throughput is improved, for example, by releasing allocated resources before ray visibility query results are reported by the hardware accelerator. The allocated resources are released when the ray visibility query results can be stored in a compressed format outside of the allocated resources. When reporting the ray visibility query results, the results are reconstructed based on the results stored in the compressed format. The compressed format storage can be used for ray visibility queries that return no intersections or terminate on any hit ray visibility query. One or more individual components of allocated resources can also be independently deallocated based on the type of data to be returned and/or results of the ray visibility query.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: November 22, 2022
    Assignee: NVIDIA Corporation
    Inventors: Gregory Muthler, John Burgess, Ronald Charles Babich, Jr., William Parsons Newhall, Jr.
  • Patent number: 11455768
    Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: September 27, 2022
    Assignee: NVIDIA Corporation
    Inventors: Greg Muthler, Ronald Charles Babich, Jr., William Parsons Newhall, Jr., Peter Nelson, James Robertson, John Burgess
  • Publication number: 20220230380
    Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.
    Type: Application
    Filed: April 8, 2022
    Publication date: July 21, 2022
    Inventors: Samuli Laine, Tero Karras, Timo Aila, Robert Ohannessian, William Parsons Newhall, JR., Greg Muthler, Ian Kwong, Peter Nelson, John Burgess
  • Patent number: 11328472
    Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: May 10, 2022
    Assignee: NVIDIA Corporation
    Inventors: Samuli Laine, Tero Karras, Timo Aila, Robert Ohannessian, William Parsons Newhall, Jr., Greg Muthler, Ian Kwong, Peter Nelson, John Burgess
  • Patent number: 11298991
    Abstract: A tire load estimation system includes at least one tire supporting a vehicle, in which the at least one tire includes a pair of sidewalls extending to a circumferential tread. A sensor is mounted to the at least one tire. A footprint is formed by the tread and includes a centerline with a footprint centerline length. The footprint centerline length is measured by the sensor. A tire load estimator receives a precalibrated sensitivity, the footprint centerline length during straight-line driving conditions, a reference footprint value, and a reference load value as inputs. The tire load estimator determines an estimation of tire load and outputs the estimation to at least one of a vehicle control system and a vehicle electronic control unit. A method for estimating the load of a tire is also provided.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: April 12, 2022
    Assignee: The Goodyear Tire & Rubber Company
    Inventors: Kanwar Bharat Singh, Anthony William Parsons, Mustafa Ali Arat
  • Publication number: 20220058856
    Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.
    Type: Application
    Filed: November 5, 2021
    Publication date: February 24, 2022
    Inventors: Greg Muthler, Tero Karras, Samuli Laine, William Parsons Newhall, JR., Ronald Charles Babich, JR., John Burgess, Ignacio Llamas
  • Publication number: 20220058861
    Abstract: Devices, systems, and techniques to incorporate lighting effects into computer-generated graphics. In at least one embodiment, a virtual scene comprising a plurality of lights is rendered by randomly sampling a set of lights from among the plurality of lights prior to rendering a frame of graphics. A subset of the set of lights is selected and used to render pixels within one or more portions of the frame.
    Type: Application
    Filed: February 24, 2021
    Publication date: February 24, 2022
    Inventors: Christopher Ryan Wyman, Robert Anthony Alfieri, William Parsons Newhall, JR., Peter Schuyler Shirley
  • Publication number: 20220027280
    Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.
    Type: Application
    Filed: September 23, 2021
    Publication date: January 27, 2022
    Inventors: Greg MUTHLER, Timo AILA, Tero KARRAS, Samuli LAINE, William Parsons NEWHALL, JR., Ronald Charles BABICH, JR., John BURGESS, Ignacio LLAMAS
  • Publication number: 20220020202
    Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to provide a deterministic result of intersected triangles regardless of the order that the memory subsystem returns triangle range blocks for processing, while opportunistically eliminating alpha intersections that lie further along the length of the ray than closer opaque intersections.
    Type: Application
    Filed: September 30, 2021
    Publication date: January 20, 2022
    Inventors: Samuli LAINE, Tero KARRAS, Greg MUTHLER, William Parsons NEWHALL, Ronald Charles BABICH, Ignacio LLAMAS, John BURGESS
  • Publication number: 20210398340
    Abstract: Techniques are disclosed for improving the throughput of ray intersection or visibility queries performed by a ray tracing hardware accelerator. Throughput is improved, for example, by releasing allocated resources before ray visibility query results are reported by the hardware accelerator. The allocated resources are released when the ray visibility query results can be stored in a compressed format outside of the allocated resources. When reporting the ray visibility query results, the results are reconstructed based on the results stored in the compressed format. The compressed format storage can be used for ray visibility queries that return no intersections or terminate on any hit ray visibility query. One or more individual components of allocated resources can also be independently deallocated based on the type of data to be returned and/or results of the ray visibility query.
    Type: Application
    Filed: June 18, 2020
    Publication date: December 23, 2021
    Inventors: Gregory MUTHLER, John BURGESS, Ronald Charles BABICH, JR., William Parsons Newhall, JR.
  • Publication number: 20210397449
    Abstract: Systems and methods for an efficient and robust multiprocessor-coprocessor interface that may be used between a streaming multiprocessor and an acceleration coprocessor in a GPU are provided. According to an example implementation, in order to perform an acceleration of a particular operation using the coprocessor, the multiprocessor: issues a series of write instructions to write input data for the operation into coprocessor-accessible storage locations, issues an operation instruction to cause the coprocessor to execute the particular operation; and then issues a series of read instructions to read result data of the operation from coprocessor-accessible storage locations to multiprocessor-accessible storage locations.
    Type: Application
    Filed: September 2, 2021
    Publication date: December 23, 2021
    Inventors: Ronald Charles BABICH, JR., John BURGESS, Jack CHOQUETTE, Tero KARRAS, Samuli LAINE, Ignacio LLAMAS, Gregory MUTHLER, William Parsons NEWHALL, JR.
  • Patent number: 11200725
    Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: December 14, 2021
    Assignee: NVIDIA Corporation
    Inventors: Greg Muthler, Tero Karras, Samuli Laine, William Parsons Newhall, Jr., Ronald Charles Babich, Jr., John Burgess, Ignacio Llamas
  • Patent number: 11164360
    Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to provide a deterministic result of intersected triangles regardless of the order that the memory subsystem returns triangle range blocks for processing, while opportunistically eliminating alpha intersections that lie further along the length of the ray than closer opaque intersections.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: November 2, 2021
    Assignee: NVIDIA Corporation
    Inventors: Samuli Laine, Tero Karras, Greg Muthler, William Parsons Newhall, Ronald Charles Babich, Ignacio Llamas, John Burgess
  • Patent number: 11157414
    Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: October 26, 2021
    Assignee: NVIDIA Corporation
    Inventors: Greg Muthler, Timo Aila, Tero Karras, Samuli Laine, William Parsons Newhall, Jr., Ronald Charles Babich, Jr., John Burgess, Ignacio Llamas
  • Publication number: 20210317532
    Abstract: We found mutations of the R132 residue of isocitrate dehydrogenase 1 (IDH1) in the majority of grade II and III astrocytomas and oligodendrogliomas as well as in gliblastomas that develop from these lower grade lesions. Those tumors without mutations in IDH1 often had mutations at the analogous R172 residue of the closely related IDH2 gene. These findings have important implications for the pathogenesis and diagnosis of malignant gliomas.
    Type: Application
    Filed: November 6, 2020
    Publication date: October 14, 2021
    Inventors: Bert Vogelstein, Kenneth W. Kinzler, D. Williams Parsons, Xiaosong Zhang, Jimmy Cheng-Ho Lin, Rebecca J. Leary, Philipp Angenendt, Nickolas Papadopoulos, Victor Velculescu, Giovanni Parmigiani, Rachel Karchin, Sian Jones, Hai Yan, Darell Bigner, Chien-Tsun Kuan, Gregory J. Riggins
  • Patent number: 11138009
    Abstract: Systems and methods for an efficient and robust multiprocessor-coprocessor interface that may be used between a streaming multiprocessor and an acceleration coprocessor in a GPU are provided. According to an example implementation, in order to perform an acceleration of a particular operation using the coprocessor, the multiprocessor: issues a series of write instructions to write input data for the operation into coprocessor-accessible storage locations, issues an operation instruction to cause the coprocessor to execute the particular operation; and then issues a series of read instructions to read result data of the operation from coprocessor-accessible storage locations to multiprocessor-accessible storage locations.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: October 5, 2021
    Assignee: NVIDIA CORPORATION
    Inventors: Ronald Charles Babich, Jr., John Burgess, Jack Choquette, Tero Karras, Samuli Laine, Ignacio Llamas, Gregory Muthler, William Parsons Newhall, Jr.
  • Patent number: 11132100
    Abstract: A system includes an analytics collector that receives world state data to provide status relating to a plurality of mission analytics of an unmanned vehicle or an unmanned vehicle mission planner. An asset filter filters the status from the analytics collector with respect to mission analytics of a subset of selected assets. An analytic aggregator collects the filtered status from the asset filter and generates a visual analytics file based on one or more selected analytics for the subset of selected assets. A rendering pipeline processes the visual analytics file from the analytic aggregator and generates a formatted output file describing a visualization of the plurality of mission analytics from the visual analytics file.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: September 28, 2021
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Miteshkumar K. Patel, Louis Oddo, William Parsons, Feng Cao, Henry H. Fung, Devang R. Parekh
  • Publication number: 20210205682
    Abstract: A goal frame for a goal apparatus the goal frame including a crossbar member, a first and a second goalpost member, a support member, and a rotatable attachment member. Respective ends of the crossbar member are attached to, or are operable to attach to, a respective end of the first and second goal post members to form a goal face. The attachment of the respective end of the crossbar member to the end of the first goal post member forms a crossbar-goalpost corner portion of the goal face. The rotatable attachment member is attached to, or is operable to attach to, the goal face adjacent to the crossbar-goalpost corner portion. The rotatable attachment member is attached to, or is operable to attach to, an end of the support member.
    Type: Application
    Filed: May 3, 2019
    Publication date: July 8, 2021
    Applicant: Quick Play Sport Ltd
    Inventor: William PARSONS
  • Publication number: 20210090319
    Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.
    Type: Application
    Filed: December 4, 2020
    Publication date: March 25, 2021
    Inventors: Greg Muthler, Ronald Charles Babich, JR., William Parsons Newhall, JR., Peter Nelson, James Robertson, John Burgess
  • Patent number: 10894987
    Abstract: We found mutations of the R132 residue of isocitrate dehydrogenase 1 (IDH1) in the majority of grade II and III astrocytomas and oligodendrogliomas as well as in glioblastomas that develop from these lower grade lesions. Those tumors without mutations in IDH1 often had mutations at the analogous R172 residue of the closely related IDH2 gene. These findings have important implications for the pathogenesis and diagnosis of malignant gliomas.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: January 19, 2021
    Assignees: The Johns Hopkins University, Duke University
    Inventors: Bert Vogelstein, Kenneth W. Kinzler, D. Williams Parsons, Xiaosong Zhang, Jimmy Cheng-Ho Lin, Rebecca J. Leary, Philipp Angenendt, Nickolas Papadopoulos, Victor Velculescu, Giovanni Parmigiani, Rachel Karchin, Sian Jones, Hai Yan, Darell D. Bigner, Chien-Tsun Kuan, Gregory J. Riggins