Patents by Inventor Won-Cheol Jeong

Won-Cheol Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050205952
    Abstract: Magnetic RAM cells have split sub-digit lines surrounded by cladding layers and methods of fabricating the same are provided. The magnetic RAM cells include first and second sub-digit lines formed over a semiconductor substrate. Only a bottom surface and an outer sidewall of the first sub-digit line are covered with a first cladding layer pattern. In addition, only a bottom surface and an outer sidewall of the second sub-digit line are covered with a second cladding layer pattern. The outer sidewall of the first sub-digit line is located distal from the second sub-digit line and the outer sidewall of the second sub-digit line is located distal the first sub-digit line. Methods of fabricating the magnetic RAM cells are also provided.
    Type: Application
    Filed: March 11, 2005
    Publication date: September 22, 2005
    Inventors: Jae-Hyun Park, Hyeong-Jun Kim, Won-Cheol Jeong, Chang-Wook Jeong, Hong-sik Jeong, Gi-Tae Jeong
  • Patent number: 6943420
    Abstract: MRAM devices include an MRAM substrate having a face, elongated main magnetic resistors that extend along the face and elongated reference magnetic resistors that extend along the face nonparallel to the elongated main magnetic resistors. The elongated reference magnetic resistors may extend along the face orthogonal to the elongated main magnetic resistors. The elongated main magnetic resistors may be configured to have a maximum resistance or a minimum resistance, and the elongated reference magnetic transistors may be configured to have resistance midway between the maximum resistance and the minimum resistance.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: September 13, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Won-Cheol Jeong
  • Publication number: 20050139816
    Abstract: Phase change Random Access Memory (PRAM) devices include a substrate and a phase change layer pattern on the substrate. The phase change layer pattern includes a sharp tip and at least one wall that extends from the sharp tip in a direction away from the substrate. At least one contact hole node is provided that contacts the phase change material pattern adjacent the sharp tip.
    Type: Application
    Filed: December 21, 2004
    Publication date: June 30, 2005
    Inventors: Won-Cheol Jeong, Hyeong-Jun Kim, Jae-Hyun Park, Chang-Wook Jeong
  • Publication number: 20050110983
    Abstract: Phase change memory devices and methods of making phase changeable memory devices including a heating electrode disposed on a substrate are provided. The heating electrode includes an electrode hole in the heating electrode. A phase change material pattern is provided in the electrode hole and contacts a sidewall of the electrode hole. In some embodiments, the electrode hole extends through the heating electrode.
    Type: Application
    Filed: September 16, 2004
    Publication date: May 26, 2005
    Inventors: Won-Cheol Jeong, Hyeong-Jun Kim, Jae-Hyun Park, Chang-Wook Jeong
  • Publication number: 20050078510
    Abstract: A magnetic random access memory device may include a first electrode on a substrate, a magnetic tunneling junction element electrically connected to the electrode, and a second electrode electrically connected to the first electrode through the magnetic tunneling junction element. In addition, a heat generating layer may be electrically connected in series between the first and second electrodes, and the heat generating layer may provide a relatively high resistance with respect to electrical current flow. Related methods are also discussed.
    Type: Application
    Filed: March 8, 2004
    Publication date: April 14, 2005
    Inventors: Won-Cheol Jeong, Chang-Wook Jeong, Hyeong-Jun Kim, Jae-Hyun Park
  • Publication number: 20040257849
    Abstract: Information is read from a magnetic tunnel junction (MTJ) of a magnetic memory. An electromagnetic field is applied to the MTJ that is sufficient to cause a change in the electrical resistance of the MTJ. The change in the electrical resistance of the MTJ is at least substantially removed responsive to removal of the applied electromagnetic field. The change in the electrical resistance of the MTJ that associated with the application of the electromagnetic field is measured. The information in the MTJ is determined based on the measured change in the electrical resistance of the MTJ. The MTJ can be determined to store a representation of a first binary value when the electrical resistance of the MTJ decreases, and to store a representation of a second binary value when the electrical resistance increases.
    Type: Application
    Filed: April 19, 2004
    Publication date: December 23, 2004
    Inventor: Won-Cheol Jeong
  • Publication number: 20040165427
    Abstract: The present invention provides a magnetic memory having magnetic tunnel junction and a method of fabricating the same. The magnetic memory includes a plurality of digit lines, a plurality of a bit line intersecting over on a top surface of the digit lines and a magnetic tunnel junction interposed between the bit line and the digit lines. In this case, at least one among the bit line and digit lines intersect bumpily the magnetic tunnel junction. In other words, a bottom surface of the bit line may be disposed lower in a lateral part of the magnetic tunnel junction than in a top surface of the magnetic tunnel junction. In addition, a top surface of the digit line may be disposed higher in a lateral part than in a bottom surface of the magnetic tunnel junction. Consequently, magnetic field strength applied to a free layer may be increased without increasing electric current.
    Type: Application
    Filed: February 13, 2004
    Publication date: August 26, 2004
    Inventor: Won-cheol Jeong
  • Publication number: 20040108561
    Abstract: MRAM devices include an MRAM substrate having a face, elongated main magnetic resistors that extend along the face and elongated reference magnetic resistors that extend along the face nonparallel to the elongated main magnetic resistors. The elongated reference magnetic resistors may extend along the face orthogonal to the elongated main magnetic resistors. The elongated main magnetic resistors may be configured to have a maximum resistance or a minimum resistance, and the elongated reference magnetic transistors may be configured to have resistance midway between the maximum resistance and the minimum resistance.
    Type: Application
    Filed: October 20, 2003
    Publication date: June 10, 2004
    Inventor: Won-Cheol Jeong
  • Publication number: 20040084702
    Abstract: A magnetic memory includes digit lines, bit lines, and magnetic tunnel junctions (MTJs) that are between the bits lines and the digit lines. The digit lines intersect the bit lines at an oblique angle. The digit lines may intersect the bit lines at an oblique angle of from 15° to 75°.
    Type: Application
    Filed: October 16, 2003
    Publication date: May 6, 2004
    Inventor: Won-Cheol Jeong