Patents by Inventor Won-Joon Choi

Won-Joon Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100258852
    Abstract: A method for fabricating a non-volatile memory device includes alternately stacking a plurality of interlayer dielectric layers and a plurality of conductive layers over a substrate, etching the interlayer dielectric layers and the conductive layers to form a trench which exposes a surface of the substrate forming a first material layer over a resulting structure in which the trench is formed, forming a second material layer over the first material layer, removing portions of the second material layer and the first material layer formed on a bottom of the trench to expose the surface of the substrate, removing the second material layer, and burying a channel layer within the trench in which the second material layer is removed.
    Type: Application
    Filed: April 5, 2010
    Publication date: October 14, 2010
    Inventors: Se-Yun Lim, Eun-Seok Choi, Young-Wook Lee, Won-Joon Choi, Ki-Hong Lee, Sang-Bum Lee
  • Patent number: 7764727
    Abstract: An accurate total error rate performance can be measured using a computed error vector magnitude (EVM) per stream. Using this EVM, the receiver or the transmitter can advantageously generate an optimized modulation and coding scheme (MCS) that corresponds to a specific number of streams, modulation and coding rate for the transmitter. For example, the receiver can compute an SNR from the EVM and then use an SNR vs. MCS table to determine the optimized MCS. In contrast, the transmitter can receive an EVM-to-RSSI mapping and an EVM-to-MCS mapping from the receiver. These mappings and an EVM can facilitate selecting the optimized MCS.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: July 27, 2010
    Assignee: Atheros Communications, Inc.
    Inventors: Huanchun Ye, Won-Joon Choi, Ning Zhang, Jeffrey M. Gilbert
  • Patent number: 7751520
    Abstract: Techniques are disclosed for detecting a packet. One technique includes sampling a received signal to produce a sequence of samples wherein the sequence of samples includes a plurality of subsequences of samples; cross correlating the subsequences of samples with a known form of the subsequence to produce cross correlations; self correlating the cross correlations to produce a plurality of self correlations; summing the self correlations; and processing the sum of the self correlations.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: July 6, 2010
    Assignee: Atheros Communications, Inc.
    Inventors: Chaohuang Zeng, Jeffrey M. Gilbert, Won-Joon Choi, Xiaoru Zhang
  • Publication number: 20100155818
    Abstract: A method for fabricating, a vertical channel type nonvolatile memory device includes: alternately forming a plurality of sacrificial layers and a plurality of interlayer dielectric layers over a semiconductor substrate; etching the sacrificial layers and the interlayer dielectric layers to form a plurality of first openings for channel each of which exposes the substrate; filling the first openings to form a plurality of channels protruding from the semiconductor substrate; etching the sacrificial layers and the interlayer dielectric layers to form second openings for removal of the sacrificial layers between the channels; exposing sidewalls of the channels by removing the sacrificial layers exposed by the second openings; and forming a tunnel insulation layer, a charge trap layer, a charge blocking layer, and a conductive layer for gate electrode on the exposed sidewalls of the channels.
    Type: Application
    Filed: June 29, 2009
    Publication date: June 24, 2010
    Inventors: Heung-Jae Cho, Yong-Soo Kim, Beom-Yong Kim, Won-Joon Choi, Jung-Ryul Ahn
  • Patent number: 7736975
    Abstract: A method for manufacturing a non-volatile memory device having a charge trap layer comprises in one embodiment: forming a first dielectric layer over a semiconductor substrate; forming a second dielectric layer having a higher dielectric constant than that of the first dielectric layer over the first dielectric layer; forming a nitride buffer layer for preventing an interfacial reaction over the second dielectric layer; forming a third dielectric layer by supplying a radical oxidation source onto the nitride buffer layer to oxidize the nitride buffer layer, thereby forming a tunneling layer comprising the first, second, and third dielectric layers; and forming a charge trap layer, a shielding layer, and a control gate electrode layer over the tunneling layer.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: June 15, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Won Joon Choi, Moon Sig Joo, Heung Jae Cho, Yong Soo Kim, Sung Jin Whang
  • Publication number: 20100111212
    Abstract: Current OFDM systems use a limited number of symbols and/or sub-channels to provide approximations for channel estimations and pilot tracking, i.e. phase estimations. For example, two training symbols in the preamble of a data packet are used to provide channel estimation. Four of the fifty-four sub-channels are reserved for providing phase estimation. However, noise and other imperfections can cause errors in both of these estimations, thereby degrading system performance. Advantageously, decision feedback mechanisms can be provided to significantly improve channel estimation and pilot tracking in OFDM systems. The decision feedback mechanisms can use data symbols in the data packet to improve channel estimation as well as data sub-channels to improve pilot tracking.
    Type: Application
    Filed: January 15, 2010
    Publication date: May 6, 2010
    Applicant: Atheros Communications, Inc.
    Inventors: Qinfang Sun, Won-Joon Choi, Jeffrey M. Gilbert, Ning Zhang, Yi-Hsiu Wang, Tao-Fei Samuel Ng
  • Patent number: 7693036
    Abstract: Current OFDM systems use a limited number of symbols and/or sub-channels to provide approximations for channel estimations and pilot tracking, i.e. phase estimations. For example, two training symbols in the preamble of a data packet are used to provide channel estimation. Four of the fifty-four sub-channels are reserved for providing phase estimation. However, noise and other imperfections can cause errors in both of these estimations, thereby degrading system performance. Advantageously, decision feedback mechanisms can be provided to significantly improve channel estimation and pilot tracking in OFDM systems. The decision feedback mechanisms can use data symbols in the data packet to improve channel estimation as well as data sub-channels to improve pilot tracking.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: April 6, 2010
    Assignee: Atheros Communications, Inc.
    Inventors: Qinfang Sun, Won-Joon Choi, Jeffrey M. Gilbert, Ning Zhang, Yi-Hsiu Wang, Tao-Fei Samuel Ng
  • Patent number: 7672220
    Abstract: The present invention provides an apparatus and method of multiple antenna receiver combining of high data rate wideband packetized wireless communication signals, where the apparatus includes M receive antennas, receiving M high data rate wideband packetized wireless communication signals, where each of the signals includes N frequency bins. The apparatus, in an exemplary embodiment, includes (1) a joint timing recovery units that perform joint coarse signal timing estimation, joint frequency offset estimation, and joint fine timing estimation on each of the signals, (2) M Fast Fourier Transform units (FFTs) that each convert the digital data for each of the M signals into frequency domain information for each of the N received frequencies and that output Q pilots for each of the signals, where Q is a positive integer, and (3) a combiner that weights and combines the outputs of the M FFTs for each of the N received frequencies.
    Type: Grant
    Filed: March 6, 2008
    Date of Patent: March 2, 2010
    Assignee: Atheros Communications, Inc.
    Inventors: Ardavan Maleki Tehrani, Won-Joon Choi, Jeffrey M. Gilbert, Yi-Hsiu Wang
  • Publication number: 20100014504
    Abstract: A multiple-input multiple-output (MIMO) system can transmit on multiple antennas simultaneously and receive on multiple antennas simultaneously. Unfortunately, because a legacy 802.11a/g device is not able to decode multiple data streams, such a legacy device may “stomp” on a MIMO packet by transmitting before the transmission of the MIMO packet is complete. Therefore, MIMO systems and methods are provided herein to allow legacy devices to decode the length of a MIMO packet and to restrain from transmitting during that period. These MIMO systems and methods are optimized for efficient transmission of MIMO packets.
    Type: Application
    Filed: September 29, 2009
    Publication date: January 21, 2010
    Inventors: Qinfang Sun, Won-Joon Choi, Jeffrey M. Gilbert, Ardavan Maleki Tehrani
  • Publication number: 20090325369
    Abstract: A method of fabricating a semiconductor device includes forming a gate dielectric on a substrate, forming a gate structure on the gate dielectric, the gate structure comprising a stacked layer of a silicon layer and a metal layer, selectively etching the gate structure to form a gate pattern, forming a capping layer surrounding the gate pattern, plasma-treating the capping layer, and performing a gate reoxidation process
    Type: Application
    Filed: December 30, 2008
    Publication date: December 31, 2009
    Applicant: Hynix Semiconductor Inc.
    Inventors: Yong-Soo Kim, Moon-Sig Joo, Heung-Jae Cho, Won-Joon Choi
  • Patent number: 7623467
    Abstract: A system and method are disclosed for wireless channel estimation. Estimating the characteristics of a wireless channel includes receiving a plurality of training symbols sent for the purpose of facilitating channel estimation; calculating a phase difference between at least two of the training symbols; using the calculated phase difference to coherently combine the training symbols to produce a composite training symbol; and using the composite training symbol to estimate the channel.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: November 24, 2009
    Assignee: Atheros Communications, Inc.
    Inventors: Qinfang Sun, Won-Joon Choi, Jeffrey M. Gilbert, Yi-Hsiu Wang
  • Patent number: 7616698
    Abstract: A multiple-input multiple-output (MIMO) system can transmit on multiple antennas simultaneously and receive on multiple antennas simultaneously. Unfortunately, because a legacy 802.11a/g device is not able to decode multiple data streams, such a legacy device may “stomp” on a MIMO packet by transmitting before the transmission of the MIMO packet is complete. Therefore, MIMO systems and methods are provided herein to allow legacy devices to decode the length of a MIMO packet and to restrain from transmitting during that period. These MIMO systems and methods are optimized for efficient transmission of MIMO packets.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: November 10, 2009
    Assignee: Atheros Communications, Inc.
    Inventors: Qinfang Sun, Won-Joon Choi, Jeffrey M. Gilbert, Ardavan Maleki Tehrani
  • Publication number: 20090273018
    Abstract: A nonvolatile memory device with a blocking layer controlling the transfer of electric charges in a charge storage layer includes the blocking layer having a first blocking layer in contact with the charge storage layer and a second blocking layer over the first blocking layer, wherein the first blocking layer has a greater energy band gap than the second blocking layer and the second blocking layer has a greater permittivity than the first blocking layer.
    Type: Application
    Filed: April 27, 2009
    Publication date: November 5, 2009
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Heung-Jae CHO, Moon-Sig JOO, Yong-Soo KIM, Won-Joon CHOI
  • Publication number: 20090253242
    Abstract: A method of fabricating a non-volatile memory device includes: forming a tunnel insulation layer pattern and a floating gate electrode layer pattern over a semiconductor substrate; forming an isolation trench by etching an exposed portion of the semiconductor substrate so that the isolation trench is aligned with the tunnel insulation layer pattern and the floating gate electrode layer pattern; forming an isolation layer by filling the isolation trench with a filling insulation layer; forming a hafnium-rich hafnium silicon oxide layer over the isolation layer and the floating gate electrode layer pattern; forming a hafnium-rich hafnium silicon oxynitride layer by carrying out a first nitridation on the hafnium-rich hafnium silicon oxide layer; forming a silicon-rich hafnium silicon oxide layer over the hafnium-rich hafnium silicon oxynitride layer; forming a silicon-rich hafnium silicon oxynitride layer by carrying out a second nitridation on the silicon-rich hafnium silicon oxide layer; and forming a control
    Type: Application
    Filed: December 30, 2008
    Publication date: October 8, 2009
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Moon Sig Joo, Heung Jae Cho, Yong Soo Kim, Won Joon Choi
  • Publication number: 20090227116
    Abstract: A method for manufacturing a non-volatile memory device having a charge trap layer comprises in one embodiment: forming a first dielectric layer over a semiconductor substrate; forming a second dielectric layer having a higher dielectric constant than that of the first dielectric layer over the first dielectric layer; forming a nitride buffer layer for preventing an interfacial reaction over the second dielectric layer; forming a third dielectric layer by supplying a radical oxidation source onto the nitride buffer layer to oxidize the nitride buffer layer, thereby forming a tunneling layer comprising the first, second, and third dielectric layers; and forming a charge trap layer, a shielding layer, and a control gate electrode layer over the tunneling layer.
    Type: Application
    Filed: December 31, 2008
    Publication date: September 10, 2009
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Moon Sig Joo, Heung Jae Cho, Yong Soo Kim, Won Joon Choi, Sung Jin Whang
  • Publication number: 20090129304
    Abstract: A method for reducing power consumption in a multi-user digital communication system and mobile station employing the method adjusts receive and transmit mode durations of the mobile device using downlink and uplink allocations from a base station of the system, as well as other factors.
    Type: Application
    Filed: November 14, 2008
    Publication date: May 21, 2009
    Inventors: Youhan Kim, Won-Joon Choi
  • Publication number: 20090111254
    Abstract: A method for fabricating a semiconductor device includes forming an insulation layer over a substrate including a pattern for forming a multi-plane channel, forming a columnar polysilicon layer over the insulation layer and filling in the pattern, and performing a thermal treatment process.
    Type: Application
    Filed: December 28, 2007
    Publication date: April 30, 2009
    Applicant: Hynix Semiconductor, Inc.
    Inventors: Hong-Seon Yang, Heung-Jae Cho, Won-Joon Choi
  • Publication number: 20090010365
    Abstract: A system and method are disclosed for transmitting data over a wireless channel. In some embodiments, transmitting data includes receiving convolutionally encoded data and enhancing the transmission of the data by further repetition encoding the data.
    Type: Application
    Filed: July 1, 2008
    Publication date: January 8, 2009
    Inventors: Won-Joon Choi, Qinfang Sun, Jeffrey M. Gilbert
  • Publication number: 20080291893
    Abstract: An OFDM-based device and method for performing synchronization utilizes a time-domain preamble of an incoming OFDM-based signal to compute an estimated fine frequency offset. The computation of the estimated fine frequency offset involves multiplying values of the time-domain preamble with conjugates of corresponding values of a selected base station time-domain preamble, averaging the resulting multiplied values in predefined segments and self-correlating the resulting averaged values to derive a self-correlation value, which is used to compute the estimated fine frequency offset.
    Type: Application
    Filed: May 23, 2008
    Publication date: November 27, 2008
    Inventors: Jingnong Yang, Won-Joon Choi
  • Publication number: 20080291819
    Abstract: A soft-bit de-mapping device and method of generating soft bits for decoding quantizes a log-likelihood ratio (LLR) value for a received value using functions bits and channel parameter bits to generate the soft bits. The function bits are generated by quantizing an LLR function for the received value, which includes modifying an original curve of the LLR function to a modified curve such that a segment of the original curve with the lowest slope is protected in the modified curve for a fixed equal quantization step-size. The channel parameter bits are generated by quantizing a channel parameter for the received value to generate channel.
    Type: Application
    Filed: May 24, 2008
    Publication date: November 27, 2008
    Inventors: Gwang-Hyun Gho, Kee-Bong Song, Won-Joon Choi