Patents by Inventor Woo Duck Jung

Woo Duck Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170025293
    Abstract: Provided is a substrate processing apparatus, and more particularly, a batch-type substrate processing apparatus where processes can be performed independently on a plurality of substrates. The substrate processing apparatus includes a substrate boat including a plurality of partition plates and a plurality of connection rods, an internal reaction tube, a gas supply unit, and an exhaust unit, and a plurality of substrates are loaded to be separated from the partition plates.
    Type: Application
    Filed: July 19, 2016
    Publication date: January 26, 2017
    Inventors: Woo Duck JUNG, Kyu Jin CHOI, Song Hwan PARK, Seong Min HAN, Sung Ha CHOI
  • Publication number: 20160211141
    Abstract: Provided is a method and apparatus for depositing an amorphous silicon film. The method includes supplying a source gas and an atmospheric gas onto a substrate in a state where the substrate is loaded in a chamber to deposit the amorphous silicon film on the substrate. The atmospheric gas includes at least one of hydrogen and helium. The source gas includes at least one of silane (SiH2), disilane (Si2H6), and dichlorosilane (SiCl2H2).
    Type: Application
    Filed: September 15, 2014
    Publication date: July 21, 2016
    Applicant: EUGENE TECHNOLOGY CO., LTD.
    Inventors: Seung-Woo SHIN, Hai-Won KIM, Woo-Duck JUNG, Sung-Kil CHO, Wan-Suk OH, Ho-Min CHOI, Koon-Woo LEE
  • Publication number: 20160111291
    Abstract: The present disclosure relates to a semiconductor memory, device and a method of forming a semiconductor memory device. The method of manufacturing a semiconductor memory device, includes forming a tunnel insulation layer and a floating gate on a semiconductor substrate of an active region, forming a trench in the semiconductor substrate of an isolation region, forming, in the trench, a sacrificial layer having an upper surface positioned higher than a surface of the semiconductor substrate, forming a capping layer over the sacrificial layer, and forming an air gap by removing the sacrificial layer without removing the capping layer.
    Type: Application
    Filed: November 23, 2015
    Publication date: April 21, 2016
    Inventors: Tae Kyung KIM, Jung Myoung SHIM, Myung Kyu AHN, Sung Soon KIM, Woo Duck JUNG
  • Patent number: 9153475
    Abstract: A semiconductor device includes a semiconductor substrate having a plurality of isolation regions, a plurality of trenches, where each of the plurality of trenches is formed in a corresponding isolation region, of the plurality of isolation regions, and where the plurality of trenches are arranged, in parallel, along a first direction, a plurality of gate lines formed on the semiconductor substrate in a second direction crossing the plurality of trenches, an insulating layer formed between each of the plurality of gate lines, a first air gap formed in at least one of the plurality of trenches, the first air gap extending in the first direction, and a second air gap formed in at least one of the insulating layers, the second air gap extending in the second direction.
    Type: Grant
    Filed: August 30, 2012
    Date of Patent: October 6, 2015
    Assignee: SK Hynix Inc.
    Inventors: Woo Duck Jung, Sung Soon Kim, Ju Il Song
  • Publication number: 20140042516
    Abstract: The present disclosure relates to a semiconductor memory, device and a method of forming a semiconductor memory device. The semiconductor memory device includes a semiconductor substrate in which isolation regions and active regions are defined, gate lines formed on the semiconductor substrate in a direction crossing the isolation regions, a capping layer configured to define air gaps positioned higher than an upper surface of the semiconductor substrate in the isolation regions.
    Type: Application
    Filed: December 14, 2012
    Publication date: February 13, 2014
    Applicant: SK HYNIX INC.
    Inventors: Tae Kyung KIM, Jung Myoung SHIM, Myung Kyu AHN, Sung Soon KIM, Woo Duck JUNG
  • Publication number: 20130277730
    Abstract: A semiconductor device includes a semiconductor substrate having a plurality of isolation regions, a plurality of trenches, where each of the plurality of trenches is formed in a corresponding isolation region, of the plurality of isolation regions, and where the plurality of trenches are arranged, in parallel, along a first direction, a plurality of gate lines formed on the semiconductor substrate in a second direction crossing the plurality of trenches, an insulating layer formed between each of the plurality of gate lines, a first air gap formed in at least one of the plurality of trenches, the first air gap extending in the first direction, and a second air gap formed in at least one of the insulating layers, the second air gap extending in the second direction.
    Type: Application
    Filed: August 30, 2012
    Publication date: October 24, 2013
    Inventors: Woo Duck Jung, Sung Soon Kim, Ju Il Song