Abstract: A cleaning solution and methods of fabricating semiconductor devices using the same are provided. A cleaning solution used for cleaning a silicon surface and methods of fabricating a semiconductor device using the same are also provided. The cleaning solution may include 0.01 to 1 wt % of fluoric acid, 20 to 50 wt % of oxidizer and 50 to 80 wt % of water. The cleaning solution may further include 1 to 20 wt % of acetic acid. The cleaning solution may be used to clean a silicon surface exposed during fabrication processes of a semiconductor device. The cleaning solution may reduce damage of other material layers (e.g., a tungsten layer or a silicon oxide layer) and enable the silicon surface to be selectively etched.

Abstract: A sacrificial layer and wet etch are used to form a sidewall spacer so as to prevent damage to the structure on which the spacer is formed and to the underlying substrate as well. Once the structure is formed on the substrate a spacer formation layer is formed to cover the structure, and a sacrificial layer is formed on the spacer formation layer. The sacrificial layer is wet etched to form a sacrificial layer pattern on that portion of the spacer formation layer extending along a sidewall of the structure. The spacer is formed on the sidewall of the structure by wet etching the spacer formation layer using the sacrificial layer pattern as a mask.

Abstract: A semiconductor device having a capacitor and a method of fabricating the same may be provided. A method of fabricating a semiconductor device may include forming an etch stop layer and a mold layer sequentially on a substrate, patterning the mold layer to form a mold electrode hole exposing a portion of the etch stop layer, etching selectively the exposed etch stop layer by an isotropic dry etching process to form a contact electrode hole through the etch stop layer to expose a portion of the substrate, forming a conductive layer on the substrate and removing the conductive layer on the mold layer on the mold layer to form a cylindrical bottom electrode in the mold and contact electrode holes. The isotropic dry etching process may utilize a process gas including main etching gas and selectivity adjusting gas. The selectivity adjusting gas may increase an etch rate of the etch stop layer by more than an etch rate of the mold layer by the isotropic wet etching process.

Abstract: A semiconductor device having a capacitor and a method of fabricating the same may be provided. A method of fabricating a semiconductor device may include forming an etch stop layer and a mold layer sequentially on a substrate, patterning the mold layer to form a mold electrode hole exposing a portion of the etch stop layer, etching selectively the exposed etch stop layer by an isotropic dry etching process to form a contact electrode hole through the etch stop layer to expose a portion of the substrate, forming a conductive layer on the substrate and removing the conductive layer on the mold layer on the mold layer to form a cylindrical bottom electrode in the mold and contact electrode holes. The isotropic dry etching process may utilize a process gas including main etching gas and selectivity adjusting gas. The selectivity adjusting gas may increase an etch rate of the etch stop layer by more than an etch rate of the mold layer by the isotropic wet etching process.

Abstract: A method of forming fine pitch hardmask patterns includes forming a hardmask layer on a substrate and forming a plurality of first mask patterns on the hardmask layer. A buffer layer is formed on the plurality of first mask patterns, and has an upper surface defining recesses between adjacent first mask patterns. Second mask patterns are formed within the recesses formed in the upper surface of the buffer layer. The buffer layer is partially removed to expose upper surfaces of the plurality of first mask patterns, and the buffer layer is then partially removed using the first mask patterns and the second mask patterns as an etch mask to expose the hardmask layer between the first mask pattern and the second mask pattern. Using the first mask patterns and the second mask patterns as an etch mask, the hardmask layer is etched to form hardmask patterns.

Abstract: A transistor having a metal nitride layer pattern, etchant and methods of forming the same is provided. A gate insulating layer and/or a metal nitride layer may be formed on a semiconductor substrate. A mask layer may be formed on the metal nitride layer. Using the mask layer as an etching mask, an etching process may be performed on the metal nitride layer, forming the metal nitride layer pattern. An etchant, which may have an oxidizing agent, a chelate agent and/or a pH adjusting mixture, may perform the etching. The methods may reduce etching damage to a gate insulating layer under the metal nitride layer pattern during the formation of a transistor.

Abstract: A transistor having a metal nitride layer pattern, etchant and methods of forming the same is provided. A gate insulating layer and/or a metal nitride layer may be formed on a semiconductor substrate. A mask layer may be formed on the metal nitride layer. Using the mask layer as an etching mask, an etching process may be performed on the metal nitride layer, forming the metal nitride layer pattern. An etchant, which may have an oxidizing agent, a chelate agent and/or a pH adjusting mixture, may perform the etching. The methods may reduce etching damage to a gate insulating layer under the metal nitride layer pattern during the formation of a transistor.

Abstract: In one embodiment, a semiconductor device comprises a base and a tapered wall formed on the base. The wall has a midline and also has an inner sidewall and an outer sidewall. The inner sidewall and the outer sidewall are substantially symmetrical with each other in relation to the midline. Thus, the reliability of the semiconductor capacitor structure can be improved and the throughput can be increased. Also, further scaling down of semiconductor devices can be facilitated with the principles of the present invention.

Abstract: A sacrificial layer and wet etch are used to form a sidewall spacer so as to prevent damage to the structure on which the spacer is formed and to the underlying substrate as well. Once the structure is formed on the substrate a spacer formation layer is formed to cover the structure, and a sacrificial layer is formed on the spacer formation layer. The sacrificial layer is wet etched to form a sacrificial layer pattern on that portion of the spacer formation layer extending along a sidewall of the structure. The spacer is formed on the sidewall of the structure by wet etching the spacer formation layer using the sacrificial layer pattern as a mask.

Abstract: In a method of manufacturing a semiconductor device such as a SONOS type semiconductor device, a trench is formed on a substrate. An isolation layer protruding from the substrate is formed to fill the trench. After a first layer is formed on the substrate, a preliminary second layer pattern is formed on the first layer. The preliminary second layer pattern has an upper face substantially lower than or substantially equal to an upper face of the isolation layer. A third layer is formed on the preliminary second layer and the isolation layer. A fourth layer is formed on the third layer. The fourth layer, the third layer, the preliminary second layer pattern and the first layer are partially etched to form a gate structure on the substrate. Source/drain regions are formed at portions of the substrate adjacent to the gate structure.

Abstract: Example embodiments relate to a method of treating a substrate after performing a cleaning step with a liquid chemical in a single substrate spin cleaner. A method of treating a substrate according to example embodiments may include forming a film of deionized water on a surface of the substrate during rinsing, and drying the substrate by supplying a drying gas to the water film on the surface of the substrate. When rinsing the substrate, the rotating speed of the substrate may be reduced to about 50 rpm or less to form a film of water on the surface of the substrate. The film of water may shield the surface of the substrate from direct exposure to atmospheric air. The film of water may be maintained on the surface of the substrate when commencing the supply of the drying gas. Consequently, the number of water marks on the dried substrate may be reduced or prevented.

Abstract: Provided are an anionic surfactant-containing etching solution for removal of an oxide film, preparation methods thereof, and methods of fabricating a semiconductor device using the etching solution. The etching solution includes a hydrofluoric acid (HF), deionized water, and an anionic surfactant. The anionic surfactant is a compound in which an anime salt is added as a counter ion, as represented by R1—OSO3?HA+, R1—CO2?HA+,R1—PO42—(HA+)2,(R1)2—PO4—HA+, or R1—SO3—HA+ where R1 is a straight or branched hydrocarbon group of C4 to C22 and A is ammonia or amine. The etching solution provides a high etching selectivity ratio of an oxide film to a nitride film or a polysilicon film. Therefore, in a semiconductor device fabrication process such as a STI device isolation process or a capacitor formation process, when an oxide film is exposed together with a nitride film or a polysilicon film, the etching solution can be efficiently used in selectively removing only the oxide film.

Abstract: In one aspect, a method of fabricating a semiconductor memory device is provided which includes forming a mold insulating film over first and second portions of a semiconductor substrate, where the mold insulating film includes a plurality of storage node electrode holes spaced apart over the first portion of the semiconductor substrate. The method further includes forming a plurality of storage node electrodes on inner surfaces of the storage node electrode holes, respectively, and forming a capping film which covers the storage node electrodes and a first portion of the mold insulating film located over the first portion of the semiconductor substrate, and which exposes a second portion of the mold insulating film located over the second portion of the semiconductor substrate.

Abstract: There are provided a cleaning solution for a silicon surface containing a buffer solution including acetic acid (CH3COOH) and ammonium acetate (CH3COONH4), iodine oxidizer, hydrofluoric acid (HF), and water. In a method for fabricating a semiconductor device, a silicon substrate may have an exposed silicon surface, which may be cleaned using a cleaning solution that contains a buffer solution including acetic acid and ammonium acetate, iodine oxidizer, hydrofluoric acid, and water.

Abstract: Provided is a method of manufacturing a capacitor of a semiconductor device, which can prevent tilting or an electrical short of a lower electrode. In the method, a mesh-type bridge insulating layer is formed above the contact plug on a mold oxide layer. The mold oxide layer and the bridge insulating layer are etched to define an electrode region. The mold oxide layer is removed using an etching gas having an etch selectivity of 500 or greater for the mold oxide layer with respect to the bridge insulating layer.

Abstract: This invention provides methods of fabricating semiconductor devices, wherein an alloy layer is formed on a semiconductor substrate to form a substrate structure, which methods include using an aqueous solution diluted ammonia and peroxide mixture (APM) to perform cleaning and/or wet etching treatment steps on the substrate structure.

Abstract: Methods of manufacturing non-volatile memory devices are provided including sequentially forming a tunnel insulating layer, a charge-trapping layer, a blocking layer and a conductive layer on a substrate having a channel region. The conductive layer is patterned to form a word line structure, and the blocking layer and the charge-trapping layer are etched using an aqueous acid solution as an etching solution to form a blocking layer pattern and a charge-trapping layer pattern.

Abstract: Provided are a substrate cleaning composition including a fluoride compound, an inorganic acid, and deionized water, and a method of forming a gate using the same. The fluoride compound is one of HF, NH4F, and a combination thereof, and the inorganic acid is one of HNO3, HCl, HCIO4, H2SO4, or H5IO6. The substrate cleaning composition removes polymer by-products generated by etching a metal layer for forming a gate, but not other layers.

Abstract: This invention provides methods of fabricating semiconductor devices, wherein an alloy layer is formed on a semiconductor substrate to form a substrate structure, which methods include using an aqueous solution diluted ammonia and peroxide mixture (APM) to perform cleaning and/or wet etching treatment steps on the substrate structure.

Abstract: A method for cleaning a substrate on which a silicon layer and a silicon germanium layer are formed and exposed, and method for fabricating a semiconductor device using the cleaning method are disclosed. The cleaning method comprises preparing a semiconductor substrate on which a silicon layer and a silicon germanium layer are formed and exposed; and performing a first cleaning sub-process that uses a first cleaning solution to remove a native oxide layer from the semiconductor substrate. The cleaning method further comprises performing a second cleaning sub-process on the semiconductor substrate after performing the first cleaning sub-process, wherein the second cleaning sub-process comprises using a second cleaning solution. In addition, the second cleaning solution comprises ammonium hydroxide (NH4OH), hydrogen peroxide (H2O2), and deionized water (H2O), and the second cleaning solution comprises at least 200 times more deionized water (H2O) than ammonium hydroxide (NH4OH) by volume.