Patents by Inventor Woo-gwan Shim

Woo-gwan Shim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080047576
    Abstract: In a single-substrate type apparatus for processing a substrate, the apparatus includes a chamber, a bottom panel, a solution supplying part and a substrate holder. The chamber has an upper portion and a lower portion. The bottom panel is detachably connected to the lower portion. The solution supplying part is connected to the bottom panel to supply a processing solution to the substrate in the chamber. The substrate holder provides the substrate into the chamber, the substrate holder holding both side portions of the substrate such that the substrate is vertically arranged.
    Type: Application
    Filed: August 23, 2007
    Publication date: February 28, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Ok KIM, Chang-Ki HONG, Kun-Tack LEE, In-Gi KIM, Woo-Gwan SHIM, Jeong-Nam HAN, Kang-Youn LEE
  • Patent number: 7322385
    Abstract: An apparatus for drying a substrate using the Marangoni effect is disclosed. The apparatus includes a rotatable supporting portion on which a substrate is placed. A first nozzle for supplying de-ionized water and a second nozzle for supplying isopropyl alcohol vapor are provided on the supporting portion. When the isopropyl alcohol vapor is supplied to the center of the substrate at the initial stage, the amount of alcohol that reaches the substrate is controlled by a controlling portion such that the amount of the second liquid gradually increases.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: January 29, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Yong Kim, Chang-Ki Hong, Sang-Jun Choi, Woo-Gwan Shim
  • Publication number: 20080014752
    Abstract: A method of forming fine pitch hardmask patterns includes forming a hardmask layer on a substrate and forming a plurality of first mask patterns on the hardmask layer. A buffer layer is formed on the plurality of first mask patterns, and has an upper surface defining recesses between adjacent first mask patterns. Second mask patterns are formed within the recesses formed in the upper surface of the buffer layer. The buffer layer is partially removed to expose upper surfaces of the plurality of first mask patterns, and the buffer layer is then partially removed using the first mask patterns and the second mask patterns as an etch mask to expose the hardmask layer between the first mask pattern and the second mask pattern. Using the first mask patterns and the second mask patterns as an etch mask, the hardmask layer is etched to form hardmask patterns.
    Type: Application
    Filed: April 20, 2007
    Publication date: January 17, 2008
    Inventors: Ji-hoon Cha, Chang-ki Hong, Kun-tack Lee, Woo-gwan Shim, Chang-sup Mun, Ho-wook Choi
  • Publication number: 20070293054
    Abstract: Provided herein are etching, cleaning and drying methods using a supercritical fluid, and a chamber system for conducting the same. The etching method includes etching the material layer using a supercritical carbon dioxide in which an etching chemical is dissolved, and removing an etching by-product created from a reaction between the material layer and the etching chemical using a supercritical carbon dioxide in which a cleaning chemical is dissolved. Methods of manufacturing a semiconductor device are also provided.
    Type: Application
    Filed: May 23, 2007
    Publication date: December 20, 2007
    Inventors: Hyo-San Lee, Chang-Ki Hong, Kun-Tack Lee, Woo-Gwan Shim, Jeong-Nam Han
  • Publication number: 20070254425
    Abstract: Example embodiments of the present invention relates to methods of fabricating a semiconductor device. Other example embodiments of the present invention relate to methods of fabricating a semiconductor device using a metal nitride layer as a gate electrode. The methods may include providing a semiconductor substrate having a first region and a second region. A gate insulating layer, a metal nitride layer and/or an amorphous carbon layer may be sequentially formed on the substrate. The amorphous carbon layer may be selectively etched, forming an amorphous carbon mask covering the first region. The metal nitride layer, exposed by the amorphous carbon mask, may be etched, forming a preliminary metal nitride pattern. The amorphous carbon mask may be removed.
    Type: Application
    Filed: January 18, 2007
    Publication date: November 1, 2007
    Inventors: Sang-Yong Kim, Mong-Sup Lee, Chang-Ki Hong, Woo-Gwan Shim
  • Publication number: 20070178706
    Abstract: A cleaning solution and methods of fabricating semiconductor devices using the same are provided. A cleaning solution used for cleaning a silicon surface and methods of fabricating a semiconductor device using the same are also provided. The cleaning solution may include 0.01 to 1 wt % of fluoric acid, 20 to 50 wt % of oxidizer and 50 to 80 wt % of water. The cleaning solution may further include 1 to 20 wt % of acetic acid. The cleaning solution may be used Lo clean a silicon surface exposed during fabrication processes of a semiconductor device. The cleaning solution may reduce damage of other material layers (e.g., a tungsten layer or a silicon oxide layer) and enable the silicon surface to be selectively etched.
    Type: Application
    Filed: January 23, 2007
    Publication date: August 2, 2007
    Inventors: Sang-Yong Kim, Chang-Ki Hong, Woo-Gwan Shim
  • Publication number: 20070163618
    Abstract: There are provided a cleaning solution for a silicon surface containing a buffer solution including acetic acid (CH3COOH) and ammonium acetate (CH3COONH4), iodine oxidizer, hydrofluoric acid (HF), and water. In a method for fabricating a semiconductor device, a silicon substrate may have an exposed silicon surface, which may be cleaned using a cleaning solution that contains a buffer solution including acetic acid and ammonium acetate, iodine oxidizer, hydrofluoric acid, and water.
    Type: Application
    Filed: July 20, 2006
    Publication date: July 19, 2007
    Inventors: Sang-Yong Kim, Chang-Ki Hong, Woo-Gwan Shim
  • Publication number: 20070111432
    Abstract: A semiconductor device having a capacitor and a method of fabricating the same may be provided. A method of fabricating a semiconductor device may include forming an etch stop layer and a mold layer sequentially on a substrate, patterning the mold layer to form a mold electrode hole exposing a portion of the etch stop layer, etching selectively the exposed etch stop layer by an isotropic dry etching process to form a contact electrode hole through the etch stop layer to expose a portion of the substrate, forming a conductive layer on the substrate and removing the conductive layer on the mold layer on the mold layer to form a cylindrical bottom electrode in the mold and contact electrode holes. The isotropic dry etching process may utilize a process gas including main etching gas and selectivity adjusting gas. The selectivity adjusting gas may increase an etch rate of the etch stop layer by more than an etch rate of the mold layer by the isotropic wet etching process.
    Type: Application
    Filed: November 6, 2006
    Publication date: May 17, 2007
    Inventors: Jung-Min Oh, Jeong-Nam Han, Chang-Ki Hong, Woo-Gwan Shim, Im-Soo Park
  • Publication number: 20070082471
    Abstract: In one aspect, a method of fabricating a semiconductor memory device is provided which includes forming a mold insulating film over first and second portions of a semiconductor substrate, where the mold insulating film includes a plurality of storage node electrode holes spaced apart over the first portion of the semiconductor substrate. The method further includes forming a plurality of storage node electrodes on inner surfaces of the storage node electrode holes, respectively, and forming a capping film which covers the storage node electrodes and a first portion of the mold insulating film located over the first portion of the semiconductor substrate, and which exposes a second portion of the mold insulating film located over the second portion of the semiconductor substrate.
    Type: Application
    Filed: October 12, 2006
    Publication date: April 12, 2007
    Inventors: Dae-hyuk Kang, Jung-min Oh, Chang-ki Hong, Sang-jun Choi, Woo-gwan Shim
  • Publication number: 20070072431
    Abstract: A method for cleaning a substrate on which a silicon layer and a silicon germanium layer are formed and exposed, and method for fabricating a semiconductor device using the cleaning method are disclosed. The cleaning method comprises preparing a semiconductor substrate on which a silicon layer and a silicon germanium layer are formed and exposed; and performing a first cleaning sub-process that uses a first cleaning solution to remove a native oxide layer from the semiconductor substrate. The cleaning method further comprises performing a second cleaning sub-process on the semiconductor substrate after performing the first cleaning sub-process, wherein the second cleaning sub-process comprises using a second cleaning solution. In addition, the second cleaning solution comprises ammonium hydroxide (NH4OH), hydrogen peroxide (H2O2), and deionized water (H2O), and the second cleaning solution comprises at least 200 times more deionized water (H2O) than ammonium hydroxide (NH4OH) by volume.
    Type: Application
    Filed: September 27, 2006
    Publication date: March 29, 2007
    Inventors: Chang-Sup Mun, Woo-Gwan Shim, Han-Ku Cho, Chang-Ki Hong, Doo-Won Kwon
  • Publication number: 20070051700
    Abstract: Provided are a substrate cleaning composition including a fluoride compound, an inorganic acid, and deionized water, and a method of forming a gate using the same. The fluoride compound is one of HF, NH4F, and a combination thereof, and the inorganic acid is one of HNO3, HCI, HCIO4, H2SO4, or H5IO6. The substrate cleaning composition removes polymer by-products generated by etching a metal layer for forming a gate, but not other layers.
    Type: Application
    Filed: June 1, 2006
    Publication date: March 8, 2007
    Inventors: Hyo-san Lee, Sang-yong Kim, Chang-ki Hong, Woo-gwan Shim, Jeong-nam Han
  • Patent number: 7179739
    Abstract: Embodiments of the present invention include methods of forming a contact to a capacitor in a semiconductor device. A metal silicide layer is formed at a top surface of a conductive plug of the semiconductor device that is coupled to a bottom electrode of the capacitor to provide an ohmic contact therebetween. Forming a metal silicide layer may include exposing a surface of the conductive plug, depositing a metal layer of the bottom electrode on the exposed surface of the conductive plug and thermally processing the semiconductor device to react a part of the deposited metal layer and the conductive plug to form the metal silicide layer. Methods of forming a semiconductor device including a capacitor having a metal silicide layer connecting a bottom electrode of the capacitor and a conductive plug are also provided.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: February 20, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-Sik Choi, Jung-Hee Chung, Woo-Gwan Shim, Young-Sun Kim, Jae-Hyoung Choi, Se-Hoon Oh, Cha-Young Yoo
  • Patent number: 7141123
    Abstract: A cleanling apparatus for removing contaminants from the surface of a substrate includes two parts: one which produces an aerosol including frozen particles and directs the aerosol onto the surface of the substrate to remove contaminants from the surface by physical force, and another part in which a fluid including a gaseous reactant is directed onto the surface of the substrate while the surface is irradiated to cause a chemical reaction between the reactant and organic contaminants on the surface, to chemically removing the organic contaminants. In the method of cleaning the substrate, the physical and chemical cleaning processes are carried out in a separate manner from one another so that the frozen particles of the aerosol are not exposed to the effects of the light used in irradiating the surface of the substrate. Therefore, the effectiveness of the aerosol in cleaning the substrate is maximized.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: November 28, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon-hee Lee, Kun-tack Lee, Woo-gwan Shim, Jong-ho Chung
  • Publication number: 20060246666
    Abstract: A method of fabricating a flash memory having a U-shape floating gate is provided. The method includes forming adjacent isolation layers separated by a gap and forming a tunnel oxide layer in the gap. After a conductive layer is formed on the tunnel oxide layer to a thickness not to fill the gap, a polishing sacrificial layer is formed on the conductive layer. The sacrificial layer and the conductive layer on the isolation layers are removed, thereby forming a U-shape floating gate self-aligned in the gap, and concurrently forming a sacrificial layer pattern within an inner portion of the floating gate. Selected isolation layers are then recessed to expose sidewalls of the floating gate. The sacrificial layer pattern is then removed from the floating gate to expose an upper surface of the floating gate.
    Type: Application
    Filed: April 26, 2006
    Publication date: November 2, 2006
    Inventors: Jeong-nam Han, Dong-chan Kim, Chang-jin Kang, Kyeong-koo Chi, Woo-gwan Shim, Hyo-san Lee, Chang-ki Hong, Sang-jun Choi
  • Patent number: 7122478
    Abstract: A method of manufacturing a semiconductor device using a polysilicon layer as an etching mask includes: (a) forming an interlayer dielectric over a semiconductor substrate; (b) forming a polysilicon layer pattern over the interlayer dielectric; (c) forming a contact hole in the interlayer dielectric by etching the interlayer dielectric using the polysilicon layer pattern as an etching mask; (d) removing the polysilicon layer pattern by an etching process that has a large etching selectivity of the polisilicon layer with respect to the interlayer dielectric and about 3% or less etching uniformity; and (e) forming a contact by filling the contact hole with a conductive material.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: October 17, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-Nam Han, Woo-Gwan Shim, Woo-Sung Han, Chang-Ki Hong, Sang Jun Choi
  • Publication number: 20060228890
    Abstract: A cleaning solution includes acetic acid, an inorganic acid, a fluoride compound, and deionized water, and may further include a corrosion inhibitor, a chelating agent, or a combination thereof. The cleaning solution may be used in the formation of a metal pattern in which a metal film including ruthenium is formed on a surface of a substrate, and a portion of the metal film is dry-etched to form a metal film pattern. After dry-etching, the metal film pattern is cleaned with the cleaning solution to remove an etching by-product layer around the metal film pattern. The cleaning solution may also be used to remove an etching by-product layer around an oxide film pattern prior to dry-etching of the metal film.
    Type: Application
    Filed: April 12, 2006
    Publication date: October 12, 2006
    Inventors: Hyo-san Lee, Sang-yong Kim, Chang-ki Hong, Sang-jun Choi, Woo-gwan Shim, Im-soo Park, Kui-jong Baik, Woong Han, Jung-hun Lim, Sang-won Lee, Sung-bae Kim, Hyun-tak Kim
  • Publication number: 20060189148
    Abstract: A transistor having a metal nitride layer pattern, etchant and methods of forming the same is provided. A gate insulating layer and/or a metal nitride layer may be formed on a semiconductor substrate. A mask layer may be formed on the metal nitride layer. Using the mask layer as an etching mask, an etching process may be performed on the metal nitride layer, forming the metal nitride layer pattern. An etchant, which may have an oxidizing agent, a chelate agent and/or a pH adjusting mixture, may perform the etching. The methods may reduce etching damage to a gate insulating layer under the metal nitride layer pattern during the formation of a transistor.
    Type: Application
    Filed: February 22, 2006
    Publication date: August 24, 2006
    Inventors: Sang-Yong Kim, Ji-Hoon Cha, Woo-Gwan Shim, Chang-Ki Hong, Sang-Jun Choi
  • Publication number: 20060189064
    Abstract: Provided is a method of manufacturing a capacitor of a semiconductor device, which can prevent tilting or an electrical short of a lower electrode. In the method, a mesh-type bridge insulating layer is formed above the contact plug on a mold oxide layer. The mold oxide layer and the bridge insulating layer are etched to define an electrode region. The mold oxide layer is removed using an etching gas having an etch selectivity of 500 or greater for the mold oxide layer with respect to the bridge insulating layer.
    Type: Application
    Filed: January 11, 2006
    Publication date: August 24, 2006
    Inventors: Woo-Gwan Shim, Jung-Min Oh, Chang-Ki Hong, Sang-Jun Choi, Sang-Yong Kim
  • Publication number: 20060183297
    Abstract: Provided are an anionic surfactant-containing etching solution for removal of an oxide film, preparation methods thereof, and methods of fabricating a semiconductor device using the etching solution. The etching solution includes a hydrofluoric acid (HF), deionized water, and an anionic surfactant. The anionic surfactant is a compound in which an anime salt is added as a counter ion, as represented by R1—OSO3?HA+, R1—CO2?HA+, R1—PO42?(HA+)2, (R1)2—PO4?HA+, or R1—SO3?HA+ where R1 is a straight or branched hydrocarbon group of C4 to C22 and A is ammonia or amine. The etching solution provides a high etching selectivity ratio of an oxide film to a nitride film or a polysilicon film. Therefore, in a semiconductor device fabrication process such as a STI device isolation process or a capacitor formation process, when an oxide film is exposed together with a nitride film or a polysilicon film, the etching solution can be efficiently used in selectively removing only the oxide film.
    Type: Application
    Filed: May 16, 2005
    Publication date: August 17, 2006
    Inventors: Chang-Sup Mun, Hyung-Ho Ko, Woo-Gwan Shim, Chang-Ki Hong, Sang-Jun Choi
  • Publication number: 20060172907
    Abstract: According to an example embodiment of the present invention, the microelectronic cleaning agent may include a fluoride component, an acid component, a chelating agent, a surfactant and water. Example embodiments of the present invention provide a microelectronic cleaning agent which can selectively remove, for example, a high-k dielectric layer. The microelectronic cleaning agent includes from about 0.001 weight % to about 10 weight % of a fluoride component, from about 0.001 weight % to about 30 weight % of an acid component, from about 0.001 weight % to about 20 weight % of a chelating agent, from about 0.001 weight % to about 10 weight % of a surfactant, and water (H2O). The water may comprise the remainder of the cleaning agent. According to another embodiment of the present invention, a method of fabricating a semiconductor device using the microelectronic cleaning agent is also provided.
    Type: Application
    Filed: January 30, 2006
    Publication date: August 3, 2006
    Inventors: Sang-Yong Kim, Ji-Hoon Cha, Chang-Ki Hong, Sang-Jun Choi, Woo-Gwan Shim, Kui-Jong Baek, Sung-Bae Kim, Hyun-Tak Kim, Sang-Won Lee, Woong Han, Jung-Hun Lim