Patents by Inventor Woo-jin Jang

Woo-jin Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8993436
    Abstract: A method for fabricating a semiconductor device includes sequentially forming an etch stop film and an insulating film on a substrate including a lower pattern forming a conductive mask pattern including a first opening on the insulating film, forming a via-hole in the insulating film using the conductive mask pattern as an etch mask, the via-hole exposing the etch stop film, removing the conductive mask pattern, and forming a passivation film along a side wall of the via-hole after removing the conductive mask pattern.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: March 31, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Whan Ko, Jong-Sam Kim, Hong-Jae Shin, Seung-Il Bok, Sae-Il Son, Woo-Jin Jang
  • Publication number: 20140308810
    Abstract: A method for fabricating a semiconductor device includes sequentially forming an etch stop film and an insulating film on a substrate including a lower pattern forming a conductive mask pattern including a first opening on the insulating film, forming a via-hole in the insulating film using the conductive mask pattern as an etch mask, the via-hole exposing the etch stop film, removing the conductive mask pattern, and forming a passivation film along a side wall of the via-hole after removing the conductive mask pattern.
    Type: Application
    Filed: March 6, 2014
    Publication date: October 16, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Whan KO, Jong-Sam KIM, Hong-Jae SHIN, Seung-Il BOK, Sae-Il SON, Woo-Jin JANG
  • Patent number: 8697455
    Abstract: Disclosed is a monitoring TEG for an etching process in a semiconductor device. The TEG includes an etch stopping layer on a substrate and a target layer to be etched provided on the etch stopping layer. The target layer to be etched includes a first opening portion formed by etching a portion of the target layer to be etched and a second opening portion formed by etching another portion of the target layer to be etched. The second opening portion has a smaller depth than the first opening portion. A depth of a partial contact hole formed by a first partial etching process may be measured.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: April 15, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-Woo Lee, Hong-Jae Shin, Woo-Jin Jang
  • Patent number: 8371551
    Abstract: An apparatus for adjusting the level of a refrigerator includes: a main body; a guide groove formed to be level in a forward/backward direction of the main body; a movement unit inserted in the guide groove and moving in the direction in which the main body is inclined; a contact point part formed at one of both ends of the guide groove and selectively connected to the movement unit; and a notifying unit informing about whether or not the contact point part is connected. When the refrigerator is installed, an installation technician can recognize whether or not the refrigerator is installed to be level regardless of a skilled degree of the installation technician, so the installation time can be shortened and a service satisfaction of consumers can be increased.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: February 12, 2013
    Assignee: LG Electronics Inc.
    Inventor: Woo-Jin Jang
  • Patent number: 8373273
    Abstract: Methods of forming integrated circuit devices include forming an interlayer insulating layer having a trench therein, on a substrate and forming an electrical interconnect (e.g., Cu damascene interconnect) in the trench. An upper surface of the interlayer insulating layer is recessed to expose sidewalls of the electrical interconnect. An electrically insulating first capping pattern is formed on the recessed upper surface of the interlayer insulating layer and on the exposed sidewalls of the electrical interconnect, but is removed from an upper surface of the electrical interconnect. A metal diffusion barrier layer is formed on an upper surface of the electrical interconnect, however, the first capping pattern is used to block formation of the metal diffusion barrier layer on the sidewalls of the electrical interconnect. This metal diffusion barrier layer may be formed using an electroless plating technique.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: February 12, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyeok-Sang Oh, Woo-Jin Jang, Bum-Ki Moon, Ji-Hong Choi, Minseok Oh, Tien-Jen Cheng
  • Publication number: 20120267785
    Abstract: Methods of forming integrated circuit devices include forming an interlayer insulating layer having a trench therein, on a substrate and forming an electrical interconnect (e.g., Cu damascene interconnect) in the trench. An upper surface of the interlayer insulating layer is recessed to expose sidewalls of the electrical interconnect. An electrically insulating first capping pattern is formed on the recessed upper surface of the interlayer insulating layer and on the exposed sidewalls of the electrical interconnect, but is removed from an upper surface of the electrical interconnect. A metal diffusion barrier layer is formed on an upper surface of the electrical interconnect, however, the first capping pattern is used to block formation of the metal diffusion barrier layer on the sidewalls of the electrical interconnect. This metal diffusion barrier layer may be formed using an electroless plating technique.
    Type: Application
    Filed: June 26, 2012
    Publication date: October 25, 2012
    Inventors: Hyeok-Sang Oh, Woo-Jin Jang, Bum-Ki Moon, Ji-Hong Choi, Minseok Oh, Tien-Jen Cheng
  • Patent number: 8272703
    Abstract: Provided is a home-bar door and a method of manufacturing the home-bar door. The home-bar door includes a first case, an insulating plate, and a second case. The first case forms a portion of an exterior of the home-bar door, and the insulating plate is disposed in the first case as a separate component. The second case is configured to be coupled to the first case to cover the insulating plate and form the exterior of the home-bar door. Therefore, since the first and second cases can be coupled to each other after disposing the insulating plate between the first and second cases, the home-bar door can be efficiently manufactured and have good quality.
    Type: Grant
    Filed: April 2, 2008
    Date of Patent: September 25, 2012
    Assignee: LG Electronics Inc.
    Inventor: Woo Jin Jang
  • Publication number: 20120231564
    Abstract: Disclosed is a monitoring TEG for an etching process in a semiconductor device. The TEG includes an etch stopping layer on a substrate and a target layer to be etched provided on the etch stopping layer. The target layer to be etched includes a first opening portion formed by etching a portion of the target layer to be etched and a second opening portion formed by etching another portion of the target layer to be etched. The second opening portion has a smaller depth than the first opening portion. A depth of a partial contact hole formed by a first partial etching process may be measured.
    Type: Application
    Filed: March 8, 2012
    Publication date: September 13, 2012
    Inventors: KYOUNG-WOO LEE, Hong-Jae Shin, Woo-Jin Jang
  • Patent number: 8232200
    Abstract: Methods of forming integrated circuit devices include forming an interlayer insulating layer having a trench therein, on a substrate and forming an electrical interconnect (e.g., Cu damascene interconnect) in the trench. An upper surface of the interlayer insulating layer is recessed to expose sidewalls of the electrical interconnect. An electrically insulating first capping pattern is formed on the recessed upper surface of the interlayer insulating layer and on the exposed sidewalls of the electrical interconnect, but is removed from an upper surface of the electrical interconnect. A metal diffusion barrier layer is formed on an upper surface of the electrical interconnect, however, the first capping pattern is used to block formation of the metal diffusion barrier layer on the sidewalls of the electrical interconnect. This metal diffusion barrier layer may be formed using an electroless plating technique.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: July 31, 2012
    Assignees: International Business Machines Corporation, Samsung Electronics Co., Ltd., Advanced Micro Devices, Inc., Infineon Technologies AG
    Inventors: Hyeok-Sang Oh, Woo-Jin Jang, Bum-Ki Moon, Ji-Hong Choi, Minseok Oh, Tien-Jen Cheng
  • Publication number: 20110080902
    Abstract: A preamble acquisition apparatus includes a first PN code generation unit for generating a first PN code having a bit string, a first correlation calculation unit for correlating a received frequency domain preamble signal with the first PN code within a first correlation range to generate a first correlation value, a first correlation value comparison unit for comparing the first correlation value with a first threshold value, a second PN code generation unit for generating a second PN code, a second correlation calculation unit for correlating the received frequency domain preamble signal with the second PN code within a second correlation range to generate a second correlation value, and a preamble acquisition determination unit for comparing the second correlation value with a second threshold value to determine whether to acquire the preamble. The bit values of the first PN code are located in the second PN code.
    Type: Application
    Filed: December 10, 2010
    Publication date: April 7, 2011
    Applicant: PANTECH CO., LTD.
    Inventor: Woo Jin JANG
  • Patent number: 7879720
    Abstract: Methods of forming electrical interconnects include forming a copper pattern on a semiconductor substrate and then forming an electrically insulating capping layer on the copper pattern and an interlayer insulating layer on the electrically insulating capping layer. A contact hole is then formed, which extends through the interlayer insulating layer and the electrically insulating capping layer and exposes an upper surface of the copper pattern. An electroless plating step is then performed to form a copper pattern extension onto the exposed upper surface of the copper pattern. The copper pattern extension may have a thickness that is less than a thickness of the electrically insulating capping layer, which may be formed as a SiCN layer.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: February 1, 2011
    Assignees: Samsung Electronics Co., Ltd., Infineon Technologies AG
    Inventors: Woo Jin Jang, Sung Dong Cho, Hyung Woo Kim, Bum Ki Moon
  • Patent number: 7876731
    Abstract: Disclosed herein are a method and apparatus for acquiring a code group in an asynchronous Wideband Code Division Multiple Access (WCDMA) system. A primary synchronization channel search unit achieves primary synchronization channel slot timing synchronization. Then, the 1-1 search unit and 1-2 search unit of a secondary synchronization channel receive secondary synchronization channels from first and second antennas, respectively, start correlation operations between some of the slots of the received channels and code group candidates, and transmit information about candidates having values exceeding a predetermined threshold value to a determination unit. The determination unit transmits the received information about candidates to a second search unit of the secondary synchronization channel.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: January 25, 2011
    Assignees: Pantech Co., Ltd., SK Telecom Co., Ltd.
    Inventors: Woo-Jin Jang, Hong-Woo Lee
  • Patent number: 7869489
    Abstract: A preamble acquisition apparatus includes a first PN code generation unit for generating a first PN code having a bit string, a first correlation calculation unit for correlating a received frequency domain preamble signal with the first PN code within a first correlation range to generate a first correlation value, a first correlation value comparison unit for comparing the first correlation value with a first threshold value, a second PN code generation unit for generating a second PN code, a second correlation calculation unit for correlating the received frequency domain preamble signal with the second PN code within a second correlation range to generate a second correlation value, and a preamble acquisition determination unit for comparing the second correlation value with a second threshold value to determine whether to acquire the preamble. The bit values of the first PN code are located in the second PN code.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: January 11, 2011
    Assignee: Pantech Co., Ltd.
    Inventor: Woo Jin Jang
  • Publication number: 20110001414
    Abstract: An apparatus for adjusting the level of a refrigerator includes: a main body; a guide groove formed to be level in a forward/backward direction of the main body; a movement unit inserted in the guide groove and moving in the direction in which the main body is inclined; a contact point part formed at one of both ends of the guide groove and selectively connected to the movement unit; and a notifying unit informing about whether or not the contact point part is connected. When the refrigerator is installed, an installation technician can recognize whether or not the refrigerator is installed to be level regardless of a skilled degree of the installation technician, so the installation time can be shortened and a service satisfaction of consumers can be increased.
    Type: Application
    Filed: December 30, 2008
    Publication date: January 6, 2011
    Inventor: Woo-Jin Jang
  • Publication number: 20100099250
    Abstract: Methods of forming a contact pad include forming a copper pattern on a semiconductor substrate and forming a passivation layer on the copper pattern. The passivation layer is defined to have an opening therein that exposes at least a portion of an upper surface of the copper pattern. A diffusion barrier layer is formed in the opening by electroless plating the diffusion barrier layer onto the exposed portion of the upper surface of the copper pattern. This diffusion barrier layer operates as a barrier to copper out-diffusion from the copper pattern. These methods further include conformally depositing an underbump metallization layer onto at least a sidewall of the opening in the passivation layer and onto an upper surface of the diffusion barrier layer. A step is then performed to plate a contact bump (e.g., solder bump) onto a portion of the underbump metallization layer extending opposite the diffusion barrier layer.
    Type: Application
    Filed: October 21, 2008
    Publication date: April 22, 2010
    Inventors: Woo Jin Jang, Sung Dong Cho, Bum Ki Moon
  • Publication number: 20100081272
    Abstract: Methods of forming electrical interconnects include forming a copper pattern on a semiconductor substrate and then forming an electrically insulating capping layer on the copper pattern and an interlayer insulating layer on the electrically insulating capping layer. A contact hole is then formed, which extends through the interlayer insulating layer and the electrically insulating capping layer and exposes an upper surface of the copper pattern. An electroless plating step is then performed to form a copper pattern extension onto the exposed upper surface of the copper pattern. The copper pattern extension may have a thickness that is less than a thickness of the electrically insulating capping layer, which may be formed as a SiCN layer.
    Type: Application
    Filed: September 30, 2008
    Publication date: April 1, 2010
    Inventors: Woo Jin Jang, Sung Dong Cho, Hyung Woo Kim, Bum Ki Moon
  • Patent number: 7577115
    Abstract: Provided are an apparatus and a method for acquiring a code group that is used for a mobile communication terminal to acquire a scrambling code for identification of a base station. The present invention compares a part of slot values in code groups of the secondary synchronization channel transmitted to a mobile communication terminal from a base station with a part of code groups already known and, when there is a code group having a value higher than a predetermined value, reads code groups having the same pattern as that of the code group having a value higher than the predetermined value, which are previously stored in a predetermined storage. Then, the present invention excludes the read code groups from operations to reduce the quantity of unnecessary operations.
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: August 18, 2009
    Assignee: SKY Teletech Co., Ltd.
    Inventor: Woo Jin Jang
  • Publication number: 20080298292
    Abstract: A wireless broadband Internet (WiBro) terminal and a method of determining a sleep mode of a WiBro terminal, which can measure a strength of a preamble signal and determine an effective sleep interval are provided. A WiBro terminal, which can measure a strength of a preamble signal in the listening mode during an L frame after operating in a sleep mode during an N1 frame, and operate in a sleep mode during either an N1 or 2*N1 frames, or perform a normal operation when MOB_TRF_IND is positive, resulting from the comparing the strength with a threshold value, is provided.
    Type: Application
    Filed: December 29, 2006
    Publication date: December 4, 2008
    Applicant: PANTECH CO., LTD.
    Inventor: Woo Jin Jang
  • Publication number: 20080238279
    Abstract: Provided is a home-bar door and a method of manufacturing the home-bar door. The home-bar door includes a first case, an insulating plate, and a second case. The first case forms a portion of an exterior of the home-bar door, and the insulating plate is disposed in the first case as a separate component. The second case is configured to be coupled to the first case to cover the insulating plate and form the exterior of the home-bar door. Therefore, since the first and second cases can be coupled to each other after disposing the insulating plate between the first and second cases, the home-bar door can be efficiently manufactured and have good quality.
    Type: Application
    Filed: April 2, 2008
    Publication date: October 2, 2008
    Inventor: Woo Jin JANG
  • Publication number: 20080012592
    Abstract: A socket for testing a semiconductor package comprises two or more rubbers. Each rubber includes a chip-package contact portion configured to electrically connect with a chip package placed on the rubber and electrical wirings configured to electrically connect with the chip-package contact portion and having external contact ends configured to electrically connect with external electrical connections. The socket also comprises two or more guides configured to receive the chip package therein, the two or more guides including electrical wirings having external contact ends that are configured to be electrically connected with external electrical connections and a socket frame configured to hold the two or more rubbers and the two or more guides, wherein the rubbers correspond in number to the guides, and the rubbers and the guides are alternately stacked so that one rubber is located at a lowermost portion in a holding space of the socket frame.
    Type: Application
    Filed: June 11, 2007
    Publication date: January 17, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yoon-gyu SONG, Woo-jin JANG