Abstract: Provided is a method of forming an interconnect structure. The method includes preparing a substrate including a first metal layer and a first insulating layer, selectively forming a carbon layer having an sp2 bonding structure on the first metal layer, selectively forming a second insulating layer on the first insulating layer, forming a third insulating layer to cover the second insulating layer, and forming a second metal layer electrically connected to the first metal layer.

Abstract: A battery protection circuit includes: a charging control switch connected in series to a big current path between a battery module configured with a plurality of cells connected in series and a plurality of pack terminals; a battery controller for controlling the charging control switch based on cell voltages of the cells; and a plurality of first protection circuits connected to the respective cells on the big current path, and intercepting or allowing a current flowing to the corresponding cell based on the cell voltage of the corresponding cell from among the cells, wherein the first protection circuits respectively include at least one switch connected in series between neighboring cells or between one of the cells and a first pack terminal from among the pack terminals, and a cell controller for controlling the at least one switch according to a cell voltage of the corresponding cell.

Abstract: The present disclosure relates to a flexible display device case that is mounted to a flexible display device including a first body and a second body configured to be movable relative to the first body, and including a first member mounted to the first body to surround a side surface portion of the first body, and a second member mounted to the second body to surround a side surface portion of the second body, wherein an area overlapped by the first member and the second member changes as the first body and the second body move relative to each other.

Abstract: A thin-film structure includes a support layer and a dielectric layer on the support layer. The support layer includes a material having a lattice constant. The dielectric layer includes a compound having a Ruddlesden-Popper phase (An+1BnX3n+1). where A and B each independently include a cation, X is an anion, and n is a natural number. The lattice constant of the material of the support layer may be less than a lattice constant of the compound.

Abstract: A manufacturing method of a display apparatus includes forming a display layer on a substrate; forming an opening by irradiating laser onto the display layer; and sealing the display layer formed on the substrate. The laser is irradiated according to a spiral movement path, and the opening is formed by irradiating the laser at least twice at the same location.

Abstract: An integrated circuit device includes a first insulation layer on a substrate, a lower wiring structure in the first insulation layer and including a metal layer and a conductive barrier layer, such that the metal layer is on the conductive barrier layer, an etch stop layer overlapping an upper surface of the first insulation layer and an upper surface of the conductive barrier layer and having a first thickness, a capping layer overlapping a portion of the upper surface of the metal layer and having a second thickness which is less than the first thickness, a second insulation layer overlapping the etch stop layer and the capping layer, and an upper wiring structure connected to another portion of the upper surface of the metal layer not overlapped by the capping layer in the second insulation layer.

Abstract: An electrical conductor includes: a first conductive layer including a plurality of ruthenium oxide nanosheets, wherein at least one ruthenium oxide nanosheet of the plurality of ruthenium oxide nanosheets includes a halogen, a chalcogen, a Group 15 element, or a combination thereof on a surface of the ruthenium oxide nanosheet.

Abstract: A semiconductor device includes a substrate including an active pattern, a first interlayer dielectric layer on the substrate, the first interlayer dielectric layer including a recess on an upper portion thereof, and a lower connection line in the first interlayer dielectric layer, the lower connection line being electrically connected to the active pattern, and the lower connection line including a conductive pattern, the recess of the first interlayer dielectric layer selectively exposing a top surface of the conductive pattern, and a barrier pattern between the conductive pattern and the first interlayer dielectric layer, the first interlayer dielectric layer covering a top surface of the barrier pattern.

Abstract: A thin-film structure includes a support layer and a dielectric layer on the support layer. The support layer includes a material having a lattice constant. The dielectric layer includes a compound having a Ruddlesden-Popper phase (An+1BnX3n+1). where A and B each independently include a cation, X is an anion, and n is a natural number. The lattice constant of the material of the support layer may be less than a lattice constant of the compound.

Abstract: A dielectric material includes a layered metal oxide including a first layer having a positive charge and a second layer having a negative charge, wherein the first layer and the second layer are alternately disposed; a monolayered nanosheet; a nanosheet laminate of the monolayered nanosheets; or a combination thereof, wherein the dielectric material includes a two-dimensional layered material having a two-dimensional crystal structure, wherein the two-dimensional layered material is represented by Chemical Formula 1 X2[A(n?1)MnO(3n+1)]??Chemical Formula 1 wherein, in Chemical Formula 1, X is H, an alkali metal, a cationic polymer, or a combination thereof, A is Ca, Sr, La, Ta, or a combination thereof, M is La, Ta, Ti, or a combination thereof, and n?1.

Abstract: An integrated circuit device according to the inventive concepts includes lower wiring structures formed on a substrate, an air gap arranged between the lower wiring structures, a capping layer covering an upper surface of the air gap, an etch stop layer conformally covering an upper surfaces of the lower wiring structures and the capping layer and having a protrusion and recess structure, an insulating layer covering the etch stop layer, and an upper wiring structure penetrating the insulating layer and connected to the upper surface of the lower wiring structure not covered with the etch stop layer, wherein the upper wiring structure covers a portion of an upper surface of the capping layer, and a level of the upper surface of the capping layer is higher than a level of the upper surface of the lower wiring structures.

Abstract: A semiconductor device includes a substrate including an active pattern, a first interlayer dielectric layer on the substrate, the first interlayer dielectric layer including a recess on an upper portion thereof, and a lower connection line in the first interlayer dielectric layer, the lower connection line being electrically connected to the active pattern, and the lower connection line including a conductive pattern, the recess of the first interlayer dielectric layer selectively exposing a top surface of the conductive pattern, and a barrier pattern between the conductive pattern and the first interlayer dielectric layer, the first interlayer dielectric layer covering a top surface of the barrier pattern.

Abstract: A thin film structure including a dielectric material layer and an electronic device to which the thin film structure is applied are provided. The dielectric material layer includes a compound expressed by ABO3, wherein at least one of A and B in ABO3 is substituted and doped with another atom having a larger atom radius, and ABO3 becomes A1?xA?xB1?yB?yO3 (where x>=0, y>=0, at least one of x and y?0, a dopant A? has an atom radius greater than A and/or a dopant B? has an atom radius greater than B) through substitution and doping. A dielectric material property of the dielectric material layer varies according to a type of a substituted and doped dopant and a substitution doping concentration.

Abstract: Silver powder includes multiple particles 2 containing silver as a main component. A ratio of the number of particles 2 which are flake-like and each of which has a monocrystalline structure and has a largest plane that is a lattice plane (111), to the total number of particles, is not less than 95%. The silver powder is water-dispersible. In the silver powder, a median size D50 is not less than 0.1 ?m and not greater than 10 ?m, a standard deviation of particle sizes is not greater than 5 ?m, an average thickness Tave is not greater than 300 nm, and an aspect ratio (D50/Tave) is not less than 4.

Abstract: Disclosed herein is a mobile terminal including a first frame, a second frame slideably movable from the first frame in a first direction or a second direction opposite to the first direction, a slide frame movable in the first or second direction with respect to the second frame, a magnetic roller rotatably coupled to one side of the second frame, a flexible display including a first region coupled to the first frame, a second region coupled to the slide frame, and a third region disposed between the first and second regions and bent around the magnetic roller, and a rolling plate attached to the flexible display. The magnetic roller provides magnetic force to cause the rolling plate to be attached to the magnetic roller. The mobile terminal may maintain the display in a flat state during movement of the second frame by preventing the display from being separated.

Abstract: An integrated circuit device includes a first insulation layer on a substrate, a lower wiring structure in the first insulation layer and including a metal layer and a conductive barrier layer, such that the metal layer is on the conductive barrier layer, an etch stop layer overlapping an upper surface of the first insulation layer and an upper surface of the conductive barrier layer and having a first thickness, a capping layer overlapping a portion of the upper surface of the metal layer and having a second thickness which is less than the first thickness, a second insulation layer overlapping the etch stop layer and the capping layer, and an upper wiring structure connected to another portion of the upper surface of the metal layer not overlapped by the capping layer in the second insulation layer.

Abstract: A color conversion panel includes a substrate, a low refractive layer disposed on one surface of the substrate and including a carbosilane-siloxane copolymer, a color conversion layer disposed on the low refractive layer and including a color conversion member and a planarization layer covering the low refractive layer and the color conversion layer, wherein the low refractive layer has a refractive index of less than or equal to 1.30 in a wavelength of 500 nm to 550 nm, and the color conversion member includes a quantum dot, and a manufacturing method thereof is provided.

Abstract: [Object] To provide fine particles 2 having excellent printing characteristics, thermal conductivity, and electrical conductivity. [Solution] The fine particles 2 are flake-like. A main component of the fine particles 2 is an electrically conductive metal. A representative metal is silver. The structure of this metal is monocrystalline. An arithmetical mean roughness Ra of the surface of the fine particles 2 is not larger than 10 nm. The fine particles 2, a solvent, a binder, and a dispersant, etc., are mixed to obtain an electrically conductive paste. By using the electrically conductive paste, a pattern connecting elements is printed on a printed circuit board of an electronic device.

Abstract: An electrical conductor includes: a first conductive layer including a plurality of ruthenium oxide nanosheets, wherein at least one ruthenium oxide nanosheet of the plurality of ruthenium oxide nanosheets includes a halogen, a chalcogen, a Group 15 element, or a combination thereof on a surface of the ruthenium oxide nanosheet.

Abstract: A semiconductor device includes a substrate including an active pattern, a first interlayer dielectric layer on the substrate, the first interlayer dielectric layer including a recess on an upper portion thereof, and a lower connection line in the first interlayer dielectric layer, the lower connection line being electrically connected to the active pattern, and the lower connection line including a conductive pattern, the recess of the first interlayer dielectric layer selectively exposing a top surface of the conductive pattern, and a barrier pattern between the conductive pattern and the first interlayer dielectric layer, the first interlayer dielectric layer covering a top surface of the barrier pattern.