Patents by Inventor Woong LIM

Woong LIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5751632
    Abstract: A device for and method of sensing data of a multi-bit memory cell includes a memory cell having a gate, a source and a drain, the memory cell being programmed with at least two voltage levels, a voltage generator coupled to the memory cell and providing the gate of the memory cell with a voltage, the voltage being increased linearly, a sensing amplifier coupled to the memory cell and generating a sensing signal when a drain voltage of the memory cell is lower than a reference voltage, a voltage detector coupled to the sensing amplifier and the voltage generator and detecting synchronously a gate voltage of the memory cell with the sensing signal of the sensing amplifier, andan A/D converter coupled to the voltage detector and translating the gate voltage detected in the voltage detector into a digital value.
    Type: Grant
    Filed: May 7, 1997
    Date of Patent: May 12, 1998
    Assignee: LG Semicon Co., Ltd.
    Inventors: Woong Lim Choi, Kyeong Man Ra, Kyung Myung Hur
  • Patent number: 5745412
    Abstract: A nonvolatile memory cell includes a floating gate; a programming region, having a first current path to the floating gate, for programming by providing charge carriers to the floating gate through the first current path or extracting charge carriers stored in the floating gate; and a verification region, having a second current path separated from the first current path, for verifying the charge amount of the floating gate through the second current path during programming.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: April 28, 1998
    Assignee: LG Semicon Co., Ltd.
    Inventor: Woong-Lim Choi
  • Patent number: 5566111
    Abstract: A method for programming a nonvolatile memory cell having a control gate, a floating gate, a drain, a source, and a channel region disposed between the drain and source, the method includes the steps of applying a first voltage to the control gate to form an inversion layer in the channel region, the first voltage being varied to program at least two threshold levels of the memory cell, applying a second voltage to the drain and a third voltage to the source, the second voltage being greater than the third voltage, monitoring a current flowing between the drain and the source during the programming of the at least two threshold levels, and terminating any one of the first voltage, the second voltage, and the third voltage when the monitored current reaches a preset reference current to thereby stop the programming of the at least two threshold levels.
    Type: Grant
    Filed: October 13, 1995
    Date of Patent: October 15, 1996
    Assignee: LG Semicon Co., Ltd.
    Inventor: Woong-Lim Choi