Patents by Inventor Wu Hsu

Wu Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240158459
    Abstract: Provided herein are methods of increasing T-cell function and T-cells produced by these methods. Also provided herein are methods of treating a subject using T-cells produced by these methods.
    Type: Application
    Filed: January 19, 2024
    Publication date: May 16, 2024
    Applicant: Kyverna Therapeutics, Inc.
    Inventors: John Lee, Erin O’Brien, Jordan Tsai, Lih-Yun Hsu, Faye Wu
  • Publication number: 20240144604
    Abstract: Aspects of the subject disclosure may include, for example, capturing a first depiction of an exhibit environment, wherein the first depiction of the exhibit environment comprises an image of at least one artifact and an image of at least one interface element, and wherein the at least one interface element is located in the exhibit environment at a first location relative to the at least one artifact; obtaining a first user profile of a first user, wherein the first user profile comprises at least one first preference of the first user, and wherein the first user is located in a first remote environment; and facilitating a presenting of a first modified version of the first depiction of the exhibit environment in the first remote environment, wherein the first modified version moves the image of the at least one interface element to a second location relative to the at least one artifact, wherein the second location is different than the first location, and wherein the second location is selected based upon
    Type: Application
    Filed: October 28, 2022
    Publication date: May 2, 2024
    Applicant: AT&T Intellectual Property I, L.P.
    Inventors: Eric Zavesky, Jean-Francois Paiement, Wen-Ling Hsu, Tan Xu, Aritra Guha, Qiong Wu
  • Publication number: 20240129889
    Abstract: For example, a method includes collecting orientation data from a mobile device as a user of the mobile device moves within an indoor space, generating orientation estimates for the mobile device from the orientation data, generating distance estimates representing distances of the mobile device to a wireless access point in the indoor space, storing the orientation estimates and the distance estimates together as a series of data blocks, constructing a plurality of trajectory segments from the orientation estimates, identifying identifiers for a last number of trajectory segments, using data blocks corresponding to the last number of trajectory segments, and identifying a predicted place within the indoor space to which the user is expected to go by using the identifiers to traverse a prediction tree, where branches of the prediction tree that are associated with the identifiers define a path that ends at a leaf node corresponding to the predicted place.
    Type: Application
    Filed: October 12, 2022
    Publication date: April 18, 2024
    Inventors: Manoop Talasila, Qiong Wu, Wen-Ling Hsu, Xiaopeng Jiang, Cristian Borcea, Pritam Sen
  • Publication number: 20240104858
    Abstract: Creating scent models and using scent models in cross-reality environments can include capturing experience data identifying a scent detected and a context in which the scent was detected. The experience data can be provided to a scent modeling service to generate a scent model that can represent perceived scents and perceived scent intensities for a user. The scent model can be used to generate cross-reality session data to be used in a cross-reality session presented by a cross-reality device. The cross-reality device can include a scent generator and can generate the cross-reality session using data obtained from the user device. The cross-reality device can generate a further scent during the cross-reality session based on the scent model.
    Type: Application
    Filed: September 23, 2022
    Publication date: March 28, 2024
    Applicant: AT&T Intellectual Property I, L.P.
    Inventors: Wen-Ling Hsu, Eric Zavesky, Louis Alexander, Aritra Guha, Jean-Francois Paiement, Qiong Wu, Zhengyi Zhou
  • Publication number: 20240104467
    Abstract: Tasks associated with users can be managed for efficient workflow management. A task management component (TMC) can analyze, including performing artificial intelligence-based analysis on, task-related information relating to associated with a user(s), assessment information relating to assessing performance or expertise associated with a task, biometric information relating to health, diet, and activity associated with the user(s), and/or user(s) feedback information. Based on the analysis, TMC can adaptively adjust respective attributes associated with respective tasks, resulting in respective adjusted attributes associated with the respective tasks. Based on the respective adjusted attributes, TMC can determine task information and can present the task information to a device(s) associated with the user(s) to facilitate performance of the tasks.
    Type: Application
    Filed: September 22, 2022
    Publication date: March 28, 2024
    Inventors: Aritra Guha, Zhengyi Zhou, Jean-Francois Paiement, Eric Zavesky, Jianxiong Dong, Wen-Ling Hsu, Qiong Wu, Louis Alexander
  • Publication number: 20240072155
    Abstract: A method includes forming a transistor, which includes forming a dummy gate stack over a semiconductor region, and forming an Inter-Layer Dielectric (ILD). The dummy gate stack is in the ILD, and the ILD covers a source/drain region in the semiconductor region. The method further includes removing the dummy gate stack to form a trench in the first ILD, forming a low-k gate spacer in the trench, forming a replacement gate dielectric extending into the trench, forming a metal layer to fill the trench, and performing a planarization to remove excess portions of the replacement gate dielectric and the metal layer to form a gate dielectric and a metal gate, respectively. A source region and a drain region are then formed on opposite sides of the metal gate.
    Type: Application
    Filed: November 8, 2023
    Publication date: February 29, 2024
    Inventors: Kuo-Hua Pan, Je-Wei Hsu, Hua Feng Chen, Jyun-Ming Lin, Chen-Huang Peng, Min-Yann Hsieh, Java Wu
  • Patent number: 11796591
    Abstract: An apparatus comprising a battery and a circuit. The battery may be configured to provide a persistent power source. The circuit may comprise a processor, self-test logic, internal storage and logic circuitry. The self-test logic may be configured to perform a status check to determine an operating status of the logic circuitry. The processor may be configured to enable a first portion of the status check to be performed during a shutdown of the apparatus and a second portion of the status check to be performed during a bootup of the apparatus. The battery may provide the persistent power source to the internal storage after the shutdown of the apparatus. Parameters generated during the first portion may be stored in the internal storage. The parameters stored in the internal storage may be used with the second portion to determine the operating status of the logic circuitry.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: October 24, 2023
    Assignee: Ambarella International LP
    Inventors: Praveen Jaini, Hsin-Wu Hsu, Hejia Yan
  • Patent number: 11270183
    Abstract: An electronic module preparation layer (A) and a manufacturing method therefor. The electronic module preparation layer (A) comprises a substrate (10), multiple electronic modules (20) and two release layers (30, 40). The multiple electronic modules (20) are coated in the substrate (10) by means of the two release layers (30, 40) so as to provide a protective effect. When a user needs to input a program code to various electronic modules (20), since one of the release layers, i.e.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: March 8, 2022
    Inventor: Wu-Hsu Lin
  • Publication number: 20210210362
    Abstract: An electronic module preparation layer (A) and a manufacturing method therefor. The electronic module preparation layer (A) comprises a substrate (10), multiple electronic modules (20) and two release layers (30, 40). The multiple electronic modules (20) are coated in the substrate (10) by means of the two release layers (30, 40) so as to provide a protective effect. When a user needs to input a program code to various electronic modules (20), since one of the release layers, i.e.
    Type: Application
    Filed: December 29, 2017
    Publication date: July 8, 2021
    Inventor: Wu-Hsu Lin
  • Patent number: 11006750
    Abstract: A shelf frame for a rack of shelves includes an elongated body; a ledge extending perpendicularly from a bottom edge of the elongated body, the ledge having a width equal to a height of the elongated body; an elongated enhancement disposed along a top edge of the elongated body, the enhancement being bent toward the ledge; two upright extensions disposed at two ends of the elongated body respectively; and a plurality of fasteners disposed in each of the two upright extensions. The two upright extensions and the elongated body are on the same plane. Each of the two upright extensions has a length equal to twice of the height of the elongated body.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: May 18, 2021
    Inventor: Wu Hsu Chiu
  • Patent number: 10866281
    Abstract: A diagnostic system includes: a processor, arranged to extract a plurality of coordinates of a plurality of pins on an outer surface of a design layout according to a plurality of tagging texts labeling the plurality of pins respectively, and arranged to generate a design exchange format file according to the plurality of coordinates, wherein an order of the plurality of tagging texts are sorted by a predetermined scanning sequence; and a chip diagnostic tool, arranged to scan the plurality of scan components in a physical circuit on a testing platform through the plurality of pins on the outer surface of the physical circuit by following the predetermined scanning sequence to determine a defect component in the physical circuit according to the design exchange format file; wherein the physical circuit corresponds to the design layout.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wei-Pin Changchien, Hong-Chen Cheng, Pei-Ying Lin, Hsin-Wu Hsu
  • Publication number: 20200329867
    Abstract: A shelf frame for a rack of shelves includes an elongated body; a ledge sticking inward from the elongated body and being perpendicular to the elongated body, the ledge having a width equal to that of the elongated body; an elongated enhancement disposed along an edge of the elongated body and being distal from the ledge, the enhancement being bent toward the ledge; two upright extensions disposed at two ends of the elongated body respectively; and a plurality of fasteners disposed at the extensions opposite to the ledge. The extensions and the elongated body are on the same plane and are parallel to each other. The extension has a length equal to twice of the width of the elongated body.
    Type: Application
    Filed: March 25, 2020
    Publication date: October 22, 2020
    Inventor: WU HSU CHIU
  • Patent number: 10626905
    Abstract: A shelving assembly includes at least one first post having an L-shaped section and including first apertures, two connection members at first ends respectively, and a retainer disposed on an outer surface of each connection member and including a neck and an enlarged head. A second post has an L-shaped section and includes second apertures and two T-shaped aperture members at second ends respectively. A size of the aperture member is greater than a diameter of the head. A length of the aperture member is at least 1.5 times of a diameter of the head. A width of a vertical part of the aperture member is greater than a diameter of the neck and smaller than the diameter of the head. The retainer passes through the aperture member to lock the neck in the vertical part, thereby joining the first and second posts.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: April 21, 2020
    Inventor: Wu Hsu Chiu
  • Publication number: 20190242943
    Abstract: A diagnostic system includes: a processor, arranged to extract a plurality of coordinates of a plurality of pins on an outer surface of a design layout according to a plurality of tagging texts labeling the plurality of pins respectively, and arranged to generate a design exchange format file according to the plurality of coordinates, wherein an order of the plurality of tagging texts are sorted by a predetermined scanning sequence; and a chip diagnostic tool, arranged to scan the plurality of scan components in a physical circuit on a testing platform through the plurality of pins on the outer surface of the physical circuit by following the predetermined scanning sequence to determine a defect component in the physical circuit according to the design exchange format file; wherein the physical circuit corresponds to the design layout.
    Type: Application
    Filed: April 19, 2019
    Publication date: August 8, 2019
    Inventors: WEI-PIN CHANGCHIEN, HONG-CHEN CHENG, PEI-YING LIN, HSIN-WU HSU
  • Patent number: 10267853
    Abstract: A diagnostic system includes a location extractor, a file generator, and a chip diagnostic tool. The location extractor is arranged to extract at least a coordinate of at least one component in an intellectual property design layout of an integrated circuit design layout according to at least one tagging text labeling the at least one component in the intellectual property design layout. The file generator is arranged to generate a format file according to the at least coordinate. The chip diagnostic tool is arranged to scan a physical intellectual property circuit in a physical integrated circuit to determine a defect component in the physical intellectual property circuit according to the format file. The physical intellectual property circuit corresponds to the intellectual property design layout, and the physical integrated circuit corresponds to the integrated circuit design layout.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: April 23, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wei-Pin Changchien, Hong-Chen Cheng, Pei-Ying Lin, Hsin-Wu Hsu
  • Patent number: 10037453
    Abstract: A capacitive fingerprint sensing module includes a flexible printed circuit board, a lower conductive adhesive layer, an upper conductive adhesive layer, and a positioning frame. The flexible printed circuit board has an upper surface and a lower surface. The upper surface has a finger pressing region and a first sensing layer. The lower surface has a second sensing layer. The lower conductive adhesive layer is formed on the second sensing layer and provided to cover second sensing electrodes mounted on the second sensing layer. The upper conductive adhesive layer is formed on the finger pressing region. The positioning frame has an opening facing upward and a slot. The flexible printed circuit board is inserted through the slot and embedded in the positioning frame. Accordingly, effects of conductivity enhancement and accuracy improvement of the capacitive fingerprint sensing module are produced.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: July 31, 2018
    Inventor: Wu-Hsu Lin
  • Publication number: 20180060633
    Abstract: A capacitive fingerprint sensing module includes a flexible printed circuit board, a lower conductive adhesive layer, an upper conductive adhesive layer, and a positioning frame. The flexible printed circuit board has an upper surface and a lower surface. The upper surface has a finger pressing region and a first sensing layer. The lower surface has a second sensing layer. The lower conductive adhesive layer is formed on the second sensing layer and provided to cover second sensing electrodes mounted on the second sensing layer. The upper conductive adhesive layer is formed on the finger pressing region. The positioning frame has an opening facing upward and a slot. The flexible printed circuit board is inserted through the slot and embedded in the positioning frame. Accordingly, effects of conductivity enhancement and accuracy improvement of the capacitive fingerprint sensing module are produced.
    Type: Application
    Filed: August 26, 2016
    Publication date: March 1, 2018
    Inventor: Wu-Hsu Lin
  • Publication number: 20170330705
    Abstract: A switch assembly has a switch unit and a separating cap. The switch unit has a pressing element. The separating cap is attached to the switch unit and encloses the pressing element. Accordingly, glue filled into an object in which the switch assembly is mounted can be kept from attaching to the pressing element and the operation accuracy of the switch unit can be improved.
    Type: Application
    Filed: May 12, 2016
    Publication date: November 16, 2017
    Inventor: Wu-Hsu LIN
  • Publication number: 20170325017
    Abstract: An electrical speaker assembly has a speaker element and two caps. The speaker element has two sides. The caps are attached respectively to the two sides of the speaker element, and each cap has a resonance space between the cap and a corresponding one of the sides of the speaker element, wherein one of the caps has a wire notch defined in the cap.
    Type: Application
    Filed: May 4, 2016
    Publication date: November 9, 2017
    Inventor: WU-HSU LIN
  • Patent number: 9813803
    Abstract: An electrical speaker assembly has a speaker element and two caps. The speaker element has two sides. The caps are attached respectively to the two sides of the speaker element, and each cap has a resonance space between the cap and a corresponding one of the sides of the speaker element, wherein one of the caps has a wire notch defined in the cap.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: November 7, 2017
    Inventor: Wu-Hsu Lin