Patents by Inventor Wuxian Shi

Wuxian Shi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10461887
    Abstract: Methods and systems for blind detection. At the encoder, a code word is encoded using a polar coder, where the input vector includes a user equipment (UE)-specific frozen sequence in the frozen bit positions. At the decoder, a set of short listed channel candidates is generated based on decoding using the UE-specific frozen sequence.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: October 29, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yiqun Ge, Wuxian Shi
  • Patent number: 10447435
    Abstract: In reduced-stage polar decoding, a received word that is based on an N-bit codeword of a polar code is decoded using fewer than log2N Log Likelihood Ratio (LLR) stages. Decoding uses a reduced stage decoding configuration. In an embodiment, such a configuration includes at least one higher-order LLR stage with nodes implementing functions that are based on a combination of lower-order polar code kernels.
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: October 15, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Wuxian Shi, Yiqun Ge
  • Patent number: 10372458
    Abstract: A superscalar processor, for out of order self-timed execution, comprising a plurality of independent self-timed function units, having corresponding instruction queues for holding instructions to be executed by the function unit. The processor further comprising an instruction dispatcher configured for inputting instructions in program counter order; and determining an appropriate function unit for execution of the instruction and a resource management unit configured for monitoring the function units and signaling availability of the appropriate function unit, wherein the dispatcher only dispatches the instruction to the appropriate function unit in response to the availability signal from the resource management unit.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: August 6, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD
    Inventors: Yiqun Ge, Wuxian Shi
  • Patent number: 10361717
    Abstract: A first error-detecting code (EDC) is computed based on a first segment of a block of information that is to be encoded, and a second EDC is computed based on at least a second segment of the block of information. The first EDC is masked with a first masking segment and the second EDC with a second masking segment to generate a first masked EDC and a second masked EDC. The first masking segment and the second masking segment are associated with a target receiver of the block of information. A codeword is generated based on a code and an input vector that includes the first segment, the first masked EDC, the second segment, and the second masked EDC. This type of coding could be useful to support early termination of blind detection at a decoder, for example.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: July 23, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yiqun Ge, Ran Zhang, Nan Cheng, Wuxian Shi
  • Patent number: 10361728
    Abstract: The present disclosure relates to multiple-symbol combination based decoding for general polar codes. Multiple-symbol combination based decoding of a received word that is based on a codeword involves determining whether all nodes at an intermediate stage of the multiple-symbol combination based decoding, which provide their outputs as inputs to a subset of nodes at a next stage of the multi-symbol combination based decoding, are associated with trust symbols in the received word that have a higher reliability of being successfully decoded than doubt symbols in the received word. A hard decision is performed in response to a positive determination.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: July 23, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Wuxian Shi, Ran Zhang, Nan Cheng, Yiqun Ge
  • Patent number: 10326564
    Abstract: Methods and devices are disclosed for receiving and decoding sparsely encoded data sequences using a message passing algorithm (MPA) or maximum likelihood sequence estimation (MLSE). Such data sequences may be used in wireless communications systems supporting multiple access, such as sparse code multiple access (SCMA) systems. The Methods and devices reduce the number of states in a search space for each received signal and associated function node based on a search threshold based on a characteristic related to the received signal and/or to a quality of a resource element over which the received signal is transmitted.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: June 18, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yiqun Ge, Wuxian Shi
  • Patent number: 10318297
    Abstract: A self-timed parallelized multi-core processor has an instruction decoder unit for receiving a program code instruction, determining an operating code and latency for the instruction, and assigning a loop index to the instruction. An instruction decomposer creates a primitive by decomposing the instruction, replacing the loop index with a core index, and broadcasting the primitive. Self-timed processing cores each having a unique core index compare the core index to their unique processing core index. The processing cores act on the primitive when their processing core index is within a threshold of the core index.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: June 11, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yiqun Ge, Wuxian Shi, Lan Hu
  • Patent number: 10318305
    Abstract: Embodiments are provided for an asynchronous processor with pipelined arithmetic and logic unit. The asynchronous processor includes a non-transitory memory for storing instructions and a plurality of instruction execution units (XUs) arranged in a ring architecture for passing tokens. Each one of the XUs comprises a logic circuit configured to fetch a first instruction from the non-transitory memory, and execute the first instruction. The logic circuit is also configured to fetch a second instruction from the non-transitory memory, and execute the second instruction, regardless whether the one of the XUs holds a token for writing the first instruction. The logic circuit is further configured to write the first instruction to the non-transitory memory after fetching the second instruction.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: June 11, 2019
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Wuxian Shi, Yiqun Ge, Qifan Zhang, Tao Huang, Wen Tong
  • Patent number: 10312947
    Abstract: Methods for encoding and decoding Polar codes are provided, together with apparatuses for performing the methods. An encoding method combines first and second sequences of information bits and CRC bits and a plurality of frozen bits into an input vector. The input vector is multiplied by a generator matrix for a Polar code to produce a concatenated codeword. A decoding method receives such a codeword and produces a decoded vector by generating successive levels of a decision tree. For a first number of levels of the decision tree, paths beyond a first maximum number of most probable paths are discarded. For a second number of levels of the decision tree, paths beyond a second maximum number of most probable paths are discarded. In some cases, the decoding method may have improved performance compared to some decoding methods for non-concatenated codewords.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: June 4, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yiqun Ge, Wuxian Shi
  • Publication number: 20190158128
    Abstract: Methods, apparatuses, and systems for implementing error-correction in communication systems, particularly wireless communication systems, are provided. A Polar code-based encoding method combines first and second pluralities of information bits and error-correcting code bits, and a plurality of frozen bits, into an input vector. The input vector is encoded according to a Polar code to produce a first codeword, which improves the probability of successfully transmitting and receiving the codeword over a physical channel in the communication system.
    Type: Application
    Filed: January 21, 2019
    Publication date: May 23, 2019
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: YIQUN GE, WUXIAN SHI
  • Patent number: 10291264
    Abstract: General polar codes are disclosed that encode symbols of a q-ary alphabet, where q?2. Systems and methods are also disclosed for performing code rate matching when using general polar codes. In one embodiment, a method performed at a transmitter includes receiving a plurality of bits at a polar encoder. The plurality of bits represent a plurality of q-ary symbols, where q>2. The method further includes encoding the plurality of bits using the polar encoder to generate a codeword of q-ary symbols represented by bits. The method further includes puncturing the codeword according to a puncturing pattern to obtain a punctured codeword having a reduced bit length.
    Type: Grant
    Filed: May 29, 2017
    Date of Patent: May 14, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Ran Zhang, Wuxian Shi, Nan Cheng, Yiqun Ge
  • Publication number: 20180375532
    Abstract: A transmitter and receiver are provided for communication over a noisy channel in a wireless communications system. The transmitter and receiver use polar coding to provide reliability of data transmission over the noisy wireless channel. In addition, signature bits are inserted in some unreliable bit positions of the polar code. For a given codeword, the receiver with knowledge of the signature can more effectively decode the codeword. Cyclic redundancy check (CRC) bits may also included in the input vector to assist in decoding.
    Type: Application
    Filed: August 30, 2018
    Publication date: December 27, 2018
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: YIQUN GE, WUXIAN SHI
  • Patent number: 10133578
    Abstract: Embodiments are provided for an asynchronous processor with heterogeneous processors. In an embodiment, the apparatus for an asynchronous processor comprises a memory configured to cache instructions, and a first unit (XU) configured to processing a first instruction of the instructions. The apparatus also comprises a second XU having less restricted access than the first XU to a resource of the asynchronous processor and configured to process a second instruction of the instructions. The second instruction requires access to the resource. The apparatus further comprises a feedback engine configured to decode the first instruction and the second instruction, and issue the first instruction to the first XU, and a scheduler configured to send the second instruction to the second XU.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: November 20, 2018
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Yiqun Ge, Wuxian Shi, Qifan Zhang, Tao Huang, Wen Tong
  • Publication number: 20180278389
    Abstract: Coding sub-channel selection involves, in an embodiment, determining, from sub-channels that are defined by a code and that have associated reliabilities for input bits at input bit positions, a first number of the sub-channels to carry bits that are to be encoded. A second number of the sub-channels, greater than the first number, are selected. The second number of sub-channels are selected to provide exactly the first number sub-channels to be available to carry the bits that are to be encoded.
    Type: Application
    Filed: February 21, 2018
    Publication date: September 27, 2018
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: LOUIS-PHILIPPE HAMELIN, YIQUN GE, WUXIAN SHI, RAN ZHANG, NAN CHENG
  • Publication number: 20180248654
    Abstract: An ordered number sequence may be determined based on an ordered sub-channel sequence specifying an order of N sub-channels that are defined by a code and that have associated reliabilities for input bits at N input bit positions. The ordered number sequence represents the ordered sub-channel sequence as a sequence of fewer than N numbers. The numbers in the ordered number sequence indicate the sub-channels, by representing numbers of the sub-channels for example, from different subsets of the N sub-channels, that appear in the order specified by the ordered sub-channel sequence. Using ordered number sequences, longer ordered sub-channel sequences could be constructed from smaller ordered sub-channel sequences, and/or sub-channels that to be selected from a longer ordered sub-channel sequence could be divided into two or more parts, with each part to be selected from shorter ordered sub-channel sequences.
    Type: Application
    Filed: February 6, 2018
    Publication date: August 30, 2018
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yiqun GE, Wuxian Shi, Ran Zhang, Nan Cheng
  • Publication number: 20180248655
    Abstract: A number K of N sub-channels that are defined by a code and that have associated reliabilities for input bits at N input bit positions, are to be selected to carry bits that are to be encoded. A localization area that includes multiple sub-channels and is located below fewer than K of the N sub-channels in a partial order of the N sub-channels is determined based on one or more coding parameters. The fewer than K sub-channels of the N sub-channels above the localization area in the partial order are selected, and a number of sub-channels from those in the localization area are also selected. The selected fewer than K sub-channels and the number of sub-channels selected from those in the localization area together include K sub-channels to carry the bits that are to be encoded.
    Type: Application
    Filed: January 19, 2018
    Publication date: August 30, 2018
    Inventors: Jean-Claude Belfiore, Yiqun Ge, Gaoning He, Ran Zhang, Ingmar LAND, Wuxian Shi, Wen Tong
  • Patent number: 10042641
    Abstract: An asynchronous processing system comprising an asynchronous scalar processor and an asynchronous vector processor coupled to the scalar processor. The asynchronous scalar processor is configured to perform processing functions on input data and to output instructions. The asynchronous vector processor is configured to perform processing functions in response to a very long instruction word (VLIW) received from the scalar processor. The VLIW comprises a first portion and a second portion, at least the first portion comprising a vector instruction.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: August 7, 2018
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Qifan Zhang, Wuxian Shi, Yiqun Ge, Tao Huang, Wen Tong
  • Patent number: 9928074
    Abstract: Embodiments are provided for an asynchronous processor with token-based very long instruction word architecture. The asynchronous processor comprises a memory configured to cache a plurality of instructions, a feedback engine configured to receive the instructions in bundles of instructions at a time (referred to as very long instruction word) and to decode the instructions, and a crossbar bus configured to transfer calculation information and results of the asynchronous processor. The apparatus further comprises a plurality of sets of execution units (XUs) between the feedback engine and the crossbar bus. Each set of the sets of XUs comprises a plurality of XUs arranged in series and configured to process a bundle of instructions received at the each set from the feedback engine.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: March 27, 2018
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Yiqun Ge, Wuxian Shi, Qifan Zhang, Tao Huang, Wen Tong
  • Publication number: 20180054278
    Abstract: In reduced-stage polar decoding, a received word that is based on an N-bit codeword of a polar code is decoded using fewer than log2N Log Likelihood Ratio (LLR) stages. Decoding uses a reduced stage decoding configuration. In an embodiment, such a configuration includes at least one higher-order LLR stage with nodes implementing functions that are based on a combination of lower-order polar code kernels.
    Type: Application
    Filed: July 17, 2017
    Publication date: February 22, 2018
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: WUXIAN SHI, YIQUN GE
  • Publication number: 20180048418
    Abstract: Methods and systems for blind detection. At the encoder, a code word is encoded using a polar coder, where the input vector includes a user equipment (UE)-specific frozen sequence in the frozen bit positions. At the decoder, a set of short listed channel candidates is generated based on decoding using the UE-specific frozen sequence.
    Type: Application
    Filed: August 2, 2017
    Publication date: February 15, 2018
    Inventors: Yiqun Ge, Wuxian Shi